CN108336203A - A kind of gallium nitride based LED epitaxial slice and its manufacturing method - Google Patents
A kind of gallium nitride based LED epitaxial slice and its manufacturing method Download PDFInfo
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- CN108336203A CN108336203A CN201711479757.3A CN201711479757A CN108336203A CN 108336203 A CN108336203 A CN 108336203A CN 201711479757 A CN201711479757 A CN 201711479757A CN 108336203 A CN108336203 A CN 108336203A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
Abstract
The invention discloses a kind of gallium nitride based LED epitaxial slice and its manufacturing methods, belong to technical field of semiconductors.Gallium nitride based LED epitaxial slice includes Sapphire Substrate and the AlN buffer layers, 3D nucleating layers, undoped GaN layer, N-type layer, multiple quantum well layer, electronic barrier layer and the high temperature P-type layer that are cascading on a sapphire substrate, the 3D nucleating layers include the first sublayer and the second sublayer, first sublayer is GaN layer made of being grown at 800~1100 DEG C, and the second sublayer is GaN layer made of being grown at 1000~1200 DEG C.The growth temperature of first sublayer is relatively low, and it is smaller and more intensive to be formed by crystal grain.These crystal grain meeting tensile deformation makes gap-closing, reduces surface energy.Tensile stress is thus will produce, promotes epitaxial wafer to develop to recessed direction is become, so as to improve warpage, wavelength concentration is improved, the temperature of the second sublayer is higher, then the surface energy of crystal grain reduces, it ensure that warpage will not integrally occur for epitaxial wafer, to promote the photoelectric properties of LED chip.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of gallium nitride based LED epitaxial slice and its manufacture
Method.
Background technology
GaN (gallium nitride) has good thermal conductivity, while having the characteristics such as high temperature resistant, acid and alkali-resistance, high rigidity, wide
The general light emitting diode applied to various wave bands.The core component of GaN base light emitting is LED (Light Emitting
Diode, light emitting diode) chip, LED chip includes epitaxial wafer and the electrode on epitaxial wafer.
The primary structure of GaN base light emitting epitaxial wafer includes：Sapphire Substrate and be stacked sapphire serve as a contrast
AlN buffer layers, 3D nucleating layers, undoped GaN layer, N-type layer, multiple quantum well layer, electronic barrier layer on bottom and high temperature p-type
Layer.In order to improve the production capacity of light emitting diode and the photoelectric properties of LED chip, above-mentioned GaN base light emitting epitaxial wafer is being made
When making, physical vapor precipitation method growing AIN buffer layer on a sapphire substrate is typically first used, is then had growth described
The Sapphire Substrate of AlN buffer layers is put into MOCVD (Metal-organic Chemical Vapor Deposition, gold
Belong to organic compound chemical gaseous phase deposition) in equipment, using metallo-organic compound chemical vapor infiltration continued growth extension
Piece.
In the implementation of the present invention, the inventor finds that the existing technology has at least the following problems：
After growing AIN buffer layer, performance of the Sapphire Substrate in different types of MOCVD device is different.Example
When growing GaN base light emitting such as in domestic MOCVD, growth has the center of the Sapphire Substrate of AlN buffer layers can be to
Upper protrusion (raised direction is identical as the direction of growth of epitaxial wafer), edge can be bent downwardly (direction of bending and epitaxial wafer
The direction of growth is opposite) so that the epitaxial wafer of manufactured GaN base light emitting integrally has certain angularity.In addition, due to
The heating pedestal being arranged below Sapphire Substrate can successively transmit heat to extension on piece, therefore in growth multiple quantum well layer
When, since Sapphire Substrate has certain angularity, heat will be caused anisotropically to be transmitted to multiple quantum well layer, extreme influence
The uniformity of multiple quantum well layer emission wavelength.
Invention content
In order to solve in the prior art in different MOCVD devices, warpage occurs for epitaxial wafer, influences multiple quantum well layer and shines
The problem of uniformity of wavelength, an embodiment of the present invention provides a kind of gallium nitride based LED epitaxial slice and its manufacturers
Method.The technical solution is as follows：
On the one hand, the present invention provides a kind of gallium nitride based LED epitaxial slice, two poles of the gallium nitride base light emitting
Pipe epitaxial wafer includes Sapphire Substrate and the AlN buffer layers being cascading in the Sapphire Substrate, 3D nucleation
Layer, undoped GaN layer, N-type layer, multiple quantum well layer, electronic barrier layer, high temperature P-type layer and p-type contact layer,
The 3D nucleating layers include the first sublayer and the second sublayer, and first sublayer is to be grown at 800~1100 DEG C
Made of GaN layer, second sublayer be at 1000~1200 DEG C grow made of GaN layer.
Further, the thickness of the 3D nucleating layers is 2~30nm.
Further, the thickness of first sublayer is 1~10nm, and the thickness of second sublayer is 1~20nm.
Further, first sublayer is GaN layer made of being grown at 1000 DEG C, and second sublayer is 1100
GaN layer made of being grown at DEG C.
On the other hand, the present invention provides a kind of manufacturing method of gallium nitride based LED epitaxial slice, the manufactures
Method includes：
One Sapphire Substrate is provided；
In the Grown on Sapphire Substrates AlN buffer layers；
3D nucleating layers are grown on the AlN buffer layers, the 3D nucleating layers include the first sublayer and the second sublayer, described
First sublayer and second sublayer are GaN layer, and the growth temperature of first sublayer is 800~1100 DEG C, and described second
The growth temperature of sublayer is 1000~1200 DEG C；
Undoped GaN layer, N-type layer, multiple quantum well layer, electronic barrier layer, height are grown successively on the 3D nucleating layers
Warm P-type layer and p-type contact layer.
Further, described in the Grown on Sapphire Substrates AlN buffer layers, including：
The Sapphire Substrate is put into PVD equipment, one layer of AlN is sputtered in the Sapphire Substrate, is obtained described
AlN buffer layers.
Further, the growth 3D nucleating layers on the AlN buffer layers, including：
There is the Sapphire Substrate of the AlN buffer layers to be put into MOCVD device growth, in hydrogen atmosphere high temperature
It is heat-treated the Sapphire Substrate 10~15 minutes；
The 3D nucleating layers are grown on the AlN buffer layers.
Further, the manufacturing method further includes：
After the completion of the p-type contact layer is grown, temperature in the MOCVD device is reduced to 650~850 DEG C, in nitrogen
Annealing is carried out 5~15 minutes to the gallium nitride based LED epitaxial slice under gas atmosphere.
Further, the growth pressure of first sublayer and second sublayer is 200~400torr.
Further, the growth temperature of first sublayer is 1000 DEG C, and the growth temperature of second sublayer is 1100
℃。
The advantageous effect that technical solution provided in an embodiment of the present invention is brought is：
By the way that 3D nucleating layers are divided into the first sublayer and the second sublayer, the first sublayer be grown at 800~1100 DEG C and
At GaN layer, the second sublayer be at 1000~1200 DEG C grow made of GaN layer.Due to the growth pattern master of GaN epitaxy piece
If nucleus growth type, after deposition and atomic reaches Sapphire Substrate, cohesion nucleation, subsequent deposition and atomic are constantly gathered in core first
Near, so that core is constantly grown up on three-dimensional and is ultimately formed film.It is mainly slow in AlN in 3D nucleating layer growth phases
It rushes and forms nucleus on layer, and constantly grow up to form island.The growth temperature of the first sublayer is relatively low in the application, is formed by crystal grain
It is small and intensive；These crystal grain when merging into each other due to orientation it is inconsistent can in intersection, there are some gaps, can deposit
In larger surface energy, in order to reduce surface energy, crystal grain will tensile deformation make gap-closing, reduce surface energy, thus
Tensile stress is will produce, epitaxial wafer is promoted to develop to recessed direction (i.e. the direction opposite with the direction of growth of epitaxial wafer) is become, to
Improve the warpage of epitaxial wafer so that sapphire substrate surface is smooth, then heat can be evenly transferred to when growing multiple quantum well layer
Multiple quantum well layer, to improve the uniformity of emission wavelength.And epitaxial wafer entirety warpage becomes recessed, is conducive to improve multiple quantum well layer
Crystal lattice stress, to promote the photoelectric properties of light-emitting diode chip for backlight unit.The growth temperature of the second sublayer is higher in the application, then brilliant
The surface energy of grain reduces, and ensure that warpage integrally will not further occur for epitaxial wafer.
Description of the drawings
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, other are can also be obtained according to these attached drawings
Attached drawing.
Fig. 1 is a kind of structural schematic diagram of gallium nitride based LED epitaxial slice provided in an embodiment of the present invention；
Fig. 2 is a kind of flow of the preparation method of gallium nitride based LED epitaxial slice provided in an embodiment of the present invention
Figure；
Fig. 3 is a kind of warpage variation diagram of first quantum well layer of different chips provided in an embodiment of the present invention.
Specific implementation mode
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment one
An embodiment of the present invention provides a kind of gallium nitride based LED epitaxial slice, Fig. 1 is that the embodiment of the present invention provides
A kind of gallium nitride based LED epitaxial slice structural schematic diagram, as shown in Figure 1, the gallium nitride based light emitting diode includes
Sapphire Substrate 1 and the AlN buffer layers 2 being sequentially laminated in Sapphire Substrate 1,3D nucleating layers 3, undoped GaN layer 4,
N-type layer 5, multiple quantum well layer 6, electronic barrier layer 7, high temperature P-type layer 8 and p-type contact layer 9.
Wherein, 3D nucleating layers 3 include the first sublayer 31 and the second sublayer 32, and the first sublayer 31 is at 800~1100 DEG C
GaN layer made of growth, the second sublayer 32 are GaN layer made of being grown at 1000~1200 DEG C.
The embodiment of the present invention by the way that 3D nucleating layers are divided into the first sublayer and the second sublayer, the first sublayer be 800~
GaN layer made of being grown at 1100 DEG C, the second sublayer are GaN layer made of being grown at 1000~1200 DEG C.Due to GaN epitaxy
The growth pattern of piece is mainly nucleus growth type, and after deposition and atomic reaches Sapphire Substrate, cohesion nucleation, subsequent deposition are former first
Son is constantly gathered near core, and core is made constantly to grow up on three-dimensional and ultimately form film.In 3D nucleating layer growth phases,
Nucleus is mainly formed on AlN buffer layers, and constantly grows up to form island.In the application the growth temperature of the first sublayer compared with
It is low, it is small and intensive to be formed by crystal grain；These crystal grain are when merging into each other since the inconsistent of orientation can there are one in intersection
A little gaps, therefore can have larger surface energy, in order to reduce surface energy, crystal grain will tensile deformation make gap-closing, drop
Low-surface-energy thus will produce tensile stress, promote epitaxial wafer (i.e. opposite with the direction of growth of epitaxial wafer to the recessed direction of change
Direction) development, so as to improve the warpage of epitaxial wafer so that sapphire substrate surface is smooth, then heat when growing multiple quantum well layer
It can be evenly transferred to multiple quantum well layer, to improve the uniformity of emission wavelength.And epitaxial wafer entirety warpage becomes recessed, is conducive to change
The crystal lattice stress of kind multiple quantum well layer, to promote the photoelectric properties of light-emitting diode chip for backlight unit.The life of second sublayer in the application
Long temperature is higher, then the surface energy of crystal grain reduces, and ensure that warpage integrally will not further occur for epitaxial wafer.
Further, the thickness of 3D nucleating layers 3 is 2~30nm.If the thickness of 3D nucleating layers 3 is less than 2nm, 3D nucleating layers
3 is bad for the improvement of the warpage of epitaxial wafer, if the thickness of 3D nucleating layers 3 is more than 30nm, causes to waste.
Wherein, the thickness of the first sublayer 31 is 1~10nm, and the thickness of the second sublayer 32 is 1~20nm.
Preferably, the thickness of 3D nucleating layers 3 is 15nm.Wherein, the thickness of the first sublayer 31 is 5nm, the second sublayer 32
Thickness is 10nm.The first sublayer 31 and the second sublayer 32 are best for the improvement of the warpage of epitaxial wafer at this time.
Preferably, the first sublayer 31 be at 1000 DEG C grow made of undoped GaN layer, the second sublayer 32 be
Undoped GaN layer made of being grown at 1100 DEG C.At this point, best for the improvement of the warpage of epitaxial wafer.
Optionally, the growth pressure of the first sublayer 31 and the second sublayer 32 is 200~400torr.
Optionally, the thickness of undoped GaN layer 4 is 1~5 μm.
Optionally, the thickness of N-type layer 5 is 1~5 μm, and N-type layer 5 be to mix the GaN layer of Si, the doping concentration of Si can for 1 ×
1018~1 × 1019cm-3。
Optionally, multiple quantum well layer 6 is the superlattice structure for including InGaN potential well layers and GaN barrier layers, multiple quantum well layer
6 periodicity is 5~11.Wherein, the thickness of every layer of InGaN potential well layer is 2-3nm, the thickness of every layer of GaN barrier layer is 9~
20nm。
Optionally, electronic barrier layer 7 is the Al that thickness is 20~100nmyGa1-yN layers, 0.1 ＜ y ＜ 0.5.
Optionally, high temperature P-type layer 8 is the GaN layer that thickness is 100~800nm.
Optionally, p-type contact layer 9 is the GaN layer that thickness is 5~300nm.
Embodiment two
An embodiment of the present invention provides a kind of manufacturing methods of gallium nitride based LED epitaxial slice, are suitable for embodiment
A kind of one gallium nitride based LED epitaxial slice provided, Fig. 2 is a kind of gallium nitride base light emitting provided in an embodiment of the present invention
The flow chart of the preparation method of diode epitaxial slice, as shown in Fig. 2, the manufacturing method includes：
Step 201 provides a Sapphire Substrate.
Specifically, Sapphire Substrate is sapphire, thickness 630-650um.
In the present embodiment, using Veeco K465i or C4MOCVD (Metal Organic Chemical Vapor
Deposition, metallo-organic compound chemical gaseous phase deposition) equipment realize LED growing method.Using high-purity H2(hydrogen)
Or high-purity N2(nitrogen) or high-purity H2And high-purity N2Mixed gas as carrier gas, high-purity N H3As the sources N, trimethyl gallium (TMGa)
And triethyl-gallium (TEGa) is used as gallium source, trimethyl indium that indium source, silane (SiH4) is used as within (T minutes) to be used as N type dopant, front three
Base aluminium (TMAl) is used as silicon source, two luxuriant magnesium (CP2Mg) it is used as P-type dopant.Chamber pressure is 100-600torr.
Specifically, which includes：
In a hydrogen atmosphere, high-temperature process Sapphire Substrate 5-20 minutes.Wherein, reaction chamber temperature is 1000-1200 DEG C,
Chamber pressure control carries out nitrogen treatment in 200-500torr, to Sapphire Substrate.
Step 202, on a sapphire substrate growing AIN buffer layer.
Specifically, step 202 may include：After the completion of Sapphire Substrate high-temperature process, Sapphire Substrate is put into PVD
In equipment, one layer of AlN is sputtered in the Sapphire Substrate, obtains AlN buffer layers.
When growing AIN buffer layer, growth temperature can be 500-700 DEG C.
Further, after having grown AlN buffer layers, reaction chamber temperature is increased to 1000-1100 DEG C, will be coated with AlN bufferings
The Sapphire Substrate of layer makes annealing treatment 10-15 minutes.
Step 203 grows 3D nucleating layers on AlN buffer layers.
Specifically, step 203 may include：There is the Sapphire Substrate of AlN buffer layers to be put into MOCVD device growth,
It is heat-treated Sapphire Substrate 10~15 minutes in hydrogen atmosphere high temperature, 3D nucleating layers are grown on AlN buffer layers.
In the present embodiment, 3D nucleating layers include the first sublayer and the second sublayer, and the first sublayer is GaN layer, growth temperature
It it is 800~1100 DEG C, the second sublayer is GaN layer, and growth temperature is 1000~1200 DEG C.
Preferably, the growth temperature of the first sublayer is 900~1100 DEG C, and the growth temperature of the second sublayer is 1000~1200
℃。
It is highly preferred that the growth temperature of the first sublayer is 1000 DEG C, the growth temperature of the second sublayer is 1100 DEG C.In the temperature
Degree the first sublayer and the second sublayer grown for the improvement of the crystal lattice stress of multiple quantum well layer best, LED chip
Photoelectric properties it is best.
Further, the growth pressure of the first sublayer and the second sublayer is 200~400torr.
Further, the thickness of 3D nucleating layers is 1~30nm.If the thickness of 3D nucleating layers is less than 1nm, 3D nucleating layers pair
It is bad in the improvement of the warpage of epitaxial wafer, if the thickness of 3D nucleating layers is more than 30nm, cause to waste.
Preferably, the thickness of the first sublayer is 1~10nm, and the thickness of the second sublayer is 1~20nm.
Preferably, the thickness of 3D nucleating layers 3 is 15nm.Wherein, the thickness of the first sublayer 31 is 5nm, the second sublayer 32
Thickness is 10nm.The first sublayer 31 and the second sublayer 32 are best for the improvement of the warpage of epitaxial wafer at this time.
Step 204 grows undoped GaN layer on 3D nucleating layers.
In the present embodiment, the thickness of undoped GaN layer is 1~5um.When growing undoped GaN layer, room temperature is reacted
Degree is 1000~1100 DEG C, and chamber pressure is controlled in 100~500torr.
Step 205 grows N-type layer in undoped GaN layer.
In the present embodiment, N-type layer is to mix the GaN layer of Si, and thickness is 1~5um.When growing N-type layer, reaction chamber temperature is
1000-1200 DEG C, chamber pressure is controlled in 100-500torr.Wherein, the doping concentration of Si is 1 × 1018~1 × 1019cm-3。
Step 206：Multiple quantum well layer is grown in N-type layer.
Multiple quantum well layer is the superlattice structure for including InGaN potential well layers and GaN barrier layers, the periodicity of multiple quantum well layer
It is 5~11.Wherein, the growth temperature of InGaN potential well layers is 720~829 DEG C, and growth pressure is 100~500Torr, thickness 2
The growth temperature of~3nm, GaN barrier layer is 850~959 DEG C, and growth pressure is 100~500Torr, and thickness is 9~20nm.
Step 207：Electronic barrier layer is grown on multiple quantum well layer.
Optionally, electronic barrier layer AlyGa1-yN layers, 0.1 ＜ y ＜ 0.5, growth temperature is 200~1000 DEG C, growth
Pressure is 50~500Torr, and growth thickness is 20~100nm.
Step 208 grows high temperature P-type layer on electronic barrier layer.
Optionally, high temperature P-type layer is GaN layer, and growth temperature is 600~1000 DEG C, growth pressure 100-300Torr,
Thickness is 100~800nm.
Step 209, the growing P-type contact layer in high temperature P-type layer.
Optionally, p-type contact layer is GaN layer, and growth temperature is 850~1050 DEG C, and growth pressure is 100~300Torr,
Thickness is 5~300nm.
After the growth for terminating gallium nitride based LED epitaxial slice, temperature in MOCVD device is reduced to 650~
850 DEG C, annealing is carried out 5~15 minutes to the gallium nitride based LED epitaxial slice in a nitrogen atmosphere.It then, will be warm
Degree is gradually decreased to room temperature.Then, the core of single 9*27mil is made through over cleaning, deposition, lithography and etching subsequent machining technology
Piece.
Fig. 3 is a kind of warpage variation diagram of first quantum well layer of different chips provided in an embodiment of the present invention, such as Fig. 3
It is shown, wherein first quantum well layer is a quantum well layer in multiple quantum well layer near N-type layer, the warpage variation diagram
Ordinate indicate that warp value, abscissa indicate sample number, wherein 1-15 is the core that is manufactured using the prior art
Piece sample, the 16-30 chip samples to be manufactured using the manufacturing method in embodiment two.Referring to Fig. 3, line segment A tables
Show the mean value of the warp value of first Quantum Well in the multiple chips manufactured using manufacturing method in the prior art, line
Point near section A is sticking up for first Quantum Well in the multiple chips manufactured using real manufacturing method in the prior art
Song value, line segment B indicate sticking up for first Quantum Well in the multiple chips manufactured using the manufacturing method in embodiment two
The mean value of song value, the point near line segment B are first in the multiple chips manufactured using the manufacturing method in embodiment two
The warp value of a Quantum Well.
The value of its middle conductor A is positive value, indicates that first Quantum Well becomes convex, the value of line segment B is negative value, is indicated
First Quantum Well becomes recessed.When epitaxial wafer entirety warpage become it is recessed, be conducive to improve multiple quantum well layer crystal lattice stress, promoted LED
The photoelectric properties of chip.The photoelectric properties of the multiple chips then manufactured using the manufacturing method in embodiment two are best.
The foregoing is merely a prefered embodiment of the invention, is not intended to limit the invention, all in the spirit and principles in the present invention
Within, any modification, equivalent replacement, improvement and so on should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of gallium nitride based LED epitaxial slice, the gallium nitride based LED epitaxial slice includes sapphire lining
Bottom and the AlN buffer layers being cascading in the Sapphire Substrate, 3D nucleating layers, undoped GaN layer, N-type
Layer, multiple quantum well layer, electronic barrier layer, high temperature P-type layer and p-type contact layer, which is characterized in that
The 3D nucleating layers include the first sublayer and the second sublayer, and first sublayer is to be grown at 800~1100 DEG C
GaN layer, second sublayer be at 1000~1200 DEG C grow made of GaN layer.
2. gallium nitride based LED epitaxial slice according to claim 1, which is characterized in that the thickness of the 3D nucleating layers
Degree is 2~30nm.
3. gallium nitride based LED epitaxial slice according to claim 1 or 2, which is characterized in that first sublayer
Thickness be 1~10nm, the thickness of second sublayer is 1~20nm.
4. gallium nitride based LED epitaxial slice according to claim 1 or 2, which is characterized in that first sublayer
For GaN layer made of the growth at 1000 DEG C, second sublayer is GaN layer made of being grown at 1100 DEG C.
5. a kind of manufacturing method of gallium nitride based LED epitaxial slice, which is characterized in that the manufacturing method includes：
One Sapphire Substrate is provided；
In the Grown on Sapphire Substrates AlN buffer layers；
On the AlN buffer layers grow 3D nucleating layers, the 3D nucleating layers include the first sublayer and the second sublayer, described first
Sublayer and second sublayer are GaN layer, and the growth temperature of first sublayer is 800~1100 DEG C, second sublayer
Growth temperature be 1000~1200 DEG C；
Grow undoped GaN layer, N-type layer, multiple quantum well layer, electronic barrier layer, high temperature p-type successively on the 3D nucleating layers
Layer and p-type contact layer.
6. manufacturing method according to claim 5, which is characterized in that described slow in the Grown on Sapphire Substrates AlN
Layer is rushed, including：
The Sapphire Substrate is put into PVD equipment, one layer of AlN is sputtered in the Sapphire Substrate, it is slow to obtain the AlN
Rush layer.
7. manufacturing method according to claim 5 or 6, which is characterized in that it is described on the AlN buffer layers grow 3D at
Stratum nucleare, including：
There is the Sapphire Substrate of the AlN buffer layers to be put into MOCVD device growth, at hydrogen atmosphere high temperature heat
Manage the Sapphire Substrate 10~15 minutes；
The 3D nucleating layers are grown on the AlN buffer layers.
8. manufacturing method according to claim 7, which is characterized in that the manufacturing method further includes：
After the completion of the p-type contact layer is grown, temperature in the MOCVD device is reduced to 650~850 DEG C, in nitrogen gas
Annealing is carried out 5~15 minutes to the gallium nitride based LED epitaxial slice under atmosphere.
9. manufacturing method according to claim 5 or 6, which is characterized in that first sublayer and second sublayer
Growth pressure is 200~400torr.
10. manufacturing method according to claim 5 or 6, which is characterized in that the growth temperature of first sublayer is 1000
DEG C, the growth temperature of second sublayer is 1100 DEG C.
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| CN109545918A (en) * | 2018-09-27 | 2019-03-29 | 华灿光电（浙江）有限公司 | A kind of gallium nitride based LED epitaxial slice and preparation method thereof |
| CN109659407A (en) * | 2018-10-31 | 2019-04-19 | 华灿光电(苏州）有限公司 | A kind of GaN base light emitting epitaxial wafer and preparation method thereof |
| CN109786217A (en) * | 2018-12-27 | 2019-05-21 | 华灿光电（浙江）有限公司 | A kind of manufacturing method of LED epitaxial slice |
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| CN109786217A (en) * | 2018-12-27 | 2019-05-21 | 华灿光电（浙江）有限公司 | A kind of manufacturing method of LED epitaxial slice |
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| CN111952419A (en) * | 2020-06-30 | 2020-11-17 | 华灿光电（浙江）有限公司 | Preparation method of light-emitting diode epitaxial wafer |
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| CN114093989A (en) * | 2021-09-30 | 2022-02-25 | 华灿光电（浙江）有限公司 | Deep ultraviolet light-emitting diode epitaxial wafer and manufacturing method thereof |
| CN114093989B (en) * | 2021-09-30 | 2023-11-14 | 华灿光电（浙江）有限公司 | Deep ultraviolet light-emitting diode epitaxial wafer and manufacturing method thereof |
| CN114335267A (en) * | 2022-03-14 | 2022-04-12 | 江西兆驰半导体有限公司 | Epitaxial wafer preparation method, epitaxial wafer and light emitting diode |
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