CN107170802B - 一种短路阳极soi ligbt - Google Patents
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Abstract
本发明属于功率半导体技术领域，涉及一种具有交替NP耐压缓冲层结构的短路阳极SOI LIGBT。本发明与传统的短路阳极LIGBT相比，无高浓度的场截止层，而在阳极区域引入交替分布的N型岛区和P型岛区。在正向阻断时，P型岛区完全耗尽，不全耗尽的N型岛区将起到场截止的作用。器件处于单极模式导通时，受到P型岛区电子势垒阻挡，漂移区内电子电流流经N型岛区，以及岛区与阳极结构之间的高阻漂移区，最后被N+阳极收集。本发明的有益效果为，相比于传统LIGBT，具有更快的关断速度和和损耗；相比于传统的具有连续场截止层的短路阳极LIGBT，本发明在更小的纵向元胞尺寸下消除了电压折回现象。
Description
技术领域
本发明属于功率半导体技术领域，涉及一种短路阳极SOI LIGBT(LateralInsulated Gate Bipolar Transistor，横向绝缘栅双极型晶体管)。
背景技术
IGBT具有场效应晶体管高速开关及电压驱动的特性，同时具备双极晶体管低饱和电压的特性及易实现较大电流的能力。横向IGBT(LIGBT)易于集成在功率集成电路中，尤其是SOI基LIGBT可完全消除体硅LIGBT衬底空穴电子对注入，且采用介质隔离的SOI技术易实现器件的完全电气隔离，促使SOI LIGBT广泛应用于电力电子、工业自动化、航空航天等高新技术产业。
IGBT在关态时，阳极区的电子势垒迫使存储在漂移区的载流子通过复合消失，使得IGBT的关断速度减慢。而短路阳极技术是在阳极端引入N型阳极区，存储在漂移区内的大量电子可通过其快速抽取，电流拖尾时间减小，关断速度加快，从而小其关断损耗，进而也获得导通压降和关断损耗的良好折衷。但短路阳极结构的引入，使得器件处于单极模式时，流经漂移区的电流均为电子电流，电子电流由N型集电区收集，形成MOSFET导通模式。而当器件集电极和发射极之间电压增大至使得集电区PN结(P型集电区与N型场截止区构成的PN结)开启时，大量空穴开始注入漂移区发生电导调制效应，器件的正向导通电压大幅降低，形成IGBT导通模式。由于MOSFET模式到IGBT模式的转换带来的电导调制作用，给器件带来电压折回效应，影响器件电流分布的均匀性。本发明提出一种新型的短路阳极结构，可在小元胞尺寸下消除电压折回效应，同时获得低导通压降和低关断损耗。
发明内容
本发明的目的，就是针对上述问题，提出一种具有交替NP耐压缓冲层结构的短路阳极SOI LIGBT。
本发明的技术方案是：
一种短路阳极SOI LIGBT，包括自下而上依次层叠设置的P衬底1、埋氧层2和顶部半导体层；沿器件横向方向，所述的顶部半导体层从器件一侧到另一侧依次具有阴极结构、P阱区4、N漂移区3和阳极结构；所述阴极结构包括P+体接触区6和N+阴极区5，所述P+体接触区6的底部与埋氧层2接触，所述N+阴极区5位于P阱区4上层，且N+阴极区5与P+体接触区6和P阱区4接触，P+体接触区6与P阱区4接触；P+体接触区6和N+阴极区5的共同引出端为阴极；所述P阱区4与N漂移区3接触；在所述N+阴极区5与N漂移区3之间的P阱区4上表面具有栅极结构；所述栅极结构包括栅介质7和覆盖在栅介质7之上的栅多晶硅8，栅多晶硅8的引出端为栅电极；所述阳极结构包括沿器件纵向方向交替排列的P+阳极区9和N+阳极区10，所述P+阳极区9和N+阳极区10与N漂移区3和埋氧层2接触，所述P+阳极区9和N+阳极区10的共同引出端为阳极；
其特征在于，还包括N型岛区11和P型岛区12，所述N型岛区11和P型岛区12位于P+阳极区9和N+阳极区10靠近阴极结构的一侧，沿器件纵向方向，所述N型岛区11和P型岛区12交替排列，且N型岛区11和P型岛区12的底部与埋氧层2接触。
上述方案中，所述器件横向方向与器件纵向方向位于同一水平面且相互垂直，与器件垂直方向构成三维直角坐标系，与图1中对应的是，器件横向方向对应X轴，器件垂直方向对应Y轴，器件纵向方向对应Z轴。
进一步的，所述N型岛区11和P型岛区12与P+阳极区9和N+阳极区10在横向上被N漂移区3间隔。
进一步的，所述N型岛区11和P型岛区12在横向上与P+阳极区9或N+阳极区10相接触。
进一步的，所述阳极结构中的P型岛区12沿器件纵向方向上的宽度相等。
进一步的，所述P型岛区12沿器件纵向方向上的宽度不相等，且其纵向间距在越靠近N+阳极区10处越大。
本发明的有益效果为，相比于传统LIGBT，具有更快的关断速度和和损耗；相比于传统的具有连续场截止层的短路阳极LIGBT，本发明在更小的纵向元胞尺寸下消除了电压折回现象，且易与功率集成电路的高低压器件工艺兼容，制作成本低。
附图说明
图1为本发明提出的实施例1元胞结构示意图；
图2为本发明提出的实施例2元胞结构示意图；
图3为本发明提出的实施例3元胞结构示意图；
图4为本发明提出的实施例4元胞结构示意图。
具体实施方式
下面结合附图和实施例，详细描述本发明的技术方案：
实施例1
如图1所示，本例的结构包括自下而上依次层叠设置的P衬底1、埋氧层2和顶部半导体层；沿器件横向方向，所述的顶部半导体层从器件一侧到另一侧依次具有阴极结构、P阱区4、N漂移区3和阳极结构；所述阴极结构包括P+体接触区6和N+阴极区5，所述P+体接触区6的底部与埋氧层2接触，所述N+阴极区5位于P阱区4上层，且N+阴极区5与P+体接触区6和P阱区4接触，P+体接触区6与P阱区4接触；P+体接触区6和N+阴极区5的共同引出端为阴极；所述P阱区4与N漂移区3接触；在所述N+阴极区5与N漂移区3之间的P阱区4上表面具有栅极结构；所述栅极结构包括栅介质7和覆盖在栅介质7之上的栅多晶硅8，栅多晶硅8的引出端为栅电极；所述阳极结构包括沿器件纵向方向交替排列的P+阳极区9和N+阳极区10，所述P+阳极区9和N+阳极区10与N漂移区3和埋氧层2接触，所述P+阳极区9和N+阳极区10的共同引出端为阳极；还包括N型岛区11和P型岛区12，所述N型岛区11和P型岛区12位于P+阳极区9和N+阳极区10靠近阴极结构的一侧，沿器件纵向方向，所述N型岛区11和P型岛区12交替排列，且N型岛区11和P型岛区12的底部与埋氧层2接触；本例中P型岛区12沿器件纵向方向上的宽度相等。
本例的工作原理为：
本例所示的器件无高浓度的场截止层，而在阳极区域引入交替分布的N型岛区和P型岛区，NP交替结构不仅起到场截止的作用，而且使电子电流路径的重新分配，增加了阳极分布电阻，使器件在较小电流下进入双极模式，有效抑制电压折回现象。
实施例2
如图2所示，本例与实施例1的结构相比，区别在于本例中P型岛区12沿器件纵向方向上的宽度不相等，可在更小的纵向元胞尺寸下消除snapback效应。
实施例3
如图3所示，本例与实施例1的结构相比，区别在于本例中N型岛区11和P型岛区12与P+阳极区9和N+阳极区10是相互接触的。
实施例4
如图4所示，本例与实施例2的结构相比，区别在于本例中N型岛区11和P型岛区12与P+阳极区9和N+阳极区10是相互接触的且P型岛区12沿器件纵向方向上的宽度不相等。与实施例3相比，本例可在更小的纵向元胞尺寸下消除snapback效应。
Claims (4)
1.一种具有交替NP耐压缓冲层结构的短路阳极SOILIGBT，包括自下而上依次层叠设置的P衬底(1)、埋氧层(2)和顶部半导体层；所述的顶部半导体层具有N漂移区(3)，N漂移区(3)一侧有P阱区(4)，另一侧为阳极结构；N+阴极区(5)和P+体接触区(6)位于所述P阱区(4)的上表面，所述N+阴极区(5)位于靠近阳极结构一侧，所述N+阴极区(5)和P+体接触区(6)相互接触且共同引出端为阴极；所述的N+阴极区(5)和N漂移区(3)之间的P阱区(4)上表面为栅极结构；所述栅极结构包括栅介质层(7)和覆盖在栅介质层(7)之上的栅多晶硅(8)，栅多晶硅(8)的引出端为栅电极；所述阳极结构包括沿器件纵向交替排列的P+阳极区(9)和N+阳极区(10)，所述P+阳极区(9)和N+阳极区(10)位于埋氧层(2)上层，所述P+阳极区(9)和N+阳极区(10)的共同引出端为阳极；
其特征在于，所述阳极结构还包括N型岛区(11)和P型岛区(12)，所述N型岛区(11)和P型岛区(12)位于P+阳极区(9)和N+阳极区(10)靠近阴极结构的一侧，所述N型岛区(11)和P型岛区(12)沿器件纵向交替排列，且N型岛区(11)和P型岛区(12)的底部与埋氧层(2)接触；所述N型岛区(11)和P型岛区(12)在横向上与P+阳极区(9)或N+阳极区(10)相接触。
2.根据权利要求1所述的一种具有交替NP耐压缓冲层结构的短路阳极SOILIGBT，其特征在于，所述N型岛区(11)和P型岛区(12)与P+阳极区(9)和N+阳极区(10)之间为N漂移区(3)。
3.根据权利要求1所述的一种具有交替NP耐压缓冲层结构的短路阳极SOILIGBT，其特征在于，所述阳极结构中的P型岛区(12)沿器件纵向方向上的宽度均相等。
4.根据权利要求1所述的一种具有交替NP耐压缓冲层结构的短路阳极SOILIGBT，其特征在于，所述阳极结构中的P型岛区(12)沿器件纵向方向上的宽度不相等，且其纵向间距越靠近N+阳极区(10)处越大。
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