CN107085487B - Array substrate, display panel and display device - Google Patents

Array substrate, display panel and display device Download PDF

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CN107085487B
CN107085487B CN201710299156.8A CN201710299156A CN107085487B CN 107085487 B CN107085487 B CN 107085487B CN 201710299156 A CN201710299156 A CN 201710299156A CN 107085487 B CN107085487 B CN 107085487B
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pixel
touch
electrode
base plate
thin film
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CN107085487A (en
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吴昊
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Xiamen Tianma Microelectronics Co Ltd
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Xiamen Tianma Microelectronics Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/13338Input devices, e.g. touch panels
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412Digitisers structurally integrated in a display

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Human Computer Interaction (AREA)
  • Microelectronics & Electronic Packaging (AREA)

Abstract

The embodiment of the invention discloses an array substrate, a display panel and a display device. The array substrate includes: a substrate base plate; the pixel unit comprises a plurality of pixel units, a plurality of scanning lines and a plurality of data lines, wherein each pixel unit comprises a thin film transistor and a pixel electrode; the touch control device comprises a plurality of touch control electrodes, a plurality of touch control wires and a plurality of pixel areas, wherein the touch control electrodes are provided with a plurality of openings, and the projections of the pixel electrodes and the drain electrodes of the thin film transistors, which are electrically connected, on a substrate base plate are positioned in the projections of the openings on the substrate base plate; the plurality of compensation wires and the plurality of touch control wires are arranged at the same layer, and the plurality of compensation wires are electrically connected with the touch control electrodes adjacent to the compensation wires; the compensation routing covers partial areas of the data lines which are not covered by the touch routing; in the pixel area, the touch-control routing and the compensation routing are positioned at two opposite sides of the electric connection position of the pixel electrode and the drain electrode of the thin film transistor. The array substrate provided by the embodiment of the invention can improve the display effect of the liquid crystal display panel.

Description

Array substrate, display panel and display device
Technical Field
The embodiment of the invention relates to a liquid crystal display technology, in particular to an array substrate, a display panel and a display device.
Background
The liquid crystal display panel is a display panel made of liquid crystal materials, has the characteristics of lightness, thinness, low power consumption, large display information amount and the like, and is widely applied to mobile phones, televisions, computers, intelligent wearable equipment, information inquiry machines in public halls and the like.
The conventional liquid crystal display panel usually includes a plurality of pixel units, a plurality of data lines, a plurality of touch traces, and a plurality of touch electrodes arranged in an array. The pixel unit includes a thin film transistor and a pixel electrode. The plurality of touch routing covers part of the data lines. Each touch electrode is electrically connected with at least one touch wire. Often, a plurality of openings are disposed on the touch electrode, and each opening corresponds to two adjacent pixel units, so that the pixel electrode and the drain electrode of the thin film transistor are electrically connected at the opening. The opening exposes a part of the touch control wiring and the data line. In a display time period, coupling capacitances formed by the pixel electrode and the data lines on the two sides of the pixel electrode are not equal in the same pixel unit around the opening, and in a column inversion driving mode, the coupling capacitances formed by the pixel electrode and the data lines on the two sides of the pixel electrode cannot be mutually offset, so that a signal crosstalk phenomenon occurs in the liquid crystal display panel, and the display effect of the liquid crystal display panel is influenced.
Disclosure of Invention
The invention provides an array substrate, a display panel and a display device, and aims to improve the display effect of a liquid crystal display panel.
In a first aspect, an embodiment of the present invention provides an array substrate, including:
a substrate base plate;
the pixel unit comprises a plurality of pixel units, a plurality of scanning lines and a plurality of data lines, wherein the pixel units are formed on the substrate, the plurality of scanning lines and the plurality of data lines are insulated and crossed to define a plurality of pixel areas, and the pixel units are positioned in the pixel areas; the pixel unit comprises a thin film transistor and a pixel electrode; the pixel electrode is electrically connected with the drain electrode of the thin film transistor;
the touch control device comprises a plurality of touch control electrodes arranged in an array and a plurality of touch control wires covering part of the data wires, wherein each touch control electrode is electrically connected with at least one touch control wire; the touch-control wiring is positioned on one side, away from the substrate base plate, of the data lines and insulated from the data lines, the pixel electrode is positioned on one side, away from the substrate base plate, of the touch-control electrode, a plurality of openings are formed in the touch-control electrode, and the projection, on the substrate base plate, of the pixel electrode, which is electrically connected with the drain electrode of the thin film transistor, is positioned in the projection of the opening on the substrate base plate;
the plurality of compensation wires and the plurality of touch control wires are arranged on the same layer, and the plurality of compensation wires are electrically connected with the touch control electrodes adjacent to the compensation wires; the compensation routing covers a partial area of the data line which is not covered by the touch routing; in the pixel area, the touch-control routing and the compensation routing are located on two opposite sides of the electric connection position of the pixel electrode and the drain electrode of the thin film transistor.
Further, in the pixel unit, the pixel electrode and the drain of the thin film transistorThe distance between the electric connection position of the pixel electrode and the drain electrode of the thin film transistor and the adjacent touch wiring is S1The distance between the electric connection position of the pixel electrode and the drain electrode of the thin film transistor and the adjacent compensation wiring is S2,S1=S2
Furthermore, the touch electrode is electrically connected with the corresponding touch routing through a first via hole or a first bridge structure; the first bridge-spanning structure and the pixel electrode are arranged on the same layer.
Furthermore, the compensation trace is electrically connected with the corresponding touch electrode through a second via hole or a second bridge spanning structure; the second bridge spanning structure and the pixel electrode are arranged on the same layer.
Further, in the display stage, the touch electrode is reused as a common electrode.
Further, the opening comprises a first opening structure;
the first opening structures are arranged in one-to-one correspondence with the pixel units;
in the pixel unit, the projection of the pixel electrode electrically connected with the drain electrode of the thin film transistor on the substrate base plate is positioned in the projection of the first opening structure on the substrate base plate;
the projection of the first opening structure on the substrate base plate is positioned in the projection of the pixel unit corresponding to the first opening structure on the substrate base plate.
Further, the opening comprises a second opening structure;
each second opening structure is arranged corresponding to two adjacent pixel units in the same row;
projections of the pixel electrodes of two adjacent pixel units and the drain electrode electric connection positions of the thin film transistors on the substrate base plate are positioned in the projections of the second opening structures corresponding to the pixel electrodes on the substrate base plate;
the second opening structure exposes a part of the touch-control routing between the two corresponding pixel units.
Further, the opening comprises a third opening structure;
the third opening structure is located between two adjacent rows of the pixel units, and the pixel electrodes of the pixel units in the same row covered by the touch electrode and the projections of the drain electrodes of the thin film transistors on the substrate base plate are located in the projections of the third opening structure on the substrate base plate.
In a second aspect, an embodiment of the present invention further provides a display panel, where the display panel includes any one of the array substrates provided in the embodiments of the present invention, and an opposite substrate disposed opposite to the array substrate.
In a third aspect, an embodiment of the present invention further provides a display device, where the display device includes any one of the display panels provided in the embodiments of the present invention.
According to the embodiment of the invention, a plurality of compensation wires are additionally arranged on the array substrate, and are arranged at the same layer as the plurality of touch control wires, and the plurality of compensation wires are electrically connected with the touch control electrodes adjacent to the compensation wires; the compensation routing covers partial areas of the data lines which are not covered by the touch routing; in the pixel region, the touch-control trace and the compensation trace are positioned at two opposite sides of the electric connection position of the pixel electrode and the drain electrode of the thin film transistor, the difference between the coupling capacitances formed by the pixel electrode around the opening and the data lines on both sides thereof can be sufficiently reduced, so that the coupling capacitances formed by the pixel electrode and the data lines at two sides of the pixel electrode are mutually offset as much as possible in the column inversion driving mode, the signal crosstalk phenomenon of the liquid crystal display panel is eliminated, the problem that the coupling capacitances formed by the pixel electrode and the data lines at two sides of the pixel electrode are not equal in the same pixel unit around the opening in the existing liquid crystal display panel is solved, in a column inversion driving mode, coupling capacitances formed by the pixel electrodes and the data lines on the two sides of the pixel electrodes cannot be mutually offset, so that the liquid crystal display panel is easy to generate a signal crosstalk phenomenon to influence the display effect of the liquid crystal display panel, and the purpose of improving the display effect of the liquid crystal display panel is achieved.
Drawings
FIG. 1a is a schematic view of a conventional structure of an array substrate in an LCD panel;
FIG. 1b is a schematic cross-sectional view taken along line A1-A2 in FIG. 1 a;
FIG. 1c is an equivalent circuit diagram of a pixel unit in a liquid crystal display panel;
FIG. 1d is a schematic diagram of a pixel cell in the prior art;
fig. 2a is a schematic structural diagram of an array substrate in an lcd panel according to an embodiment of the present invention;
FIG. 2B is a schematic cross-sectional view taken along line B1-B2 in FIG. 2 a;
FIG. 2c is a schematic diagram of the pixel cell of FIG. 2 a;
FIG. 3a is a schematic cross-sectional view taken along line D1-D2 in FIG. 2 a;
FIG. 3b is a schematic cross-sectional view of an array substrate of an LCD panel according to another embodiment of the present invention;
fig. 4a is a schematic cross-sectional view illustrating an array substrate of a liquid crystal display panel according to another embodiment of the present invention;
FIG. 4b is a schematic cross-sectional view illustrating an array substrate of an LCD panel according to another embodiment of the present invention;
fig. 5a is a schematic structural diagram of an array substrate in a liquid crystal display panel according to another embodiment of the present invention;
FIG. 5b is a schematic cross-sectional view taken along line E1-E2 in FIG. 5 a;
fig. 6a is a schematic structural diagram of an array substrate in a liquid crystal display panel according to another embodiment of the present invention;
FIG. 6b is a schematic cross-sectional view taken along line F1-F2 in FIG. 6 a;
fig. 7 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1a is a schematic structural diagram of an array substrate in a conventional liquid crystal display panel, and fig. 1b is a schematic structural diagram of a cross-section taken along a1-a2 in fig. 1 a. Referring to fig. 1a and 1b, the array substrate includes a substrate 10, a plurality of pixel units 11 and a plurality of scan lines 12 and a plurality of data lines 13 formed on the substrate 10, a plurality of touch electrodes 14 (only one touch electrode 14 is exemplarily shown in fig. 1 a) arranged in an array, and a plurality of touch traces 15 covering a portion of the data lines 13. The plurality of scan lines 12 and the plurality of data lines 13 are insulated and crossed to define a plurality of pixel regions (fig. 1b exemplarily includes four pixel regions, respectively a first pixel region P1, a second pixel region P2, a third pixel region P3 and a fourth pixel region P4), the pixel unit 11 is located in the pixel regions; the pixel unit 11 includes a thin film transistor (only an active layer 111 of the thin film transistor is exemplarily shown in fig. 1a, and an active layer 111 and a drain electrode 113 of the thin film transistor are shown in fig. 1 b) and a pixel electrode 112; the pixel electrode 112 is electrically connected to the drain electrode 113 of the thin film transistor; each touch electrode 14 is electrically connected with at least one touch trace 15; the plurality of touch traces 15 are located on the side of the plurality of data lines 13 away from the substrate 10, the plurality of touch traces 15 are insulated from the plurality of data lines 13, the pixel electrode 112 is located on the side of the touch electrode 14 away from the substrate 10, the touch electrode 14 is provided with a plurality of openings 141, and the projection of the pixel electrode 112 and the drain electrode 113 of the thin film transistor T, which is electrically connected 1121 on the substrate 10, is located within the projection of the opening 141 on the substrate 10.
Referring to fig. 1a and 1b, on the array substrate, a data line 13 is disposed between two adjacent pixel regions, but a touch trace 15 is disposed between only a part of two adjacent pixel regions. For example, in fig. 1b, the touch trace 15 is disposed between the first pixel region P1 and the second pixel region P2, but the touch trace 15 is not disposed between the second pixel region P2 and the third pixel region P3.
Since the pixel electrode 112 and the drain 113 of the thin film transistor are respectively located at two opposite sides of the touch electrode 14, in order to electrically connect the pixel electrode 112 and the drain 113 of the thin film transistor, an opening 141 is often required to be formed in the touch electrode 14. With reference to fig. 1b, on the array substrate, two types of openings 141, namely a first opening structure 141a and a second opening structure 141b, are disposed on the touch electrode 14. For example, the first opening structure 141a is disposed on the touch electrode 14 at a position corresponding to the first pixel region P1 and the second pixel region P2. The touch electrode 14 is provided with a second opening structure 141b at a position corresponding to the third pixel region P3. The first opening structure 141b exposes the drain 113 of the tft in the first pixel region P1 and the second pixel region P2, and a portion of the data line 13 and a portion of the touch trace 15 between the first pixel region P1 and the second pixel region P2.
Fig. 1c is an equivalent circuit diagram of a pixel unit in a liquid crystal display panel, and fig. 1d is a schematic diagram of an array substrate in the prior art. Taking the first pixel region P1 as an example, referring to fig. 1a, 1b, 1c and 1d, only the data line 13 is disposed on the left side of the pixel electrode 112 (the reverse direction of the X axis in fig. 1a is taken as the left), and the touch trace 15 is disposed on the right side of the pixel electrode 112 (the forward direction of the X axis in fig. 1b is taken as the right) in addition to the data line 13.
Referring to fig. 1c, in the display phase, a common voltage signal is provided to the common electrode com through a driving circuit (none of which is shown in fig. 1 c), and a scanning signal is provided to the scanning line 12 to control the operating state of the thin film transistor T, so that the data signal provided by the data line 13 is written to the pixel electrode pixel in time to control the liquid crystal inversion corresponding to the pixel unit 11.
Referring to fig. 1C and 1d, the coupling capacitance between the pixel electrode 112 and the left data line 13 is C1, the capacitance between the drain 113 of the thin film transistor T electrically connected to the pixel electrode 112 and the left data line 13 is C3, and the capacitance between the left data line 13 of the pixel electrode 112 and the touch electrode 14 is C4. The capacitance between the drain 113 of the thin film transistor T electrically connected to the pixel electrode 112 and the touch electrode 14 is C5. Wherein, C1 is equal to the capacitance value of C4 and C5 connected in series and then connected in parallel with C3.
Similarly, the coupling capacitance between the pixel electrode 112 and the right data line 13 is C2, the capacitance between the tft T drain 113 electrically connected to the pixel electrode 112 and the right data line 13 is C6, and the capacitance between the right data line 13 of the pixel electrode 112 and the touch trace 15 is C7. The capacitance between the drain 113 of the thin film transistor T electrically connected to the pixel electrode 112 and the touch trace 15 is C8. Wherein, C2 is equal to the capacitance value of C7 and C8 connected in series and then connected in parallel with C6.
Since the distance between the touch electrode 14 and the drain 113 and the distance between the drain 113 and the touch trace 15 are larger, the capacitance values of the series connection of C4 and C5 are larger than the capacitance values of the series connection of C7 and C8, and C3 is equal to C6, so that the differences between C1 and C2 are larger, that is, the difference between the coupling capacitance C1 between the pixel electrode 112 and the left data line 13 thereof and the coupling capacitance C2 between the pixel electrode 112 and the right data line 13 thereof is larger. In the column inversion driving mode, the coupling capacitances formed by the pixel electrode 112 and the data lines 13 on both sides thereof cannot cancel each other, and the liquid crystal display panel is prone to signal crosstalk, which affects the display effect of the liquid crystal display panel.
Fig. 2a is a schematic structural diagram of an array substrate in an lcd panel according to an embodiment of the invention, and fig. 2B is a schematic structural diagram taken along a cross-section B1-B2 in fig. 2 a. Referring to fig. 2a and 2b, the array substrate includes: a base substrate 10; a plurality of pixel units 11 and a plurality of scan lines 12 and a plurality of data lines 13 formed on the substrate 10, the plurality of scan lines 12 and the plurality of data lines 13 are insulated and crossed to define a plurality of pixel regions (fig. 2b exemplarily includes four pixel regions, respectively a first pixel region P1, a second pixel region P2, a third pixel region P3 and a fourth pixel region P4), the pixel units 11 are located in the pixel regions; the pixel unit 11 includes a thin film transistor (only an active layer 111 of the thin film transistor is exemplarily shown in fig. 2a and 2 b) and a pixel electrode 112; the pixel electrode 112 is electrically connected to the drain electrode 113 of the thin film transistor; a plurality of touch electrodes 14 arranged in an array and a plurality of touch traces 15 covering a part of the data lines 13, wherein each touch electrode 14 is electrically connected with at least one touch trace 15; the plurality of touch traces 15 are located on the side of the plurality of data lines 13 away from the substrate base plate 10, the plurality of touch traces 15 are insulated from the plurality of data lines 13, the pixel electrode 112 is located on the side of the touch electrode 14 away from the substrate base plate 10, the touch electrode 14 is provided with a plurality of openings, and the projection of the electric connection part 1121 of the pixel electrode 112 and the drain electrode 113 of the thin film transistor on the substrate base plate 10 is located in the projection of the opening on the substrate base plate 10; the plurality of compensation wires 16, the plurality of compensation wires 16 and the plurality of touch wires 15 are arranged at the same layer, and the plurality of compensation wires 16 are electrically connected with the touch electrodes 14 adjacent to the compensation wires 16; the compensation trace 16 covers a partial area of the data line 13 which is not covered by the touch trace 15; in the pixel region, the touch trace 15 and the compensation trace 16 are located on two opposite sides of the pixel electrode 112 and the drain 113 of the thin film transistor electrically connected to the 1121.
With continued reference to fig. 2a and 2b, on the array substrate, a data line 13 is disposed between two adjacent pixel regions, a touch trace 15 is disposed between two adjacent pixel regions, and a compensation trace 16 is disposed between two adjacent pixel regions where the touch trace 15 is not disposed, so that the data line 13 and the touch trace 15, or the data line 13 and the compensation trace 16, are disposed between any two adjacent pixel regions.
Fig. 2c is a schematic view of the array substrate provided in fig. 2 a. Taking the first pixel region P1 as an example, referring to fig. 2a, 2b and 2c, the data line 13 and the compensation trace 16 are disposed on the left side of the pixel electrode 112 (the reverse direction of the X axis in fig. 2a is taken as the left), and the data line 13 and the touch trace 15 are disposed on the right side of the pixel electrode 112 (the forward direction of the X axis in fig. 2a is taken as the right). In the display stage, a common voltage signal is provided to the common electrode (not shown in fig. 2a, 2b and 2 c) through a driving circuit (not shown in fig. 2a, 2b and 2 c), and a scanning signal is provided to the scanning line 12 to control the operating state of the thin film transistor, so that the data signal provided by the data line 13 is written on the pixel electrode 112 in time to control the liquid crystal inversion corresponding to the pixel unit 11. Since the compensation trace 16 and the touch trace 15 are disposed on the same layer, both the compensation trace 16 and the touch trace 15 are electrically connected to the touch electrode 14 adjacent thereto, so that the potentials on the compensation trace 16 and the touch trace 15 are equal or almost the same; and the compensation trace 16 covers a partial area of the data line 13 not covered by the touch trace 15, and in the pixel area, the touch trace 15 and the compensation trace 16 are located at two opposite sides of the pixel electrode 112 and the drain 113 of the thin film transistor electrically connected to the 1121.
The coupling capacitance between the pixel electrode 112 and the left data line 13 is C1, the capacitance between the tft drain 113 electrically connected to the pixel electrode 112 and the left data line 13 is C3, and the capacitance between the left data line 13 of the pixel electrode 112 and the compensation trace 16 covering the same is C11. The capacitance between the compensation trace 16 and the touch electrode 14 is C12, and the capacitance between the tft drain 113 electrically connected to the pixel electrode 112 and the touch electrode 14 is C15. Wherein, C1 is equal to the capacitance value of C11, C12 and C15 which are connected in series and then connected in parallel with C3.
Similarly, the coupling capacitance between the pixel electrode 112 and the right data line 13 is C2, the capacitance between the tft drain 113 electrically connected to the pixel electrode 112 and the right data line 13 is C6, and the capacitance between the right data line 13 of the pixel electrode 112 and the touch trace 15 is C13. The capacitance between the touch trace 15 and the touch electrode 14 is C14, and the capacitance between the tft drain 113 electrically connected to the pixel electrode 112 and the touch electrode 14 is C16. Wherein, C2 is equal to the capacitance value of C13, C14 and C16 which are connected in series and then connected in parallel with C6.
Since C3 is equal to C6, the capacitance values of C13, C14 and C16 in series are not much different from the capacitance values of C11, C12 and C15 in series, i.e., the difference between the coupling capacitance C1 between the pixel electrode 112 and its left data line 13 and the coupling capacitance C2 between the pixel electrode 112 and its right data line 13 is small. In this way, in the column inversion driving mode, the coupling capacitances formed by the pixel electrode 112 and the data lines 13 on the two sides thereof are offset each other as much as possible, thereby avoiding the phenomenon of signal crosstalk of the liquid crystal display panel and improving the display effect of the liquid crystal display panel.
Optionally, referring to fig. 2b, in the pixel unit 11, around the electrically connected part 1121 between the pixel electrode 112 and the drain 113 of the thin film transistor, a distance S is set between the electrically connected part 1121 between the pixel electrode 112 and the drain 113 of the thin film transistor and the touch trace 15 adjacent thereto1The distance between the electrically connected part 1121 between the pixel electrode 112 and the drain 113 of the thin film transistor and the adjacent compensation trace 16 is S2,S1=S2. Thus is provided withThe pixel unit 22 has the advantages that the absolute value of the difference between the coupling capacitor C1 between the pixel electrode 112 and the left data line 13 and the coupling capacitor C2 between the pixel electrode 112 and the right data line 13 can be further reduced, the signal crosstalk phenomenon of the liquid crystal display panel can be relieved, and the display effect can be improved.
FIG. 3a is a schematic cross-sectional view taken along line D1-D2 in FIG. 2 a. Referring to fig. 3a, in a case that there is a structure in which at least a portion of the area where the projection of the touch electrode 14 on the substrate 10 and the projection of the touch trace 15 on the substrate 10 overlap each other during manufacturing, optionally, the touch electrode 14 is electrically connected to the corresponding touch trace 15 through the first via 171. Alternatively, as shown in fig. 3b, for a case that there is no structure of the mutually overlapping region between the projection of the touch electrode 14 on the substrate 10 and the projection of the touch trace 15 on the substrate 10, optionally, the touch electrode 14 may be further configured to be electrically connected to the corresponding touch trace 15 through the first bridge structure 172, and the first bridge structure 172 is disposed on the same layer as the pixel electrode 112. The advantage of this configuration is that the touch signal on the touch trace 15 can be transmitted to the touch electrode 14, so as to perform touch position detection by using the touch electrode 14. In addition, the first bridge spanning structure 172 and the pixel electrode 112 are arranged on the same layer, only one etching process is needed in the manufacturing process, and no mask plate needs to be manufactured on the first bridge spanning structure 172 and the pixel electrode 112 respectively, so that the cost is saved, the number of manufacturing processes is reduced, and the production efficiency is improved.
Similarly, as shown in fig. 4a, for a case where there is a structure of at least a partial mutually overlapping region between the projection of the touch electrode 14 on the substrate base plate 10 and the projection of the compensation trace 16 on the substrate base plate 10, optionally, the compensation trace 16 is electrically connected to the corresponding touch electrode 14 through the second via 181, or as shown in fig. 4b, for a case where there is no mutually overlapping region between the projection of the touch electrode 14 on the substrate base plate 10 and the projection of the compensation trace 16 on the substrate base plate 10, optionally, the compensation trace 16 is electrically connected to the corresponding touch electrode 14 through the second bridge structure 182; the second bridge structure 182 is disposed at the same layer as the pixel electrode 112. The advantage of this arrangement is to make the potential on the compensation trace 16 equal to the potential on the touch electrode 14, and thus make the potentials on the compensation trace 16 equal to the potential on the touch trace 15. In addition, the second bridge-spanning structure 182 and the pixel electrode 112 are arranged on the same layer, only one etching process is needed in the manufacturing process, and no mask plate needs to be manufactured on the second bridge-spanning structure 182 and the pixel electrode 112 respectively, so that the cost is saved, the number of manufacturing processes is reduced, and the production efficiency is improved.
Further, on the basis of the above technical solution, optionally, in the display stage, the touch electrode 14 is multiplexed as a common electrode. Thus, when the liquid crystal display panel is in the working mode of the display state, the touch electrode 14 plays a role of providing the common voltage; when the liquid crystal display panel is in the operating mode of the touch state, the touch electrode 14 performs the function of detecting the touch position. The touch electrode 14 is reused as a common electrode, so that the thickness of the liquid crystal display panel can be further reduced, in addition, only one etching process is needed in the manufacturing process, no mask plate needs to be manufactured for the touch electrode 14 and the common electrode respectively, the cost is saved, the number of manufacturing processes is reduced, and the production efficiency is improved.
In the above technical solutions, there are various designs of the openings on the touch electrodes, and a structure of a typical liquid crystal display panel will be described in detail below, but the listed examples are only for explaining the present invention and do not limit the present invention.
With continued reference to fig. 2a and 2b, in the array substrate, the opening includes a first opening structure 191; the first opening structures 191 are disposed in one-to-one correspondence with the pixel units 112; in the pixel unit 11, the projection of the part 1121, where the pixel electrode 112 is electrically connected with the drain 113 of the thin film transistor, on the substrate 10 is located in the projection of the first opening structure 191 on the substrate 10; the projection of the first opening structure 191 on the substrate base plate 10 is located within the projection of the pixel unit 11 corresponding thereto on the substrate base plate 10. In this way, since the first opening structure 191 exposes only the drain electrode 113 of the thin film transistor, and the distance between the drain electrode 113 and the pixel electrode 14 on both sides of the first opening structure is not greatly different, the difference between the coupling capacitance C1 between the pixel electrode 112 and the left data line 13 thereof and the coupling capacitance C2 between the pixel electrode 112 and the right data line 13 thereof can be reduced, and the display effect of the liquid crystal display panel can be improved.
Fig. 5a is a schematic structural diagram of an array substrate in another liquid crystal display panel according to an embodiment of the invention, and fig. 5b is a schematic structural diagram taken along a cross-section of E1-E2 in fig. 5 a. Compared to the array substrate of fig. 2a and 2b, the opening of fig. 5a and 5b further includes a second opening structure. Referring to fig. 5a and 5b, in the array substrate, the opening includes a second opening structure 192; each of the second opening structures 192 is disposed corresponding to two adjacent pixel units 11 in the same row; the projections of the electrical connection part 1121 between the pixel electrode 112 of the two adjacent pixel units 11 and the drain 113 of the thin film transistor on the substrate 10 are both located in the projection of the corresponding second opening structure 192 on the substrate 10; the second opening structure 192 exposes a portion of the touch trace 15 between two corresponding pixel units 11. Compared with the prior art, the structure of the touch electrode 14 is not modified, the touch electrode 14 of the technical scheme can be manufactured by using the original mask for manufacturing the touch electrode 14 in the production and manufacturing process, and the aim of saving the production cost on the premise of improving the display effect of the liquid crystal display panel can be fulfilled.
Fig. 6a is a schematic structural diagram of an array substrate in another liquid crystal display panel according to an embodiment of the invention, and fig. 6b is a schematic structural diagram taken along a cross-section of F1-F2 in fig. 6 a. Compared to the array substrate of fig. 5a and 5b, the opening of fig. 6a and 6b includes a third opening structure. Referring to fig. 6a and 6b, in the array substrate, the opening includes a third opening structure 193; the third opening structure 193 is located between two adjacent rows of pixel units 11, and the projections of the electrical connection parts 1121, which are covered by the same touch electrode 14, of the pixel electrodes 112 of the same row of pixel units 11 and the drain electrodes 113 of the thin film transistors on the substrate 10 are all located in the projection of the third opening structure 193 on the substrate 10. In this way, since the third opening structure 193 exposes the data lines 13, the touch traces 15 and the compensation traces 16 on both sides of the drain 113 of the tft, the interference of the touch electrodes 14 with the coupling capacitance C1 between the pixel electrodes 112 and the left data lines 13 thereof and the interference of the touch electrodes 14 with the coupling capacitance C2 between the pixel electrodes 112 and the right data lines 13 thereof can be further reduced, the difference between the coupling capacitance C1 between the pixel electrodes 112 and the left data lines 13 thereof and the coupling capacitance C2 between the pixel electrodes 112 and the right data lines 13 thereof can be further reduced, and the display effect of the liquid crystal display panel can be improved.
The embodiment of the invention also provides a display panel. Fig. 7 is a schematic structural diagram of a display panel according to an embodiment of the present invention. Referring to fig. 7, the display panel includes an array substrate 100 provided in any embodiment of the present invention and a counter substrate 200 disposed opposite to the array substrate. The opposite substrate 200 may be a color film substrate.
According to the display panel provided by the embodiment of the invention, the plurality of compensation wires are additionally arranged on the internal array substrate, the plurality of compensation wires and the plurality of touch wires are arranged at the same layer, and the plurality of compensation wires are electrically connected with the touch electrodes adjacent to the compensation wires; the compensation routing covers partial areas of the data lines which are not covered by the touch routing; in the pixel region, the touch-control trace and the compensation trace are positioned at two opposite sides of the electric connection position of the pixel electrode and the drain electrode of the thin film transistor, the difference between the coupling capacitances formed by the pixel electrode around the opening and the data lines on both sides thereof can be sufficiently reduced, so that the coupling capacitances formed by the pixel electrode and the data lines at two sides of the pixel electrode are mutually offset as much as possible in the column inversion driving mode, the signal crosstalk phenomenon of the liquid crystal display panel is eliminated, the problem that the coupling capacitances formed by the pixel electrode and the data lines at two sides of the pixel electrode are not equal in the same pixel unit around the opening in the existing liquid crystal display panel is solved, in a column inversion driving mode, coupling capacitances formed by the pixel electrodes and the data lines on the two sides of the pixel electrodes cannot be mutually offset, so that the liquid crystal display panel is easy to generate a signal crosstalk phenomenon to influence the display effect of the liquid crystal display panel, and the purpose of improving the display effect of the liquid crystal display panel is achieved.
The embodiment of the invention also provides a display device. Fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present invention. Referring to fig. 8, the display device 101 includes a display panel 201 according to any embodiment of the present invention. The display device 101 may be a mobile phone, a tablet computer, a smart wearable device, and the like.
According to the display device provided by the embodiment of the invention, the plurality of compensation wires are additionally arranged on the array substrate in the content part, the plurality of compensation wires and the plurality of touch wires are arranged at the same layer, and the plurality of compensation wires are electrically connected with the touch electrodes adjacent to the compensation wires; the compensation routing covers partial areas of the data lines which are not covered by the touch routing; in the pixel region, the touch-control trace and the compensation trace are positioned at two opposite sides of the electric connection position of the pixel electrode and the drain electrode of the thin film transistor, the difference between the coupling capacitances formed by the pixel electrode around the opening and the data lines on both sides thereof can be sufficiently reduced, so that the coupling capacitances formed by the pixel electrode and the data lines at two sides of the pixel electrode are mutually offset as much as possible in the column inversion driving mode, the signal crosstalk phenomenon of the liquid crystal display panel is eliminated, the problem that the coupling capacitances formed by the pixel electrode and the data lines at two sides of the pixel electrode are not equal in the same pixel unit around the opening in the existing liquid crystal display panel is solved, in a column inversion driving mode, coupling capacitances formed by the pixel electrodes and the data lines on the two sides of the pixel electrodes cannot be mutually offset, so that the liquid crystal display panel is easy to generate a signal crosstalk phenomenon to influence the display effect of the liquid crystal display panel, and the purpose of improving the display effect of the liquid crystal display panel is achieved.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (10)

1. An array substrate, comprising:
a substrate base plate;
the pixel unit comprises a plurality of pixel units, a plurality of scanning lines and a plurality of data lines, wherein the pixel units are formed on the substrate, the plurality of scanning lines and the plurality of data lines are insulated and crossed to define a plurality of pixel areas, and the pixel units are positioned in the pixel areas; the pixel unit comprises a thin film transistor and a pixel electrode; the pixel electrode is electrically connected with the drain electrode of the thin film transistor;
the touch control device comprises a plurality of touch control electrodes arranged in an array and a plurality of touch control wires covering part of the data wires, wherein each touch control electrode is electrically connected with at least one touch control wire; the touch-control wiring is positioned on one side, away from the substrate base plate, of the data lines and insulated from the data lines, the pixel electrode is positioned on one side, away from the substrate base plate, of the touch-control electrode, a plurality of openings are formed in the touch-control electrode, and the projection, on the substrate base plate, of the pixel electrode, which is electrically connected with the drain electrode of the thin film transistor, is positioned in the projection of the opening on the substrate base plate;
the plurality of compensation wires and the plurality of touch control wires are arranged on the same layer, and the plurality of compensation wires are electrically connected with the touch control electrodes adjacent to the compensation wires; the compensation routing covers a partial area of the data line which is not covered by the touch routing; in the pixel area, the touch-control routing and the compensation routing are positioned at two opposite sides of the electric connection position of the pixel electrode and the drain electrode of the thin film transistor, so that the difference of coupling capacitance formed by the pixel electrode around the opening and the data lines at two sides of the opening is fully reduced.
2. The array substrate of claim 1, wherein in the pixel unit, around the electrically connected position of the pixel electrode and the drain electrode of the thin film transistor, the electrically connected position of the pixel electrode and the drain electrode of the thin film transistor and the touch trace adjacent thereto have a distance S1The distance between the electric connection position of the pixel electrode and the drain electrode of the thin film transistor and the adjacent compensation wiring is S2,S1=S2
3. The array substrate of claim 1,
the touch electrode is electrically connected with the corresponding touch routing through a first via hole or a first bridge structure; the first bridge-spanning structure and the pixel electrode are arranged on the same layer.
4. The array substrate of claim 1,
the compensation routing is electrically connected with the corresponding touch electrode through a second via hole or a second bridge spanning structure; the second bridge spanning structure and the pixel electrode are arranged on the same layer.
5. The array substrate of claim 1,
and in the display stage, the touch electrode is reused as a common electrode.
6. The array substrate of claim 1,
the opening comprises a first opening structure;
the first opening structures are arranged in one-to-one correspondence with the pixel units;
in the pixel unit, the projection of the pixel electrode electrically connected with the drain electrode of the thin film transistor on the substrate base plate is positioned in the projection of the first opening structure on the substrate base plate;
the projection of the first opening structure on the substrate base plate is positioned in the projection of the pixel unit corresponding to the first opening structure on the substrate base plate.
7. The array substrate of claim 1,
the opening comprises a second opening structure;
each second opening structure is arranged corresponding to two adjacent pixel units in the same row;
projections of the pixel electrodes of two adjacent pixel units and the drain electrode electric connection positions of the thin film transistors on the substrate base plate are positioned in the projections of the second opening structures corresponding to the pixel electrodes on the substrate base plate;
the second opening structure exposes a part of the touch-control routing between the two corresponding pixel units.
8. The array substrate of claim 1,
the opening comprises a third opening structure;
the third opening structure is located between two adjacent rows of the pixel units, and the pixel electrodes of the pixel units in the same row covered by the touch electrode and the projections of the drain electrodes of the thin film transistors on the substrate base plate are located in the projections of the third opening structure on the substrate base plate.
9. A display panel comprising the array substrate according to any one of claims 1 to 8 and a counter substrate disposed opposite to the array substrate.
10. A display device characterized by comprising the display panel according to claim 9.
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