CN106981478A - Top gate type thin film transistor and preparation method thereof, array base palte, display panel - Google Patents
Top gate type thin film transistor and preparation method thereof, array base palte, display panel Download PDFInfo
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- CN106981478A CN106981478A CN201710224236.7A CN201710224236A CN106981478A CN 106981478 A CN106981478 A CN 106981478A CN 201710224236 A CN201710224236 A CN 201710224236A CN 106981478 A CN106981478 A CN 106981478A
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- light shield
- thin film
- film transistor
- shield layer
- top gate
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- 239000010409 thin film Substances 0.000 title claims abstract description 64
- 238000002360 preparation method Methods 0.000 title claims abstract description 23
- 239000000463 material Substances 0.000 claims abstract description 67
- 239000000758 substrate Substances 0.000 claims abstract description 34
- 239000010408 film Substances 0.000 claims description 30
- 229920001296 polysiloxane Polymers 0.000 claims description 29
- 239000000975 dye Substances 0.000 claims description 14
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 11
- 239000013078 crystal Substances 0.000 claims description 10
- 229910000040 hydrogen fluoride Inorganic materials 0.000 claims description 10
- 229920002120 photoresistant polymer Polymers 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 7
- 229920000734 polysilsesquioxane polymer Polymers 0.000 claims description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 5
- 239000011248 coating agent Substances 0.000 claims description 4
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- 239000002210 silicon-based material Substances 0.000 claims 2
- 238000000034 method Methods 0.000 abstract description 30
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- 239000011229 interlayer Substances 0.000 description 5
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- XAAILNNJDMIMON-UHFFFAOYSA-N 2'-anilino-6'-(dibutylamino)-3'-methylspiro[2-benzofuran-3,9'-xanthene]-1-one Chemical compound C=1C(N(CCCC)CCCC)=CC=C(C2(C3=CC=CC=C3C(=O)O2)C2=C3)C=1OC2=CC(C)=C3NC1=CC=CC=C1 XAAILNNJDMIMON-UHFFFAOYSA-N 0.000 description 3
- 229920001621 AMOLED Polymers 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 229910052733 gallium Inorganic materials 0.000 description 3
- 229910052738 indium Inorganic materials 0.000 description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
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- 239000010703 silicon Substances 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 238000000992 sputter etching Methods 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- OAZWDJGLIYNYMU-UHFFFAOYSA-N Leucocrystal Violet Chemical compound C1=CC(N(C)C)=CC=C1C(C=1C=CC(=CC=1)N(C)C)C1=CC=C(N(C)C)C=C1 OAZWDJGLIYNYMU-UHFFFAOYSA-N 0.000 description 2
- BAPJBEWLBFYGME-UHFFFAOYSA-N Methyl acrylate Chemical compound COC(=O)C=C BAPJBEWLBFYGME-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 229910001257 Nb alloy Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- BIZOUTFSXXNCGH-UHFFFAOYSA-N [N].[O].[Zn] Chemical compound [N].[O].[Zn] BIZOUTFSXXNCGH-UHFFFAOYSA-N 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
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- 239000004020 conductor Substances 0.000 description 2
- WUUZKBJEUBFVMV-UHFFFAOYSA-N copper molybdenum Chemical compound [Cu].[Mo] WUUZKBJEUBFVMV-UHFFFAOYSA-N 0.000 description 2
- 238000002425 crystallisation Methods 0.000 description 2
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- LNTHITQWFMADLM-UHFFFAOYSA-N gallic acid Chemical compound OC(=O)C1=CC(O)=C(O)C(O)=C1 LNTHITQWFMADLM-UHFFFAOYSA-N 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000002156 mixing Methods 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- DTSBBUTWIOVIBV-UHFFFAOYSA-N molybdenum niobium Chemical compound [Nb].[Mo] DTSBBUTWIOVIBV-UHFFFAOYSA-N 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000011787 zinc oxide Substances 0.000 description 2
- OAZWDJGLIYNYMU-WFGJKAKNSA-N 4-[[4-[bis(trideuteriomethyl)amino]phenyl]-[4-(dimethylamino)phenyl]methyl]-n,n-dimethylaniline Chemical compound C1=CC(N(C([2H])([2H])[2H])C([2H])([2H])[2H])=CC=C1C(C=1C=CC(=CC=1)N(C)C)C1=CC=C(N(C)C)C=C1 OAZWDJGLIYNYMU-WFGJKAKNSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-M Acrylate Chemical compound [O-]C(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-M 0.000 description 1
- VNVNLMHECHGTIC-UHFFFAOYSA-N CC1C=C(C)C(C)CC1 Chemical compound CC1C=C(C)C(C)CC1 VNVNLMHECHGTIC-UHFFFAOYSA-N 0.000 description 1
- CERQOIWHTDAKMF-UHFFFAOYSA-M Methacrylate Chemical compound CC(=C)C([O-])=O CERQOIWHTDAKMF-UHFFFAOYSA-M 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- IAQRGUVFOMOMEM-UHFFFAOYSA-N but-2-ene Chemical group CC=CC IAQRGUVFOMOMEM-UHFFFAOYSA-N 0.000 description 1
- CQEYYJKEWSMYFG-UHFFFAOYSA-N butyl acrylate Chemical compound CCCCOC(=O)C=C CQEYYJKEWSMYFG-UHFFFAOYSA-N 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000005984 hydrogenation reaction Methods 0.000 description 1
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- 238000000206 photolithography Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
- TYHJXGDMRRJCRY-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) tin(4+) Chemical compound [O-2].[Zn+2].[Sn+4].[In+3] TYHJXGDMRRJCRY-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09D—COATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
- C09D183/00—Coating compositions based on macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon, with or without sulfur, nitrogen, oxygen, or carbon only; Coating compositions based on derivatives of such polymers
- C09D183/04—Polysiloxanes
- C09D183/08—Polysiloxanes containing silicon bound to organic groups containing atoms other than carbon, hydrogen, and oxygen
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/038—Macromolecular compounds which are rendered insoluble or differentially wettable
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/075—Silicon-containing compounds
- G03F7/0757—Macromolecular compounds containing Si-O, Si-C or Si-N bonds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/126—Shielding, e.g. light-blocking means over the TFTs
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- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08G—MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
- C08G77/00—Macromolecular compounds obtained by reactions forming a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon in the main chain of the macromolecule
- C08G77/04—Polysiloxanes
- C08G77/045—Polysiloxanes containing less than 25 silicon atoms
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- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08G—MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
- C08G77/00—Macromolecular compounds obtained by reactions forming a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon in the main chain of the macromolecule
- C08G77/04—Polysiloxanes
- C08G77/22—Polysiloxanes containing silicon bound to organic groups containing atoms other than carbon, hydrogen and oxygen
- C08G77/26—Polysiloxanes containing silicon bound to organic groups containing atoms other than carbon, hydrogen and oxygen nitrogen-containing groups
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- Microelectronics & Electronic Packaging (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
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- Manufacturing & Machinery (AREA)
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- Life Sciences & Earth Sciences (AREA)
- Health & Medical Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Toxicology (AREA)
- Electromagnetism (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Thin Film Transistor (AREA)
- Medicinal Chemistry (AREA)
- Polymers & Plastics (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The invention discloses a kind of top gate type thin film transistor and preparation method thereof, array base palte, display panel, including the light shield layer formed between underlay substrate and active layer, the light shield layer is made of nonmetallic materials.The top gate type thin film transistor that the present invention is provided is used as light shield layer using nonmetallic materials, metal level is not only avoided as the parasitic capacitance produced by light shield layer, and can efficiently reduce light leak influences on active area, so as to effectively improve product yield and device performance.The structure of thin film transistor (TFT) can also be simplified, so as to efficiently reduce process complexity, reduce the production process of thin film transistor (TFT).
Description
Technical field
The present invention relates to display technology field, a kind of top gate type thin film transistor and preparation method thereof, array are particularly related to
Substrate, display panel.
Background technology
Oneself turns into the main product of in the market to flat-panel screens (Flat Panel Display, FPD), flat-panel screens
Species is also more and more, such as liquid crystal display (Liquid Crystal Display, LCD), Organic Light Emitting Diode
(Organic Light Emitting Diode, OLED) display, plasma display (Plasma Display
Panel, PDP) and Field Emission Display (Field Emission Display, FED) etc..It is used as FPD industry core technologies
Thin film transistor (TFT) (Thin Film Transistor, TFT) backplane technology, is also experiencing deep change.Especially metal
Oxide thin film transistor (Metal Oxide Thin Film Transistor, MOTFT), due to higher mobility
(in 5~50cm2/ Vs or so), manufacture craft is simple, cost is relatively low, and the features such as with excellent large-area uniformity, therefore
MOTFT technologies have just attracted much industry attention since the birth.
White light OLED (White Organic Light Emitting Diode, WOLED)+colored filter (Color
Filter, CF) technology is used as active matrix organic light-emitting diode (Active Matrix Organic Light Emitting
Diode, AMOLED) a kind of developing way because with electroluminescent organic material utilization rate it is high, to evaporation electroluminescence material
The advantages of mask plate of material requires low, improves aperture opening ratio using the electroluminescent material of top emitting, receives much concern.However, conduct
The selection of the channel layer semiconductor of key technology will not only pay close attention to the indexs such as mobility, it is also contemplated that complexity of related process etc.
Relevant issues.
Top gate structure backboard has mobility high, the small remarkable advantage of parasitic capacitance.Current top-gated bottom emitting or top hair
Penetrating backboard needs to add light shield layer, and conventional metal light shield layer needs to be processed into by multiple tracks technique.As shown in figure 1, existing
Top gate type thin film transistor include underlay substrate 11, form metal light shield layer 13 on underlay substrate 11, formed in metal
Cushion 10 on light shield layer 13, form active layer 14 on the buffer layer, the gate insulation layer 19 formed on active layer 14, shape
Into the grid 16 on gate insulation layer 19, in addition to formed on grid 16 and active layer 14 interlayer insulating film 15, formed exist
On interlayer insulating film 15 source-drain electrode layer 12, and source-drain electrode layer 12 by be arranged on the via on interlayer insulating film 15 with it is active
Layer 14 connect, in addition to formed interlayer insulating film 15 and source-drain electrode layer 12 on passivation layer 17, formed on passivation layer 17
Pixel electrode 18, and pixel electrode 18 is connected by the via that is arranged on passivation layer 17 with source-drain electrode layer 12.It can be seen that, it is existing
Top gate structure backboard the problem of not only there is complex process, the problem of also there is parasitic capacitance.
The content of the invention
In view of this, it is an object of the invention to propose a kind of top gate type thin film transistor and preparation method thereof, array base
Plate, display panel, the problem of there is parasitic capacitance and complicated making technology with solution.
Based on above-mentioned purpose, the present invention provides top gate type thin film transistor, including formed underlay substrate and active layer it
Between light shield layer, the light shield layer is made of nonmetallic materials.
In some embodiments of the invention, the light shield layer is made of Photocurable Silicone Material.
In some embodiments of the invention, the light shield layer is made of shading negativity Photocurable Silicone Material.
In some embodiments of the invention, the Photocurable Silicone Material is cage modle polysilsesquioxane or linearly had
Machine silicones；
The structure of the cage modle polysilsesquioxane is as follows：
The structure of the linear organic siliconresin is as follows：
Wherein, R is negative photoresist photosensitive group.
In some embodiments of the invention, in the Photocurable Silicone Material added with the black class dyestuff of fluorane and/or
Crystal violet class dyestuff.
In some embodiments of the invention, the thickness of the light shield layer is less than or equal to the thickness of source-drain electrode layer.
In some embodiments of the invention, the thickness of the source-drain electrode layer is 1-2 μm；And/or, the thickness of the light shield layer
Spend for less than 1 μm.
The present invention also provides a kind of preparation method of top gate type thin film transistor, comprises the following steps：
Light shield layer is formed on underlay substrate, wherein, the light shield layer is made of nonmetallic materials；
Active layer is formed on the light shield layer.
In some embodiments of the invention, it is described to include on underlay substrate the step of formation light shield layer：
Drain metallic film is deposited on underlay substrate, image conversion is carried out to the drain metallic film, source-drain electrode is formed
Layer；
Deposition or coating nonmetallic materials film on source-drain electrode layer, using source-drain electrode layer as mask plate,
Back-exposure development is carried out to the nonmetallic materials film, light shield layer is formed.
In some embodiments of the invention, the light shield layer is made of Photocurable Silicone Material.
In some embodiments of the invention, the light shield layer is made of shading negativity Photocurable Silicone Material.
In some embodiments of the invention, in the Photocurable Silicone Material added with the black class dyestuff of fluorane and/or
Crystal violet class dyestuff.
In some embodiments of the invention, the thickness of the light shield layer is less than or equal to the thickness of source-drain electrode layer.
The present invention also provides the top gate type thin film transistor in a kind of array base palte, including any one above-mentioned embodiment.
The present invention also provides the top gate type thin film transistor in a kind of display panel, including any one above-mentioned embodiment.
The top gate type thin film transistor that the present invention is provided avoids metal level work using nonmetallic materials as light shield layer, not only
For the parasitic capacitance produced by light shield layer, and light leak can be efficiently reduced active area is influenceed, so as to effectively improve
Product yield and device performance.The structure of thin film transistor (TFT) can also be simplified, so as to efficiently reduce process complexity, contracting
The production process of film transistor is thinned.Moreover, the preparation method for the top gate type thin film transistor that the present invention is provided can be by certainly
Being directed at exposure technique progress back-exposure, (self-aligned exposure directly does light equivalent to without extra mask plate with source-drain electrode layer
Cover mask), exposed portion leaves, and forms light shield layer, so as to effectively reduce process complexity, reduces process.
Brief description of the drawings
Fig. 1 is the structural representation of top gate type thin film transistor of the prior art；
Fig. 2 is the structural representation of the top gate type thin film transistor of the embodiment of the present invention；
When Fig. 3 a are less than or equal to source-drain electrode layer for the thickness of the light shield layer of the embodiment of the present invention, the structure before back-exposure is shown
It is intended to；
When Fig. 3 b are less than or equal to source-drain electrode layer for the thickness of the light shield layer of the embodiment of the present invention, the structure after back-exposure is shown
It is intended to；
When Fig. 4 a are more than source-drain electrode layer for the thickness of the light shield layer of the embodiment of the present invention, the structural representation before back-exposure
Figure；
When Fig. 4 b are more than source-drain electrode layer for the thickness of the light shield layer of the embodiment of the present invention, the structural representation after back-exposure
Figure；
Fig. 5 is the flow chart of the preparation method of the top gate type thin film transistor of one embodiment of the invention；
Fig. 6 is the flow chart of the preparation method of the top gate type thin film transistor of another embodiment of the invention；
Fig. 7 is the structural representation that the embodiment of the present invention forms source-drain electrode layer on underlay substrate；
Fig. 8 is the structural representation that the embodiment of the present invention forms light shield layer on underlay substrate；
Fig. 9 is the structural representation that the embodiment of the present invention forms active layer on light shield layer；
Figure 10 is the structural representation that the embodiment of the present invention forms insulating barrier on active layer and source-drain electrode layer；
Figure 11 is the structural representation that the embodiment of the present invention forms grid on the insulating layer；
Figure 12 is the structural representation that the embodiment of the present invention forms passivation layer on grid and insulating barrier；
Figure 13 is the structural representation that the embodiment of the present invention forms via on passivation layer and insulating barrier；
Figure 14 is the structural representation that the embodiment of the present invention forms pixel electrode over the passivation layer；
Figure 15 is the flow chart of the preparation method of the top gate type thin film transistor of another embodiment of the present invention；
Figure 16 is the structural representation that the embodiment of the present invention forms via on the insulating layer；
Figure 17 is the structural representation that the embodiment of the present invention forms via over the passivation layer.
Embodiment
For the object, technical solutions and advantages of the present invention are more clearly understood, below in conjunction with specific embodiment, and reference
Accompanying drawing, the present invention is described in more detail.
As one embodiment of the present of invention, the present invention provide top gate type thin film transistor include being formed underlay substrate with
Light shield layer between active layer, the light shield layer is made of nonmetallic materials.Therefore, the top gate type thin film that the present invention is provided is brilliant
Body pipe avoids metal level using nonmetallic materials as light shield layer, not only as the parasitic capacitance produced by light shield layer, can be with
Efficiently reduce light leak influences on active area, so as to effectively improve product yield and device performance.
As shown in Fig. 2 its structural representation for the top gate type thin film transistor of the embodiment of the present invention.The top gate type is thin
Film transistor includes：Underlay substrate 21, formed light shield layer 23 that use nonmetallic materials on the underlay substrate 21 are made,
The active layer 24 formed on the light shield layer, the insulating barrier 25 formed on the active layer 24, formation are in the insulating barrier
Source-drain electrode layer 22, the grid 26 formed on the insulating barrier 25, formation between 25 and the underlay substrate 21 is in the grid
Passivation layer 27, the pixel electrode 28 formed on the passivation layer 27 on pole 26 and the insulating barrier 25, wherein, it is described active
Layer 24 is connected with source-drain electrode layer 22, and the pixel electrode 28 is by being arranged on the passivation layer 27 and the insulating barrier 25
Via 29 and the source-drain electrode layer 22 be connected.
It is can be seen that by Fig. 1 and Fig. 2 contrast in the top gate type thin film transistor that the present invention is provided, the shading
Layer 23 serves the effect of cushion of the prior art and light shield layer simultaneously.Moreover, the top gate type provided in the present invention
In thin film transistor (TFT), the insulating barrier 25 will not connect together when grid 26 can not only deposited with source-drain electrode layer 22,
Gate insulation can also be played a part of, i.e., described insulating barrier 25 serves interlayer insulating film of the prior art and gate insulation simultaneously
The effect of layer.It can be seen that, the top gate type thin film transistor avoids metal level using nonmetallic materials as light shield layer, not only as screening
Parasitic capacitance produced by photosphere, and can efficiently reduce light leak on active area influence (when preventing that thin film transistor (TFT) from working
Light is injected from bottom, influences the service behaviour of thin film transistor (TFT)), so as to effectively improve product yield and device performance, also
The structure of thin film transistor (TFT) can be simplified, so as to efficiently reduce process complexity, reduce the making work of thin film transistor (TFT)
Sequence.
As an alternative embodiment of the invention, the light shield layer 23 can be made of Photocurable Silicone Material.This
Invention avoids metal level using Photocurable Silicone Material as light shield layer, not only as the parasitic capacitance produced by light shield layer,
The step of also eliminating metal sputter-deposition and etching, can effectively reduce process complexity, reduce process, so as to improve device
The efficiency and yield of processing procedure.
As yet another embodiment of the present invention, the light shield layer 23 can use shading negativity Photocurable Silicone Material
It is made.The Photocurable Silicone Material is negativity photoresistance, can carry out back-exposure (autoregistration by self-aligned exposure technology
Exposure directly does reticle mask equivalent to without extra mask plate with source-drain electrode layer), exposed portion leaves, and forms light shield layer
23, so as to effectively reduce process complexity, reduce process.
Specifically, in some embodiments of the invention, the Photocurable Silicone Material can be the poly- sesquialter silicon of cage modle
Oxygen alkane, the structure of the cage modle polysilsesquioxane is as follows：
Wherein, R is negative photoresist photosensitive group.
In other embodiments of the present invention, the Photocurable Silicone Material can also be linear organic siliconresin,
The structure of the linear organic siliconresin is as follows：
Wherein, R is negative photoresist photosensitive group.
The light shield layer being made with these Photocurable Silicone Materials can preferably reach the technique effect of the present invention.
More specifically, in other embodiments of the present invention, the R in structure above can be selected from (methyl) propylene
In esters of gallic acid negative photoresist photosensitive group any one or it is a variety of.So as to carry out back side exposure by self-aligned exposure technology
Light, leaves exposed portion, forms light shield layer 23, so as to effectively reduce process complexity, reduces process.
It should be noted that the present invention list with being merely exemplary can as light shield layer nonmetallic materials, but
Above-mentioned nonmetallic materials are not limited to, under the teachings of the present invention, those skilled in the art can select other non-as needed
Metal material is as light shield layer, so as to reach that solution has the purpose of parasitic capacitance and the complicated technical problem of making technology.
In order to improve the shaded effect of light shield layer 23, light screening material can be further added in nonmetallic materials.Tool
Body, in some embodiments of the invention, the black class dyestuff of fluorane and/or crystallization are added with the Photocurable Silicone Material
Purple class dyestuff, to improve shaded effect, reduces influence of the light to active layer.
In some embodiments of the invention, the black class dyestuff of fluorane used include fluorane it is black (2- phenylamino -3- methyl -
6- dibutylaminos are glimmering), the black derivative of fluorane, mixture, (this analog derivative or trim are generally in heat-sensitive paper printing for trim
Field is widely used, such as ODB, ODB-1, commercially available, and mixture can be that different types of fluorane is black
Mixing, such as ODB and ODB-2；Can be the mixing with other compositions, such as ODB-2 and CF-51)；At one of the present invention
In embodiment, the black ODB-2 of fluorane is employed.
In some embodiments of the invention, crystal violet class dyestuff used includes crystal violet, the derivative of crystal violet, repaiied
Jewelry, mixture (leuco crystal violet, crystal violet-d6, leuco crystal violet-d6 etc.)；In one embodiment of the invention, use
Leuco crystal violet.
In some embodiments of the invention, the active layer 24 is made of metal oxide.Wherein, the metal oxygen
Compound may be selected from indium gallium zinc oxide (IGZO), nitrogen oxygen zinc (ZnON) or/and indium tin oxide (ITZO).The active layer 24
Thickness can be 500-1000nm.
As another embodiment of the present invention, source-drain electrode layer 22 can using copper, molybdenum, aluminium, molybdenum niobium alloy or
Molybdenum-copper etc..
In some embodiments of the invention, the thickness of the light shield layer 23 is less than or equal to the thickness of source-drain electrode layer 22
Degree.When Fig. 3 a are less than or equal to source-drain electrode layer for the thickness of the light shield layer of the embodiment of the present invention, the structural representation before back-exposure,
When Fig. 3 b are less than or equal to source-drain electrode layer for the thickness of the light shield layer of the embodiment of the present invention, the structural representation after back-exposure, figure
When 4a is more than source-drain electrode layer for the thickness of the light shield layer of the embodiment of the present invention, the structural representation before back-exposure, Fig. 4 b are this
When the thickness of the light shield layer of inventive embodiments is more than source-drain electrode layer, the structural representation after back-exposure.It can be seen that
Due to being back-exposure, if the thickness of the light shield layer 23 is more than the thickness of source-drain electrode layer 22, light shield layer 23 is stayed
Part easily form inverted trapezoidal, cause subsequent deposition active layer and source-drain electrode layer between loose contact or fracture.Therefore, originally
The thickness of the light shield layer 23 of invention is less than or equal to the thickness of source-drain electrode layer 22, can improve between active layer and source-drain electrode layer
Contact it is benign, it is to avoid light shield layer or active fault rupture.
In some embodiments of the invention, the thickness of the source-drain electrode layer is 1-2 μm.Further, the light shield layer
Thickness be less than 1 μm, with ensure active layer and source-drain electrode layer between contact it is benign, it can also be ensured that efficiently reduce light leak
Active area is influenceed, so as to effectively improve product yield and device performance.
Present invention also offers a kind of preparation method of top gate type thin film transistor, as shown in figure 5, comprising the following steps：
Step 51：Light shield layer is formed on underlay substrate, wherein, the light shield layer is made of nonmetallic materials；
Step 52：Active layer is formed on the light shield layer.
It can be seen that, the preparation method for the top gate type thin film transistor that the present invention is provided is used as shading using Photocurable Silicone Material
Layer, not only avoids metal level as the parasitic capacitance produced by light shield layer, also eliminates the step of metal sputter-deposition and etching
Suddenly, process complexity can be effectively reduced, reduces process, so as to improve the efficiency and yield of device processing procedure.
Specifically, as one embodiment of the present of invention, the preparation method of the top gate type thin film transistor is including following
Step：
Source-drain electrode layer and light shield layer are formed on underlay substrate, wherein, the light shield layer is made of nonmetallic materials；
Active layer is formed on light shield layer.
Insulating barrier is formed on active layer and source-drain electrode layer；
Grid is formed on the insulating layer；
Passivation layer is formed on grid and insulating barrier；
Pixel electrode is formed over the passivation layer.
In some embodiments of the invention, it is described to include on underlay substrate the step of formation light shield layer：
Drain metallic film is deposited on underlay substrate, image conversion is carried out to the drain metallic film, source-drain electrode is formed
Layer；
Deposition or coating nonmetallic materials film on source-drain electrode layer, using source-drain electrode layer as mask plate,
Back-exposure development is carried out to the nonmetallic materials film, light shield layer is formed.
Therefore, the preparation method for the top gate type thin film transistor that the present invention is provided can be using self-aligned exposure technology (certainly
Alignment exposure directly does reticle mask equivalent to without extra mask plate with source-drain electrode layer) back-exposure is carried out, eliminate one
The making of layer light shield, so as to effectively reduce process complexity, reduces process.
The preparation method to the top gate type thin film transistor is described in detail below, comprises the following steps：
Step 61：Source-drain electrode layer is formed on underlay substrate.
With reference to Fig. 7, it is the structural representation that the embodiment of the present invention forms source-drain electrode layer on underlay substrate.Specifically,
In this step, drain metallic film is first deposited on underlay substrate 21, image conversion then is carried out to the drain metallic film,
Form source-drain electrode layer 22.It is preferred that before deposition drain metallic film, first being cleaned to underlay substrate 21.It is used as the present invention
Another embodiment, source-drain electrode layer 22 can be using copper, molybdenum, aluminium, molybdenum niobium alloy or molybdenum-copper etc..In the present invention
Some embodiments in, the thickness of source-drain electrode layer can be 1-2 μm.It should be noted that the underlay substrate 21 is general
From glass substrate.
Step 62：Light shield layer is formed on underlay substrate.
With reference to Fig. 8, it is the structural representation that the embodiment of the present invention forms light shield layer on underlay substrate.Specifically, exist
In the step, deposition or coating nonmetallic materials film on source-drain electrode layer 22, using source-drain electrode layer 22 as covering
Film version, back-exposure development (being exposed from the side of underlay substrate 21) is carried out to the nonmetallic materials film, forms light shield layer
23。
In some embodiments of the invention, the nonmetallic materials can be Photocurable Silicone Material.The present invention with
Photocurable Silicone Material not only avoids metal level as the parasitic capacitance produced by light shield layer, also saved as light shield layer
The step of metal sputter-deposition and etching, process complexity can be effectively reduced, reduce process, so as to improve device processing procedure
Efficiency and yield.
In some embodiments of the invention, the nonmetallic materials can also be Photocurable Silicone Material.The light
Cured silicone material be negativity photoresistance, can by self-aligned exposure technology carry out back-exposure (self-aligned exposure equivalent to
Without extra mask plate, directly reticle mask is done with source-drain electrode layer), exposed portion leaves, and light shield layer 23 is formed, so that effectively
Process complexity is reduced, reduces process.
Specifically, in some embodiments of the invention, the Photocurable Silicone Material can be the poly- sesquialter silicon of cage modle
Oxygen alkane, the structure of the cage modle polysilsesquioxane is as follows：
Wherein, R is negative photoresist photosensitive group.
In other embodiments of the present invention, the Photocurable Silicone Material can also be linear organic siliconresin,
The structure of the linear organic siliconresin is as follows：
Wherein, R is negative photoresist photosensitive group.
More specifically, in other embodiments of the present invention, the R in structure above can be selected from acrylate
Any one in class, methyl acrylic ester negative photoresist photosensitive group or a variety of, including but not limited to methyl methacrylate
Ester, butyl acrylate, methyl acrylate, glyceral methacrylate etc..So as to be carried on the back by self-aligned exposure technology
Face exposes, and leaves exposed portion, forms light shield layer 23, so as to effectively reduce process complexity, reduces process.
It should be noted that the present invention list with being merely exemplary can as light shield layer nonmetallic materials, but
Above-mentioned nonmetallic materials are not limited to, under the teachings of the present invention, those skilled in the art can select other non-as needed
Metal material is as light shield layer, so as to reach that solution has the purpose of parasitic capacitance and the complicated technical problem of making technology.
In order to improve the shaded effect of light shield layer 23, light screening material can be further added in nonmetallic materials.Tool
Body, in some embodiments of the invention, the black class dyestuff of fluorane and/or crystallization are added with the Photocurable Silicone Material
Purple class dyestuff, to improve shaded effect, reduces influence of the light to active layer.
In some embodiments of the invention, the thickness of the light shield layer is less than or equal to the thickness of source-drain electrode layer, with
The contact improved between active layer and source-drain electrode layer is benign, it is to avoid light shield layer or active fault rupture.Further, the shading
The thickness of layer is less than 1 μm, to ensure that the contact between active layer and source-drain electrode layer is benign, it can also be ensured that efficiently reduce Lou
Light influences on active area, so as to effectively improve product yield and device performance.
Step 63：Active layer is formed on light shield layer.
With reference to Fig. 9, it is the structural representation that the embodiment of the present invention forms active layer on light shield layer.Specifically, at this
In step, the material of the active layer 24 is usually semiconductor, can be made of metal oxide, it would however also be possible to employ hydrogenation is non-
Crystal silicon (a-Si:H) it is made, it would however also be possible to employ low temperature polycrystalline silicon (Low Temperature Poly-silicon, LTPS) is made,
To provide conducting channel.Preferably, specific metal oxide can be the gold containing at least one of In, Zn, Ga and Sn
Belong to oxide, such as described metal oxide may be selected from indium gallium zinc oxide (IGZO), indium tin zinc oxide (ISZO), nitrogen oxygen zinc
Or/and indium tin oxide (ITZO) (ZnON).
Step 64：Insulating barrier is formed on active layer and source-drain electrode layer.
With reference to Figure 10, it is the structural representation that the embodiment of the present invention forms insulating barrier on active layer and source-drain electrode layer.
Specifically, in this step, deposition of insulative material film (such as SiN on active layer 24 and source-drain electrode layer 22xOr SiO2),
Then photolithography patterning is carried out, so as to form insulating barrier 25.The insulating materials can also be organic insulation.
Step 65：Grid is formed on the insulating layer.
With reference to Figure 11, it is the structural representation that the embodiment of the present invention forms grid on the insulating layer.Specifically, in the step
In rapid, the grid 26 can be the metals such as copper, or multiple layer metal lamination.
Step 66：Passivation layer is formed on grid and insulating barrier.
With reference to Figure 12, it is the structural representation that the embodiment of the present invention forms passivation layer on grid and insulating barrier.Specifically
Ground, in this step, deposits passivating material film on grid and insulating barrier, then carries out image to the passivating material film
Change, form passivation layer 27.The passivation layer 27 plays a part of insulation, encapsulation.
Step 67：Via is formed on insulating barrier and passivation layer.
With reference to Figure 13, it is the structural representation that the embodiment of the present invention forms via on passivation layer and insulating barrier.At this
In embodiment, the not perforate after insulating barrier 25 is formed, after passivation layer 27 is formed, perforate together opens up into source-drain electrode layer 22,
So as to form via 29.
Step 68：Pixel electrode is formed over the passivation layer.
With reference to Figure 14, it is the structural representation that the embodiment of the present invention forms pixel electrode over the passivation layer.In the step
In, conductive material thin film is formed over the passivation layer, image conversion then is carried out to the conductive material thin film, forms pixel electrode.
The pixel electrode 28 passes through the via 29 being arranged on the passivation layer 27 and the insulating barrier 25 and source-drain electrode layer 22
Connection.The pixel electrode 28 can be transparent conductive film layer, for example Indium-tin Oxide Transparent Conductive Film layer.
It is used as an alternative embodiment of the invention, as shown in figure 15, the preparation method bag of the top gate type thin film transistor
Include following steps：
Step 151：Source-drain electrode layer is formed on underlay substrate；
Step 152：Light shield layer is formed on underlay substrate；
Step 153：Active layer is formed on light shield layer；
Step 154：Insulating barrier is formed on active layer and source-drain electrode layer；
Step 155：Via is formed on the insulating layer；
Step 156：Grid is formed on the insulating layer；
Step 157：Passivation layer is formed on grid and insulating barrier；
Step 158：Via is formed over the passivation layer；
Step 159：Pixel electrode is formed over the passivation layer.
Wherein, step 151, step 152, step 153, step 154, step 156, step 157, step 159 can with above
It is identical, it will not be repeated here.
As shown in figs. 16-17, in this embodiment, by the way of substep perforate：The first perforate after insulating barrier 25 is formed,
Then grid 26 and passivation layer 27 are made, then perforate is carried out to passivation layer 27 and source-drain electrode layer 22 is opened up into.
The present invention also provides the top gate type thin film transistor in a kind of array base palte, including any one above-mentioned embodiment,
It can reduce and reduce the complexity of oxide film transistor array substrate manufacturing process.
The present invention also provides the top gate type thin film transistor in a kind of display panel, including any one above-mentioned embodiment.
As can be seen here, the top gate type thin film transistor that the present invention is provided not only is avoided using nonmetallic materials as light shield layer
Metal level can efficiently reduce light leak active area is influenceed as the parasitic capacitance produced by light shield layer, so as to have
Improve product yield and device performance to effect.The structure of thin film transistor (TFT) can also be simplified, so as to efficiently reduce work
Skill complexity, reduces the production process of thin film transistor (TFT).Moreover, the preparation method for the top gate type thin film transistor that the present invention is provided
Back-exposure can be carried out by self-aligned exposure technology, and (self-aligned exposure directly uses source equivalent to without extra mask plate
Drain electrode layer does reticle mask), exposed portion leaves, and forms light shield layer 23, so as to effectively reduce process complexity, reduces process.
Those of ordinary skills in the art should understand that：The discussion of any of the above embodiment is exemplary only, not
It is intended to imply that the scope of the present disclosure (including claim) is limited to these examples；Under the thinking of the present invention, above example
Or can also not be combined between the technical characteristic in be the same as Example, and there is the different aspect of the present invention as described above
Many other changes, in order to it is concise they provided not in details.Therefore, within the spirit and principles of the invention,
Any omission, modification, equivalent substitution, improvement for being made etc., should be included in the scope of the protection.
Claims (15)
1. a kind of top gate type thin film transistor, it is characterised in that including forming the light shield layer between underlay substrate and active layer,
The light shield layer is made of nonmetallic materials.
2. top gate type thin film transistor according to claim 1, it is characterised in that the light shield layer is organic using photocuring
Silicon materials are made.
3. top gate type thin film transistor according to claim 2, it is characterised in that the light shield layer uses shading negativity light
Cured silicone material is made.
4. top gate type thin film transistor according to claim 2, it is characterised in that the Photocurable Silicone Material is cage
Type polysilsesquioxane or linear organic siliconresin；
The structure of the cage modle polysilsesquioxane is as follows：
The structure of the linear organic siliconresin is as follows：
Wherein, R is negative photoresist photosensitive group.
5. top gate type thin film transistor according to claim 2, it is characterised in that add in the Photocurable Silicone Material
Added with the black class dyestuff of fluorane and/or crystal violet class dyestuff.
6. top gate type thin film transistor according to claim 1, it is characterised in that the thickness of the light shield layer is less than or equal to
The thickness of the source-drain electrode layer.
7. top gate type thin film transistor according to claim 6, it is characterised in that the thickness of the source-drain electrode layer is 1-2 μ
m；And/or, the thickness of the light shield layer is less than 1 μm.
8. a kind of preparation method of top gate type thin film transistor, it is characterised in that comprise the following steps：
Light shield layer is formed on underlay substrate, wherein, the light shield layer is made of nonmetallic materials；
Active layer is formed on the light shield layer.
9. the preparation method of top gate type thin film transistor according to claim 8, it is characterised in that described in underlay substrate
The step of upper formation light shield layer, includes：
Drain metallic film is deposited on underlay substrate, image conversion is carried out to the drain metallic film, source-drain electrode layer is formed；
Deposition or coating nonmetallic materials film on source-drain electrode layer, using source-drain electrode layer as mask plate, to institute
State nonmetallic materials film and carry out back-exposure development, form light shield layer.
10. the preparation method of top gate type thin film transistor according to claim 8 or claim 9, it is characterised in that the light shield layer
It is made of Photocurable Silicone Material.
11. the preparation method of top gate type thin film transistor according to claim 10, it is characterised in that the light shield layer is adopted
It is made of shading negativity Photocurable Silicone Material.
12. the preparation method of top gate type thin film transistor according to claim 10, it is characterised in that the photocuring has
The black class dyestuff of fluorane and/or crystal violet class dyestuff are added with machine silicon materials.
13. the preparation method of top gate type thin film transistor according to claim 8, it is characterised in that the light shield layer
Thickness is less than or equal to the thickness of source-drain electrode layer.
14. a kind of array base palte, it is characterised in that including the top gate type thin film crystal described in any one in claim 1-7
Pipe.
15. a kind of display panel, it is characterised in that including the array base palte described in claim 14.
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| US20180294360A1 (en) | 2018-10-11 |
| US10868190B2 (en) | 2020-12-15 |
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