CN106961251B - Circuit device, oscillator, electronic apparatus, and moving object - Google Patents

Abstract

A circuit device, an oscillator, an electronic apparatus, and a moving object. The circuit device includes: a processing unit that performs signal processing on input data of frequency control data based on a phase comparison result of an input signal and a reference signal, the input signal being based on an oscillation signal, and outputs the frequency control data; and an oscillation signal generation circuit that generates an oscillation signal using the frequency control data and the oscillator. The processing unit performs the following processing until the holding mode caused by the disappearance or abnormality of the reference signal is detected: a processing unit generates aging-corrected frequency control data by estimating a true value of an observed value of frequency control data based on a phase comparison result by Kalman filtering processing, storing the true value at a time corresponding to the time at which the hold pattern is detected when the hold pattern is detected, and performing arithmetic processing based on the true value.

Description

Circuit device, oscillator, electronic apparatus, and moving object

Technical Field

The invention relates to a circuit device, an oscillator, an electronic apparatus, and a moving object.

Background

Oscillators such as an OCXO (oven controlled crystal oscillator) and a TCXO (temperature compensated crystal oscillator) have been known. For example, OCXO is used as a reference signal source in a base station, a network router, a measurement device, and the like.

In such oscillators such as OCXO and TCXO, a high frequency stability is desired. However, there are the following problems: there is a temporal change in the oscillation frequency of the oscillator, which is referred to as aging, and the oscillation frequency varies with the passage of time. For example, as a conventional technique for suppressing fluctuation of an oscillation frequency when a reference signal such as a GPS signal cannot be received and a so-called hold-over (hold-over) state is established, there is a technique disclosed in japanese patent laid-open No. 2015-82815. In this conventional technique, a storage unit for storing correspondence information (aging characteristic data) between a correction value of a control voltage of an oscillation frequency and an elapsed time is provided, as well as an elapsed time measurement unit. Also, in the case where the hold mode is detected, the aging correction is performed based on the correspondence information of the correction value and the elapsed time stored in the storage section, and the elapsed time measured by the elapsed time measuring section.

In this case, since the correspondence information is obtained by operating the oscillator for a long time and measuring the aging characteristics, it is not possible to obtain correspondence information for each of all oscillators produced in a batch. Therefore, the correspondence information is obtained using the oscillator prepared as the sample, and the information is repeatedly used as the correspondence information of the other oscillators.

However, the characteristics of the aging variation of the oscillation frequency among the individual oscillators vary depending on the performance of the components constituting the oscillators, the mounting state of the components and the oscillators, and the individual variations (hereinafter referred to as element variations) such as the use environment of the oscillators.

According to some aspects of the present invention, a circuit device, an oscillator, an electronic apparatus, a mobile object, and the like, which can realize aging correction with higher accuracy, can be provided.

Disclosure of Invention

One embodiment of the present invention relates to a circuit device including: a processing unit that performs signal processing on frequency control data based on a phase comparison result of an input signal and a reference signal, the input signal being based on an oscillation signal; and an oscillation signal generation circuit that generates an oscillation signal of an oscillation frequency set by the frequency control data using an oscillator and the frequency control data from the processing unit, wherein the processing unit performs the following processing during a period until a hold mode caused by disappearance or abnormality of the reference signal is detected: and a processing unit configured to generate the aging-corrected frequency control data by estimating a true value of an observed value of the frequency control data based on the phase comparison result by kalman filtering, and when the hold mode is detected, storing the true value at a time corresponding to the time at which the hold mode is detected, and performing arithmetic processing based on the true value.

According to one aspect of the present invention, the processing unit performs signal processing on the frequency control data based on the phase comparison result of the input signal and the reference signal. Then, an oscillation signal of an oscillation frequency set by the frequency control data is generated using the oscillator and the frequency control data from the processing unit. In one embodiment of the present invention, a true value of the observation value for the frequency control data is estimated by kalman filter processing until the hold mode is detected. Then, after the hold mode is detected, the true value at the time corresponding to the time at which the hold mode is detected is stored, and the frequency control data after the aging correction is generated by performing the arithmetic processing based on the stored true value. Thus, the burn-in correction can be realized based on the true value estimated by the kalman filter process and stored at the time corresponding to the time at which the hold pattern is detected. Therefore, highly accurate aging correction, which has not been possible in the past, can be realized.

In one aspect of the present invention, the frequency control data after the aging correction may be generated by performing the arithmetic processing of adding a correction value to the true value.

Thus, the aging correction is realized by performing an arithmetic process of adding a correction value for compensating for a frequency change due to the aging rate to the true value stored at the time corresponding to the detection time of the hold mode. Therefore, highly accurate burn-in correction can be achieved by simple processing.

In one embodiment of the present invention, when the correction value at time step k is d (k) and the frequency control data after the aging correction at time step k is AC (k), the processing unit may obtain the frequency control data AC (k +1) after the aging correction at time step k +1 from AC (k +1) ═ AC (k) + d (k).

Thus, by performing the processing of AC (k +1) ═ AC (k) + d (k) at each time step, aging correction with high accuracy can be achieved by simple processing.

In one aspect of the present invention, the processing unit may perform the arithmetic processing of adding the correction value after the filtering processing to the true value.

This can effectively suppress the following: the accuracy of the aging correction is degraded due to the addition of the correction value having fluctuating fluctuations to the true value.

In one aspect of the present invention, the processing unit may determine the correction value from an observation residual in the kalman filter process.

This makes it possible to perform update processing reflecting the correction value of the observation residual in the kalman filter processing, and to realize aging correction with higher accuracy.

In one aspect of the present invention, a storage unit may be included, the storage unit storing a system noise constant for setting the system noise of the kalman filter process and an observation noise constant for setting the observation noise of the kalman filter process.

This makes it possible to realize aging correction that reduces the influence of element variations of system noise and observation noise.

In one aspect of the present invention, the processing unit may determine whether or not the state of the hold mode is set based on a voltage of an input terminal to which the detection signal of the hold mode is input or detection information of the hold mode input via a digital interface unit.

Thus, it is possible to determine whether or not the hold mode is set by a simple process based on the voltage of the input terminal or the detection information input via the digital interface unit.

In one aspect of the present invention, the oscillation signal generation circuit may generate the oscillation signal based on the frequency control data based on the phase comparison result when returning from the hold mode.

Thus, when the operation is resumed from the hold mode and shifted to, for example, a normal operation, an oscillation signal having an appropriate oscillation frequency can be generated based on the frequency control data based on the phase comparison result.

In addition, another aspect of the present invention relates to an oscillator including: the circuit arrangement of any of the above; and the vibrator.

Another aspect of the present invention relates to an electronic device including any one of the circuit devices described above.

Another aspect of the present invention relates to a mobile body including the circuit device according to any one of the above aspects.

Drawings

Fig. 1 is an explanatory diagram of element variations with respect to aging characteristics.

Fig. 2 is an explanatory diagram for the aging correction in the hold mode.

Fig. 3 is an explanatory diagram for the hold mode.

Fig. 4 is an explanatory diagram for the hold mode.

Fig. 5 is an explanatory diagram for the holding mode time.

Fig. 6 is a basic configuration example of the circuit device of the present embodiment.

Fig. 7 is a detailed configuration example of the circuit device of the present embodiment.

Fig. 8 is an explanatory diagram of the aging correction using the kalman filter process.

Fig. 9 is an explanatory diagram of the aging correction using the kalman filter process.

Fig. 10 is a detailed configuration example of the processing unit.

Fig. 11 is an explanatory diagram of the temperature compensation process.

Fig. 12 is an explanatory diagram of the temperature compensation process.

Fig. 13 is an explanatory diagram of the temperature compensation process.

Fig. 14 is an explanatory diagram of the operation of the processing unit.

Fig. 15 is an explanatory diagram of the operation of the processing unit.

Fig. 16 shows an example of the configuration of the aging correcting unit.

Fig. 17 is a model example of kalman filtering.

Fig. 18 shows an example of the structure of the kalman filter.

Fig. 19 is a diagram showing an example of the predicted frequency deviation and the measured frequency deviation according to the present embodiment.

Fig. 20 shows an example of the structure of the temperature sensor.

Fig. 21 shows an example of the configuration of the oscillation circuit.

Fig. 22 is an explanatory diagram of a modification of the present embodiment.

Fig. 23 is an explanatory diagram of a modification of the present embodiment.

Fig. 24 shows an example of the structure of the oscillator.

Fig. 25 shows an example of the configuration of the electronic device.

Fig. 26 shows a configuration example of a mobile body.

Fig. 27 shows a detailed configuration example of the oscillator.

Fig. 28 is a configuration example of a base station as one of electronic devices.

Detailed Description

Hereinafter, preferred embodiments of the present invention will be described in detail. The present embodiment described below is not intended to unduly limit the contents of the present invention described in the claims, and all of the configurations described in the present embodiment are not necessarily means for solving the problems of the present invention.

1. Oscillation frequency variation due to aging

In oscillators such as OCXO and TCXO, the oscillation frequency fluctuates due to a change with time called aging. A1 to a5 in fig. 1 are examples of measurement results of aging characteristics of a plurality of oscillators having the same or different shipment lot numbers. As shown in a1 to a5 in fig. 1, the mode of aging fluctuation varies with variations in the elements.

The cause of the change in oscillation frequency due to aging is considered to be the detachment and adhesion of dust generated in the hermetically sealed container to the vibrator, the change in the environment due to some evolved gas, or the change with time of the adhesive used in the oscillator.

As a countermeasure for suppressing such a variation in oscillation frequency due to aging, there is a method of: the oscillator is initially aged for a predetermined period before shipment, and the oscillation frequency is initially changed before shipment. However, for applications requiring high frequency stability, it is not sufficient to take such measures for initial aging alone, and aging correction is desired to compensate for fluctuations in oscillation frequency caused by aging.

In addition, when an oscillator is used as a reference signal source of a base station, there is a problem of a so-called hold mode. For example, in a base station, a PLL circuit is used to synchronize an oscillation signal (output signal) of an oscillator with a reference signal from a GPS or a network, thereby suppressing frequency variation. However, when a reference signal from a GPS or a network (internet) is generated and a hold mode is lost or abnormal, a reference signal for synchronization cannot be obtained. If the GPS is taken as an example, if the positioning signal cannot be received due to the installation position or installation direction of the GPS antenna, the positioning signal cannot be accurately received due to an interference wave, or the positioning signal is not transmitted from the positioning satellite, the hold mode occurs, and the synchronization process using the reference signal cannot be executed.

When such a hold mode is generated, an oscillation signal generated by the self-oscillation of the oscillator becomes a reference signal source of the base station. Therefore, the following hold mode performance is required: during a hold mode period from a generation timing of the hold mode to a timing (release timing) of recovery from the hold mode, fluctuation of an oscillation frequency due to self-oscillation of an oscillator is suppressed.

However, as described above, since the oscillation frequency of the oscillator varies to an extent that cannot be ignored due to aging, there is a problem in that it is difficult to realize high hold mode performance. For example, when an allowable frequency deviation (Δ f/f) is defined during a holding mode period of 24 hours or the like, if there is a large variation in oscillation frequency due to aging, the allowable frequency deviation cannot be defined.

For example, various communication methods such as FDD (Frequency Division Duplex) and TDD (Time Division Duplex) have been proposed as communication methods between a base station and a communication terminal. In the TDD scheme, data is transmitted and received in a time division manner using the same frequency in the uplink and the downlink, and a guard time is set between time slots allocated to each device. Therefore, in order to realize appropriate communication, time synchronization is required in each device, and accurate absolute time measurement is required. That is, in order to provide a wireless communication system for communication in a wide area such as a mobile phone and a terrestrial digital broadcast, a plurality of base stations need to be provided, and when the timing varies among the base stations, appropriate communication cannot be realized. However, when the reference signal from the GPS or the network disappears or an abnormal hold mode occurs, the oscillator side needs to count the absolute time without the reference signal, and if the counted time deviates, the communication fails. Therefore, an oscillator used in a base station or the like is required to have a very high frequency stability even during the hold mode. Therefore, aging correction for compensating for frequency fluctuation due to aging is also required to be performed with high accuracy.

Fig. 2 is a diagram illustrating the aging correction in the hold mode. The frequency control data generation unit 40 performs phase comparison (comparison operation) between an input signal (input clock signal) based on the oscillation signal and a reference signal (reference clock signal) from the GPS or the network, and generates frequency control data. In the normal operation, the selector 48 outputs the frequency control data from the frequency control data generator 40 to the oscillation signal generator 140. The D/a converter 80 of the oscillation signal generation circuit 140 converts the frequency control data into a frequency control voltage, and outputs the frequency control voltage to the oscillation circuit 150. The oscillation circuit 150 oscillates the oscillator XTAL at an oscillation frequency corresponding to the frequency control voltage, and generates an oscillation signal. The frequency control data generation unit 40 and the oscillation signal generation circuit 140 form a loop of a PLL circuit, and an input signal based on the oscillation signal can be synchronized with the reference signal.

The detection circuit 47 performs a detection operation of the reference signal to detect a holding mode in which the reference signal disappears or is abnormal. After the hold mode is detected, the aging correction unit 56 performs aging correction for compensating for frequency variation due to aging on the frequency control data stored in the register 49. The oscillation signal generation circuit 140 oscillates the oscillator XTAL at an oscillation frequency corresponding to the frequency control data after the aging correction, and generates an oscillation signal. Thereby, an oscillation signal in self-oscillation can be supplied as a reference signal source for an electronic device such as a base station.

B1 of fig. 3 shows the characteristic of aging of the ideal oscillation frequency in the case where the hold mode is generated. On the other hand, B2 (dotted line) shows the characteristic of fluctuation of the oscillation frequency due to aging. B3 is the amplitude of variation in the oscillation frequency due to aging. B4 in fig. 4 shows the transition of the frequency control voltage to approximate the characteristic of B1 when the hold mode is generated. On the other hand, B5 (broken line) indicates a state where the frequency control voltage is constant from the time when the reference signal disappears or an abnormality occurs.

In order to perform correction for bringing the characteristic shown in B2 of fig. 3 close to the ideal characteristic shown in B1, burn-in correction is performed. For example, if the frequency control voltage is changed as shown in B4 of fig. 4 by aging correction, it is possible to perform correction to bring the characteristic shown in B2 of fig. 3 close to the ideal characteristic shown in B1, and for example, if the correction accuracy is improved, it is possible to correct the characteristic shown in B2 to the ideal characteristic shown in B1. On the other hand, if the aging correction is not performed as shown in B5 of fig. 4, the oscillation frequency fluctuates during the holding mode as shown in B2 of fig. 3, and if the specification of the requirement for the holding mode performance is B1 shown in fig. 3, for example, the requirement cannot be satisfied.

Hold mode time θ representing, for example, the amount of time shift (total amount) based on the fluctuation of oscillation frequency during hold mode_totCan be represented by the following formula (1).

Here, T₁Indicating the elapsed time of aging caused by the hold mode. f. of₀Is the nominal oscillation frequency, Δ f/f₀Is the frequency deviation. In the above formula (1), T₁×f₀Representing the total number of clocks, (Δ f/f)₀)×(1/f₀) Indicating the offset of the time within 1 clock. Furthermore, the frequency deviation Δ f/f₀Can use the hold mode time theta_totAnd elapsed time T₁This is represented by the above formula (2).

As shown in B6 of FIG. 5, assume frequency deviation Δ f/f₀Varying with a constant slope as a function of 1 with respect to the elapsed time. In this case, as shown in B7 of fig. 5, as the time T elapses₁Becomes long, and the mode holding time theta_totBecomes longer as a function of degree 2.

For example, in the case of the TDD scheme, in order to prevent overlapping of time slots in which guard times are set, the hold mode time is required to be θ_tot< 1.5. mu.s. Therefore, as can be seen from the above equation (2), the frequency deviation Δ f/f allowable for the oscillator₀Very small values are required. In particular, the elapsed time T₁The longer the allowable frequency deviation requires a smaller value. For example, the time assumed as the time from the generation time of the hold mode to the time of recovery from the hold mode by the maintenance job is, for example, T₁In the case of 24 hours, a very small value is required as an allowable frequency deviation. Moreover, the frequency deviation is Δ f/f₀For example, a frequency deviation depending on temperature and a frequency deviation caused by aging are included, and therefore, in order to satisfy the above requirements, aging correction with very high accuracy is required.

2. Structure of circuit device

Fig. 6 shows a basic circuit configuration of the circuit device of the present embodiment. As shown in fig. 6, the circuit device of the present embodiment includes a processing unit 50 and an oscillation signal generating circuit 140. The frequency control data generation unit 40 (broadly, a phase comparison unit) may be included. The configuration of the circuit device of the present embodiment is not limited to the configuration of fig. 6, and various modifications may be made such as omitting a part of the components (for example, the frequency control data generating section) or adding another component.

The processing unit 50 performs various signal processing. For example, the frequency control data DFCI (frequency control code) is signal-processed. Specifically, the processing unit 50 (digital signal processing unit) performs, for example, aging correction processing and kalman filter processing, and performs signal processing (digital signal processing) such as temperature compensation processing as necessary. Then, the frequency control data DFCQ after the signal processing is output. The processing unit 50 may include: a hold mode processing unit 52 (a circuit or a program module for hold mode processing), a kalman filter unit 54 (a circuit or a program module for kalman filter processing), and an aging correction unit 56 (a circuit or a program module for aging correction processing). The processing unit 50 may be implemented by an ASIC circuit such as a gate array, or may be implemented by a processor (DSP, CPU) and a program (program module) operating on the processor.

The vibrator XTAL is, for example, a quartz vibrator of thickness shear vibration type such as AT-cut type or SC-cut type, or a piezoelectric vibrator of bending vibration type or the like. As an example, the oscillator XTAL is a type provided in an oven of an oven controlled oscillator (OCXO), but is not limited thereto, and may be an oscillator for TCXO that does not have an oven. The vibrator XTAL may be a resonator (an electromechanical resonator or an electrical resonant circuit). As the transducer XTAL, a SAW (Surface Acoustic Wave) resonator, a MEMS (Micro Electro Mechanical Systems) transducer as a silicon transducer, or the like can be used as a piezoelectric transducer. As a substrate material of the resonator XTAL, a piezoelectric single crystal such as quartz, lithium tantalate, or lithium niobate, a piezoelectric material such as piezoelectric ceramics such as lead zirconate titanate, or a silicon semiconductor material can be used. As the excitation means of the vibrator XTAL, a means based on a piezoelectric effect may be used, or electrostatic driving based on coulomb force may be used.

The oscillation signal generation circuit 140 generates an oscillation signal OSCK. For example, the oscillation signal generation circuit 140 generates the oscillation signal OSCK of the oscillation frequency set by the frequency control data DFCQ (frequency control data after signal processing) from the processing unit 50 and the oscillator XTAL. For example, the oscillation signal generation circuit 140 oscillates the oscillator XTAL at the oscillation frequency set by the frequency control data DFCQ to generate the oscillation signal OSCK.

In addition, the oscillation signal generation circuit 140 may be a circuit that generates the oscillation signal OSCK in a direct digital synthesizer manner. For example, the oscillation signal OSCK of the oscillation frequency set by the frequency control data DFCQ may be generated digitally using the oscillation signal of the oscillator XTAL (oscillation source of fixed oscillation frequency) as a reference signal.

The oscillation signal generation circuit 140 may include a D/a conversion section 80 and an oscillation circuit 150. However, the oscillation signal generating circuit 140 is not limited to such a configuration, and various modifications may be made such as omitting some of the components or adding other components.

The D/a conversion section 80 performs D/a conversion of the frequency control data DFCQ (output data of the processing section) from the processing section 50. The frequency control data DFCQ input to the D/a conversion unit 80 is frequency control data (frequency control code) after signal processing (for example, after aging correction, temperature compensation, or kalman filter processing) by the processing unit 50. As a D/a conversion method of the D/a conversion section 80, for example, a resistor string type (resistor division type) can be used. However, the D/a conversion method is not limited to this, and various methods such as a resistance ladder type (R-2R ladder type, etc.), a capacitance array type, or a pulse width modulation type may be employed. The D/a converter 80 may include a control circuit, a modulation circuit (jitter modulation, PWM modulation, or the like), a filter circuit, and the like, in addition to the D/a converter.

Oscillation circuit 150 generates oscillation signal OSCK using output voltage VQ of D/a conversion unit 80 and oscillator XTAL. The oscillation circuit 150 is connected to the oscillator XTAL via the 1 st and 2 nd oscillator terminals (oscillator pads). For example, the oscillation circuit 150 generates an oscillation signal OSCK by oscillating a vibrator XTAL (a piezoelectric vibrator, a resonator, or the like). Specifically, the oscillation circuit 150 oscillates the oscillator XTAL at an oscillation frequency that uses the output voltage VQ of the D/a conversion unit 80 as a frequency control voltage (oscillation control voltage). For example, when the oscillation circuit 150 is a circuit (VCO) that controls oscillation of the oscillator XTAL by voltage control, the oscillation circuit 150 may include a variable capacitance capacitor (a varactor diode or the like) whose capacitance value changes in accordance with the frequency control voltage.

As described above, the oscillation circuit 150 can be realized by a direct digital synthesizer system, and in this case, the oscillation frequency of the oscillator XTAL becomes a reference frequency and a frequency different from the oscillation frequency of the oscillation signal OSCK.

The frequency control data generating section 40 generates frequency control data DFCI. The frequency control data DFCI is generated by, for example, comparing an input signal based on the oscillation signal OSCK with the reference signal RFCK. The generated frequency control data DFCI is input to the processing unit 50. Here, the input signal based on the oscillation signal OSCK may be the oscillation signal OSCK itself, or may be a signal (for example, a frequency-divided signal) generated from the oscillation signal OSCK. Hereinafter, a case where the input signal is the oscillation signal OSCK itself will be mainly described as an example.

The frequency control data generation unit 40 includes a phase comparison unit 41 and a digital filter unit 44. The phase comparison unit 41 (comparison operation unit) is a circuit that performs phase comparison (comparison operation) between the oscillation signal OSCK as an input signal and the reference signal RFCK, and includes a counter 42 and a TDC 43 (time-to-digital converter).

The counter 42 generates digital data corresponding to an integer part of a result of dividing the reference frequency (for example, 1Hz) of the reference signal RFCK by the oscillation frequency of the oscillation signal OSCK. The TDC 43 generates digital data corresponding to the fractional part of the division result. The TDC 43 includes, for example: a plurality of delay elements; a plurality of latch circuits that latch a plurality of delayed clock signals output by the plurality of delay elements at an edge (high) timing of the reference signal RFCK; and a circuit that generates digital data corresponding to the fractional part of the division result by encoding the output signals of the plurality of latch circuits. The phase comparison unit 41 adds the digital data corresponding to the integer part from the counter 42 and the digital data corresponding to the fractional part from the TDC 43, and detects a phase error with the set frequency. The digital filter unit 44 generates frequency control data DFCI by performing a smoothing process of the phase error. For example, when the frequency of the oscillation signal OSCK is FOS, the frequency of the reference signal RFCK is FRF, and the frequency division number (frequency division ratio) corresponding to the set frequency is FCW, the frequency control data DFCI is generated so that the relationship of FOS ═ FCW × FRF is satisfied. Alternatively, the counter 42 may count the number of clocks of the oscillation signal OSCK. That is, the counter 42 performs a counting operation by an input signal based on the oscillation signal OSCK. The phase comparison unit 41 may compare the count value of the counter 42 in n cycles (n is an integer that can be set to 2 or more) of the reference signal RFCK with the expected value (n × FCW) of the count value by an integer. The phase comparison unit 41 outputs, for example, a difference between the expected value and the count value of the counter 42 as phase error data.

The configuration of the frequency control data generation unit 40 is not limited to the configuration shown in fig. 6, and various modifications can be made. For example, the phase comparison unit 41 may be constituted by a phase comparator of an analog circuit, or the digital filter unit 44 may be constituted by a filter unit (loop filter) of an analog circuit. The processing unit 50 may perform the processing (smoothing processing of the phase error data) of the digital filter unit 44. For example, the processing unit 50 performs the processing of the digital filter unit 44 in time division with other processing (hold mode processing, kalman filter processing, and the like). For example, the processing unit 50 performs a filtering process (smoothing process) on the phase comparison result (phase error data) of the phase comparison unit 41.

In fig. 6, the circuit device has a built-in frequency control data generation unit 40, but the frequency control data generation unit may be a circuit provided outside the circuit device. In this case, in fig. 7 to be described later, the frequency control data DFCI may be input to the processing unit 50 from the frequency control data generation unit provided outside via the digital I/F unit 30.

As described above, in the present embodiment, the processing unit 50 (processor) performs signal processing on the frequency control data DFCI based on the phase comparison result between the input signal based on the oscillation signal OSCK and the reference signal RFCK. That is, the processing unit 50 performs signal processing on the frequency control data DFCI based on the phase comparison result in the phase comparison unit 41. For example, the processing unit 50 receives the frequency control data DFCI from the frequency control data generating unit 40, and the frequency control data generating unit 40 compares an input signal based on the oscillation signal OSCK with the reference signal RFCK to generate the frequency control data DFCI. The processing unit 50 may input the phase comparison result of the phase comparison unit 41 and perform filtering processing (processing by the digital filtering unit 44) on the phase comparison result. Then, the processing unit 50 (processor) performs the following processing until the holding mode caused by the disappearance or abnormality of the reference signal is detected: a true value of the observed value for the frequency control data DFCI based on the phase comparison result is estimated by the kalman filter process. The true value is a true value estimated by the kalman filter process, and is not limited to a true value. The kalman filtering process is performed by the kalman filtering section 54. Further, the control processing based on the hold mode detection is executed by the hold mode processing section 52.

When the hold mode is detected, the processing unit 50 (processor) stores a true value of the time corresponding to the detection time of the hold mode. The time when the true value is stored may be the detection time itself of the hold mode, or may be a time before the detection time. Then, the processing unit 50 performs arithmetic processing based on the stored true values to generate the aging-corrected frequency control data DFCQ. The generated frequency control data DFCQ is output to the oscillation signal generation circuit 140. The generation process of the frequency control data DFCQ after the aging correction is executed by the aging correction section 56.

For example, during the normal operation period, the processing unit 50 performs signal processing such as temperature compensation processing on the frequency control data DFCI based on the phase comparison result, and outputs the frequency control data DFCQ after the signal processing to the oscillation signal generating circuit 140. The oscillation signal generation circuit 140 generates the oscillation signal OSCK using the frequency control data DFCQ and the oscillator XTAL from the processing unit 50, and outputs the oscillation signal OSCK to the frequency control data generation unit 40 (phase comparison unit 41). Thus, a loop circuit is formed by the PLL circuit such as the frequency control data generating unit 40 (phase comparing unit 41) and the oscillation signal generating circuit 140, and the oscillation signal OSCK can be generated accurately in phase synchronization with the reference signal RFCK.

In the present embodiment, the kalman filter unit 54 of the processing unit 50 operates to perform the kalman filter process on the frequency control data DFCI even during the normal operation period before the hold mode is detected. Namely, the following processing is performed: the true value of the observation value for the frequency control data DFCI is estimated by the kalman filtering process.

When the hold mode is detected, the true value at the time corresponding to the detection time of the hold mode is stored in the processing unit 50. Specifically, the aging correction unit 56 stores the true value. The aging correction unit 56 performs arithmetic processing based on the stored true values, thereby generating the frequency control data DFCQ after the aging correction.

In this way, since the burn-in correction is performed based on the true value at the time corresponding to the detection time of the hold mode, the accuracy of the burn-in correction can be greatly improved. That is, aging correction in consideration of the influence of observation noise and system noise can be realized.

When the hold mode is restored, the oscillation signal generation circuit 140 generates the oscillation signal OSCK based on the frequency control data DFCQ based on the phase comparison result. The oscillation signal OSCK is generated based on, for example, the frequency control data DFCQ input from the frequency control data generation unit 40 (phase comparison unit 41) via the processing unit 50. For example, when the reference signal RFCK disappears or an abnormal state, the state of the hold mode is released and the hold mode is recovered. In this case, the operation of the circuit device is returned to the normal operation. The oscillation signal generation circuit 140 generates the oscillation signal OSCK based on the frequency control data DFCQ (frequency control data after signal processing such as temperature compensation processing) input from the frequency control data generation unit 40 via the processing unit 50, without using the frequency control data DFCQ generated by the processing unit 50 through aging correction.

The processing unit 50 performs an arithmetic process of adding a correction value to the stored true value (an arithmetic process of compensating for a frequency change due to aging), thereby generating the frequency control data DFCQ after the aging correction. The frequency control data DFCQ after the aging correction is generated by, for example, sequentially adding a correction value (correction value for canceling the frequency change due to the aging rate) corresponding to the aging rate (gradient of the aging, aging coefficient) and a true value at a time corresponding to the detection time of the hold pattern at each predetermined time. The addition processing in the present embodiment includes subtraction processing, which is processing of adding a negative value.

For example, the correction value at time step k is d (k), and the frequency control data after aging correction at time step k is ac (k). In this case, the processing unit 50 obtains the aging-corrected frequency control data AC (k +1) at time step k +1 from AC (k +1) ═ AC (k) + d (k). The processing unit 50 performs such addition processing of the correction values d (k) at each time step until the time of return from the hold mode (release time).

The processing unit 50 performs an arithmetic operation of adding the correction value after the filter process to the true value. For example, filtering processing such as low-pass filtering processing is performed on correction value D (k), and arithmetic processing is performed by sequentially adding filtered correction value D' (k) to the true value. Specifically, the arithmetic processing of AC (k +1) ═ AC (k) + D' (k) is performed.

The processing unit 50 also obtains a correction value from the observation residual in the kalman filter process. For example, the processing unit 50 performs a process of estimating a correction value of the aging correction from the observation residual until the hold mode is detected. For example, when the observation residual is ek, the correction value D (k) is estimated by performing the processing of D (k) ═ D (k-1) + E · ek. Here, E is a constant, for example, but a kalman gain may be used instead of the constant E. Then, the frequency control data DFCQ after the aging correction is generated by storing the correction value at the time corresponding to the detection time of the hold mode and performing an arithmetic process of adding the stored correction value to the true value.

Fig. 7 shows a detailed configuration example of the circuit device of the present embodiment. In fig. 7, the configuration of fig. 6 is further provided with a temperature sensor 10, an a/D conversion section 20, an I/F section 30, a register section 32, and a storage section 34. The configuration of the circuit device is not limited to the configuration of fig. 7, and various modifications may be made to omit some of the components or add other components. For example, a temperature sensor provided outside the circuit device may be employed as the temperature sensor 10.

The temperature sensor 10 outputs a temperature detection voltage VTD. Specifically, a temperature-dependent voltage that changes in accordance with the temperature of the environment (circuit device) is output as the temperature detection voltage VTD. A specific configuration example of the temperature sensor 10 will be described later.

The a/D conversion unit 20 performs a/D conversion of the temperature detection voltage VTD from the temperature sensor 10 and outputs temperature detection data DTD. For example, digital temperature detection data DTD (a/D result data) corresponding to the a/D conversion result of the temperature detection voltage VTD is output. As the a/D conversion method of the a/D conversion unit 20, for example, a successive approximation method, a method similar to the successive approximation method, or the like can be used. The a/D conversion method is not limited to this method, and various methods (counter type, parallel comparison type, series-parallel type, or the like) can be employed.

The digital I/F section (interface section) 30 is an interface for inputting and outputting digital data between the circuit device and an external device (microcomputer, controller, etc.). The digital I/F unit 30 can be realized by, for example, a synchronous serial communication system using a serial clock line and a serial data line. Specifically, the present invention can be realized by an I2C (Inter-Integrated Circuit) system, a 3-wire or 4-wire SPI (Serial Peripheral Interface) system, or the like. The I2C scheme is a synchronous serial communication scheme in which communication is performed via 2 signal lines, i.e., a serial clock line SCL and a bidirectional serial data line SDA. A plurality of slave devices can be connected to the bus of I2C, and the master device communicates with the slave device after designating an address of an individually determined slave device and selecting the slave device. The SPI system is a synchronous serial communication system that communicates with the 2 unidirectional serial data lines SDI and SDO via the serial clock line SCK. Multiple slave devices can be connected on the SPI bus and to identify these slave devices, the master device needs to select the slave device using a slave device select line. The digital I/F unit 30 is configured by an input/output buffer circuit, a control circuit, and the like that realize these communication methods.

The register unit 32 is a circuit including a plurality of registers such as a status register, a command register, and a data register. An external device of the circuit device accesses each register of the register section 32 via the digital I/F section 30. The external device can check the state of the circuit device using the register of the register unit 32, issue a command to the circuit device, transfer data to the circuit device, and read data from the circuit device.

The storage unit 34 stores various information necessary for various processes and operations of the circuit device. The storage unit 34 can be realized by, for example, a nonvolatile memory. As the nonvolatile memory, for example, EEPROM or the like can be used. As the EEPROM, for example, a MONOS (Metal-Oxide-Nitride-Silicon) type memory or the like can be used. For example, a flash memory using a MONOS type memory can be used. Alternatively, as the EEPROM, other types of memories such as a floating gate type can be used. The storage unit 34 may be implemented by, for example, a fuse circuit, as long as it is a memory capable of storing and storing information even when power is not supplied.

The processing unit 50 includes a temperature compensation unit 58 (a circuit or a program module for temperature compensation processing) in addition to the hold mode processing unit 52, the kalman filter unit 54, and the aging correction unit 56. The temperature compensation unit 58 (processing unit 50) performs temperature compensation processing of the oscillation frequency based on the temperature detection data DTD from the a/D conversion unit 20. Specifically, the temperature compensation unit 58 performs temperature compensation processing for reducing the fluctuation of the oscillation frequency when there is a temperature change, based on temperature detection data DTD (temperature-dependent data) that changes in accordance with the temperature, coefficient data for temperature compensation processing (coefficient data of an approximation function), and the like.

The reference signal RFCK is input to the circuit device via a terminal TRFCK (pad) which is an external connection terminal of the circuit device. A signal PLOCK that notifies whether or not the external PLL circuit is in a locked state is input to the circuit device via a terminal TPLOCK (pad) that is an external connection terminal of the circuit device.

The storage unit 34 stores a system noise constant (V) for setting the system noise in the kalman filter process and an observation noise constant (W) for setting the observation noise in the kalman filter process. For example, when a product (such as an oscillator) is manufactured or shipped, various information such as an oscillation frequency is measured (checked). Then, the system noise constant and the observation noise constant are determined from the measurement result, and are written into the storage unit 34 implemented by, for example, a nonvolatile memory or the like. In this way, it is possible to realize the setting of the system noise constant and the observation noise constant with reduced adverse effects due to the element variations.

The processing unit 50 determines whether or not the state of the hold mode is set based on the voltage of the input terminal to which the hold mode detection signal is input or the hold mode detection information input via the digital I/F unit 30. These determination processes are performed by the hold mode processing unit 52. For example, the holding mode processing section 52 has a circuit of a state machine whose state transition is performed based on various signals and information. When it is determined that the state is in the hold mode based on the voltage of the input terminal to which the detection signal of the hold mode is input, the detection information of the hold mode input via the digital I/F unit 30, and the like, the state of the state machine is changed to the state of the hold mode. Various processes (aging correction, etc.) at the time of the hold mode are then executed.

For example, the reference signal RFCK and the signal PLOCK can be assumed as the detection signals of the hold mode. In this case, the processing unit 50 determines whether or not the state of the hold mode is established based on the voltage of the terminal TRFCK to which the reference signal RFCK is input and the voltage of the terminal TPLOCK to which the signal PLOCK is input.

For example, when the PLL circuit is formed by the frequency control data generation unit 40 provided inside the circuit device, whether or not the state is in the hold mode can be determined based on the voltage of the terminal TRFCK to which the reference signal RFCK is input. For example, when detecting that the reference signal RFCK is in a state of being lost or abnormal from the voltage of the terminal TRFCK, the processing unit 50 determines that the state is the hold mode.

On the other hand, when the PLL circuit is formed by the frequency control data generator provided outside the circuit device, it is possible to determine whether or not the state of the hold mode is set based on the voltage of the terminal TPLOCK to which the signal PLOCK is input. For example, an external device (a device that controls the external PLL circuit) outputs a signal PLOCK to the circuit device, which notifies whether the external PLL circuit has become a locked state. For example, when the external PLL circuit is determined not to be in the locked state by the signal PLOCK, the processing unit 50 determines that the external PLL circuit is in the hold mode. In addition to the signal PLOCK, the reference signal RFCK may be used to determine whether or not the hold mode is set. The external PLL circuit is, for example, a PLL circuit including a frequency control data generation unit provided outside the circuit device, an oscillation signal generation circuit 140 of the circuit device, and the like.

In the case where the PLL circuit is formed by a frequency control data generation unit provided outside the circuit device, it is possible to determine whether or not the state of the hold mode is set based on the detection information of the hold mode input via the digital I/F unit 30. For example, when an external device (for example, a microcomputer) that controls the external PLL circuit determines that the state of the hold mode is established based on the disappearance or abnormality of the reference signal, the detection information of the hold mode is set in the register (notification register) of the register unit 32 via the digital I/F unit 30. The processing unit 50 reads the detection information of the hold mode set in the register to determine whether or not the state of the hold mode is set. Thus, it is not necessary to newly provide a terminal for detection of the hold mode, and the number of terminals of the circuit device can be reduced.

3. Aging correction using kalman filtering process

In the present embodiment, an aging correction method using kalman filter processing is employed. Specifically, in the present embodiment, during a period until the hold mode is detected, the true value of the observation value for the frequency control data (oscillation frequency) is estimated by the kalman filter process. When the hold mode is detected, the aging correction is realized by storing the true value at the time (time point) corresponding to the detection time of the hold mode and performing the arithmetic processing based on the stored true value.

Fig. 8 is a graph showing an example of measurement results of the fluctuation of the oscillation frequency due to aging. The horizontal axis represents elapsed time (aging time), and the vertical axis represents frequency deviation (Δ f/f) of oscillation frequency₀). As shown in C1 in fig. 8, there is a large variation in the measurement value as the observation value due to system noise or observation noise. The deviation also includes a deviation caused by the ambient temperature.

In order to accurately obtain a true value in a situation where there is a large variation in the measured values as described above, in the present embodiment, state estimation by kalman filtering (for example, linear kalman filtering) is performed.

Fig. 9 shows a time-series state space model whose discrete time state equations are given by the state equations and observation equations of the following equations (3) and (4).

x(k+1)＝A·x(k)+v(k)···(3)

y(k)＝x(k)+w(k)···(4)

x (k) is the state at time k, and y (k) is the observed value. v (k) is system noise, w (k) is observation noise, and A is the system matrix. In the case where x (k) is an oscillation frequency (frequency control data), a corresponds to, for example, an aging rate (aging coefficient). The aging rate represents the rate of change of the oscillation frequency with respect to the elapsed period.

For example, it is assumed that the hold mode is generated at the time indicated by C2 in fig. 8. In this case, the aging correction is performed based on the true state x (k) at the time of C2 at which the reference signal RFCK is interrupted, and the aging rate (a) equivalent to the slope shown in C3 of fig. 8. Specifically, as compensation (correction) for reducing the frequency change due to the aging rate shown by C3, for example, aging correction is performed in which the true values x (k) of the oscillation frequency (frequency control data) at the time of C2 are sequentially changed so as to cancel (cancel) the frequency change. That is, the frequency change at the aging rate shown in B2 of fig. 3 is canceled, so that the correction value which becomes the ideal characteristic shown in B1 changes the true value x (k). Thus, for example, when the period of the hold mode is 24 hours, the FDV of fig. 8, which is the fluctuation of the oscillation frequency after the elapse of 24 hours, can be compensated by the aging correction.

Here, the fluctuation of the oscillation frequency (frequency deviation) shown in C1 in fig. 8 includes a fluctuation due to temperature fluctuation and a fluctuation due to aging. Therefore, in the present embodiment, for example, by using an oscillator (OCXO) having a thermostat structure with a thermostat, the fluctuation of the oscillation frequency due to the temperature fluctuation is suppressed to the minimum. Further, temperature compensation processing for reducing the fluctuation of the oscillation frequency caused by the temperature fluctuation is performed using the temperature sensor 10 of fig. 7 or the like.

In a period (normal operation period) in which the PLL circuit (internal PLL circuit, external PLL circuit) is synchronized with the reference signal RFCK, the frequency control data (frequency control code) is monitored, and a true value obtained by removing an error (system noise, observation noise) is obtained and stored in the register. When the lock of the PLL circuit is released due to disappearance or abnormality of the reference signal RFCK, the aging correction is performed based on the true value (true value of the observed value of the frequency control data) held at the time of release of the lock. For example, as compensation for reducing the frequency change due to the aging rate which is the slope of C3 in fig. 8, the frequency control data DFCQ at the time of self-oscillation during the hold mode is generated by sequentially adding, for example, correction values for eliminating the frequency change to the true values of the stored frequency control data, and the oscillator XTAL is oscillated. In this way, since the true value at the time of entering the hold mode can be obtained with the minimum error and the aging correction can be executed, it is possible to realize the hold mode performance in which the adverse effect due to the aging variation is minimized.

4. Structure of processing part

Fig. 10 shows a detailed configuration example of the processing unit 50. The configuration of the processing unit 50 is not limited to the configuration shown in fig. 10, and various modifications may be made to omit some of the components and add other components.

As shown in fig. 10, the processing unit 50 includes a kalman filter unit 54, an aging correction unit 56, a temperature compensation unit 58, selectors 62 and 63, and an adder 65.

The kalman filter 54 receives frequency control data DFCI (frequency control data from which the environment fluctuation component is removed) and performs a kalman filter process. Further, a posterior estimated value x ^ (k) equivalent to a true value estimated by the Kalman filtering process is output. In the present specification, the symbol "^" indicating a hat shape which is an estimated value is described as being appropriately arranged in 2 characters.

The kalman filter process refers to a process of: assuming that noise (error) is included in the observation value and the variable representing the state of the system, the optimal state of the system is estimated using the observation values taken from the past to the present. Specifically, the state is estimated by repeating observation update (observation process) and time update (prediction process). Observation update is the process of updating kalman gain, estimated value, error covariance using the results of the observation and time updates. Time update is a process of predicting the estimated value, error covariance at the next time using the results of observation update. In the present embodiment, the method using the linear kalman filter process has been mainly described, but the extended kalman filter process may be adopted. The kalman filter process according to the present embodiment will be described in detail later.

The aging correction section 56 inputs the posterior estimation value x ^ (k) and the correction value D' (k) from the Kalman filtering section 54. Then, the aging-corrected frequency control data, that is, AC (k), is generated by performing an arithmetic process of adding the correction value D' (k) to the posterior estimate value x ^ (k) corresponding to the true value of the frequency control data. Here, D' (k) is the correction value D (k) after the filter processing (after the low-pass filter processing). That is, when the correction value (the correction value after the filtering process) at time step k (time k) is D '(k) and the frequency control data after the aging correction at time step k is AC (k), the aging correction unit 56 obtains the frequency control data AC (k +1) after the aging correction at time step k +1 (time k +1) from AC (k +1) ═ AC (k) + D' (k).

The temperature compensation unit 58 receives the temperature detection data DTD as input, performs temperature compensation processing, and generates temperature compensation data TCODE (temperature compensation code) for keeping the oscillation frequency constant with respect to temperature fluctuation. The temperature detection data DTD is data obtained by a/D converting the temperature detection voltage VTD from the temperature sensor 10 by the a/D conversion section 20 of fig. 7.

For example, fig. 11, 12, and 13 show examples of the initial oscillation frequency temperature characteristic. In these figures, the horizontal axis represents the ambient temperature, and the vertical axis represents the frequency deviation of the oscillation frequency. As shown in fig. 11 to 13, the temperature characteristics of the oscillation frequency largely deviate depending on the sample of each product. Therefore, in an inspection process at the time of manufacturing and shipment of a product (oscillator), a temperature characteristic of an oscillation frequency and a change characteristic of temperature detection data corresponding to an ambient temperature are measured. And the coefficient A of a polynomial (approximate function) of the following equation (5) is obtained from the measurement result₀～A₅Coefficient A to be obtained₀～A₅The information (b) is written into the storage unit 34 (nonvolatile memory) in fig. 7 and stored.

TCODE＝A₅·X⁵+A₄·X⁴+A₃·X³+A₂·X²+A₁·X+A₀···(5)

In the above equation (5), X corresponds to the temperature detection data DTD (a/D conversion value) obtained by the a/D conversion unit 20. Since the change in the temperature detection data DTD with respect to the change in the ambient temperature is also measured, the ambient temperature can be associated with the oscillation frequency by the approximate function expressed by the polynomial expression of the above expression (5). Temperature compensation unit 58 reads out coefficient a from storage unit 34₀～A₅According to the coefficient A₀～A₅The arithmetic processing of the above equation (5) is performed with the temperature detection data DTD (═ X), and temperature compensation data TCODE (temperature compensation code) is generated. This enables temperature compensation processing for keeping the oscillation frequency constant with respect to the change in the ambient temperature.

When the logic level of the input signal to the selection terminal S is "1" (active), the selectors 62 and 63 select the input signal to the terminal on the "1" side and output the selected signal as an output signal. When the logic level of the input signal to the selection terminal S is "0" (invalid), the input signal to the terminal on the "0" side is selected and output as the output signal.

The signal KFEN is an enable signal of the kalman filtering process. The kalman filter unit 54 executes the kalman filter process when the signal KFEN is at the logic level "1" (hereinafter, abbreviated as "1"). The signal PLLLOCK is a signal that becomes "1" when the PLL circuit is in a locked state. The signal HOLDOVER is a signal that becomes "1" during the holding mode in which the holding mode is detected. These signals PLLLOCK and HOLDOVER are generated by a circuit of the state machine of the holding mode processing section 52 of fig. 7.

The signal TCEN is an enable signal of the temperature compensation process. Hereinafter, a case where the signal TCEN is "1" and the selector 63 selects the input signal on the "1" side will be mainly described as an example. Further, the signal KFEN is also "1".

During the normal operation, since the signal HOLDOVER is at the logic level "0" (hereinafter, abbreviated as "0"), the selector 62 selects the frequency control data DFCI on the "0" terminal side, and the adder 65 adds the temperature compensation data TCODE to the frequency control data DFCI, so that the frequency control data DFCQ after the temperature compensation process is output to the oscillation signal generating circuit 140 at the subsequent stage.

On the other hand, during the hold mode, the signal HOLDOVER is "1", and the selector 62 selects ac (k) on the "1" terminal side. Ac (k) is the aging-corrected frequency control data.

Fig. 14 is a truth table for explaining the operation of the kalman filter unit 54. When both the signals PLLLOCK and KFEN are "1", the kalman filter unit 54 executes the truth estimation process (kalman filter process). That is, when the PLL circuit (internal or external PLL circuit) is in a locked state during the normal operation period, the true value estimation process of the frequency control data DFCI as the observation value is continuously performed.

When the lock of the PLL circuit is released and the signal PLLLOCK is "0" in the state of the hold mode, the kalman filter unit 54 holds the previous output state. For example, in fig. 10, the value at the detection timing of the hold mode (the timing of releasing the lock of the PLL circuit) is stored and continuously output as the posterior estimate value x ^ (k) estimated as the true value of the frequency control data DFCI and the correction value D' (k) for the aging correction.

The aging correction unit 56 performs aging correction using the posterior estimation value x ^ (k) and the correction value D' (k) from the Kalman filtering unit 54 during the hold mode. Specifically, the posterior estimate value x ^ (k) and the correction value D' (k) at the detection time of the hold mode are stored, and burn-in correction is performed.

In fig. 10, the kalman filter unit 54 receives frequency control data DFCI from which the temperature fluctuation component (environment fluctuation component in a broad sense) and the aging fluctuation component are removed. The kalman filter 54 performs kalman filtering on the frequency control data DFCI from which the temperature fluctuation component (environment fluctuation component) is removed, and estimates a true value for the frequency control data DFCI. That is, the posterior estimate x ^ (k) is obtained. The aging correction unit 56 performs aging correction based on the estimated truth value, i.e., the posterior estimation value x ^ (k). More specifically, the aging-corrected frequency control data AC (k) is obtained from the posterior estimation value x ^ (k) and the correction value D' (k) from the Kalman filtering unit 54. The frequency control data after the aging correction, i.e., ac (k), is input to the adder 65 via the selector 62, and the adder 65 performs processing of adding the temperature compensation data TCODE (data for compensating for an environmental fluctuation component) to ac (k).

For example, as shown in the schematic diagram of fig. 15, when the temperature varies, the frequency control data also varies in accordance with the variation as shown in E1. Therefore, when the kalman filter process is performed using the frequency control data that fluctuates with temperature fluctuations, such as E1, the true value at the hold pattern detection time fluctuates as well.

Therefore, in the present embodiment, the frequency control data from which the temperature fluctuation component is removed is acquired and input to the kalman filter unit 54. That is, the frequency control data from which the temperature fluctuation component (environmental fluctuation component) and the aging fluctuation component are removed is input to the kalman filter unit 54. That is, the frequency control data shown in E2 of fig. 15 is input. The frequency control data of E2 is frequency control data from which the temperature fluctuation component is removed and the aging fluctuation component remains.

The kalman filter unit 54 performs kalman filtering on the frequency control data DFCI from which the temperature fluctuation component is removed and the aging fluctuation component remains, thereby obtaining the posterior estimation value x ^ (k) of the estimated true value and the correction value D' (k) of the aging correction. The posterior estimate value x ^ (k) and the correction value D' (k), which are the true values estimated at the detection time of the hold mode, are stored in the aging correction unit 56 and used to perform aging correction.

For example, the adder 65 adds the temperature compensation data TCODE, and the frequency control data DFCQ becomes the frequency control data subjected to the temperature compensation. Therefore, the oscillation signal generation circuit 140 to which the frequency control data DFCQ is input outputs the oscillation signal OSCK of the oscillation frequency after temperature compensation. Therefore, the frequency control data generating unit 40 of fig. 7, which constitutes a PLL circuit together with the oscillation signal generating circuit 140, supplies the frequency control data DFCI from which the temperature fluctuation component is removed to the processing unit 50 as shown in E2 of fig. 15. As shown in E2 in fig. 15, the frequency control data DFCI from which the temperature fluctuation component is removed has an aging fluctuation component remaining therein that changes with time. Therefore, the kalman filter 54 of the processing unit 50 performs the kalman filter process on the frequency control data DFCI in which the aging fluctuation component remains, and if the aging corrector 56 performs the aging correction based on the result of the kalman filter process, it is possible to realize the aging correction with high accuracy.

As a modification of fig. 10, instead of the process of adding the temperature compensation data TCODE to the adder 65, a calculation process of removing the temperature fluctuation component (environment fluctuation component) of the frequency control data DFCI may be performed, and the frequency control data DFCI after the calculation process may be input to the kalman filter unit 54. For example, the adder 65 and the selector 63 in fig. 10 are omitted, a subtractor for subtracting the temperature compensation data TCODE from the frequency control data DFCI is provided in a stage prior to the kalman filter unit 54, and the output of the subtractor is input to the kalman filter unit 54. An adder for adding the output of the aging correction unit 56 and the temperature compensation data TCODE is provided between the aging correction unit 56 and the selector 62, and the output of the adder is input to the terminal on the "1" side of the selector 62. With this configuration, the frequency control data DFCI from which the temperature fluctuation component is removed and only the aging fluctuation component remains can be input to the kalman filter unit 54.

Fig. 16 shows a detailed configuration example of the aging correcting unit 56. During the normal operation, the signal HOLDOVER is "0", and therefore, the selectors 360 and 361 select the "0" terminal side. Thus, during the normal operation period, the posterior estimated value x ^ (k) and the correction value D' (k) (the correction value after the filtering process) calculated by the kalman filter unit 54 are stored in the registers 350 and 351, respectively.

When the hold mode is detected and the signal HOLDOVER is "1", the selectors 360 and 361 select the "1" terminal side. Thus, during the hold mode period, selector 361 continues to output correction value D' (k) stored in register 351 at the detection time of the hold mode.

Furthermore, the adder 340 performs the following processing: at each time step, correction value D' (k) (correction value) output from selector 361 and stored in register 351 is sequentially added to a posterior estimate value x ^ (k) stored in register 350 at the detection time of the hold mode. Thereby, aging correction shown in the following formula (6) is realized.

AC(k+1)＝AC(k)+D′(k)···(6)

That is, the following processing is performed to realize the aging correction: the correction value D' (k) for canceling (compensating) the frequency change caused by the aging rate corresponding to the slope of C3 is sequentially added to the posterior estimation value x ^ (k), which is the true value held at the time of C2 in fig. 8.

5. Kalman filtering process

Next, the kalman filter process according to the present embodiment will be described in detail. Fig. 17 shows a model example of kalman filtering. The equation of state and the observation equation of the model in fig. 17 are expressed by the following equations (7) and (8).

x(k+1)＝A·x(k)+v(k)···(7)

y(k)＝C^T·x(k)+w(k)···(8)

K denotes a time step as discrete time. x (k) is the state of the system at time step k (time k), e.g., an n-dimensional vector. A is called the system matrix. Specifically, a is an n × n matrix, and relates the state of the system at time step k to the state of the system at time step k +1 when there is no system noise. v (k) is system noise. y (k) is an observed value, and w (k) is observed noise. C is an observation coefficient vector (n-dimensional), and T represents a transposed matrix.

In the kalman filtering process of the models of the above equations (7) and (8), the following equations (9) to (13) are performed to estimate the true value.

P^-(k)＝A·P(k-1)·A^T+v(k)···(10)

P(k)＝(1-G(k)·C^T)·P^-(k)···(13)

x ^ (k): posterior estimate

x^^-(k) The method comprises the following steps A priori estimate

P (k): posterior covariance

P^-(k) The method comprises the following steps Prior covariance

G (k): kalman gain

The above expressions (9) and (10) are expressions of temporal update (prediction process), and the above expressions (11) to (13) are expressions of observation update (observation process). Every time the time step k, which is a discrete time, advances by 1, time updates (expressions (9) and (10)) and observation updates (expressions (11) and (13)) of the kalman filter process are performed 1 time.

And x ^ (k) and x ^ (k-1) are the posterior estimated values of the Kalman filtering processing of time steps k and k-1. x ^ a^-(k) Is obtainedA priori estimate of the prediction prior to the observation. P (k) is the A posteriori covariance of the Kalman Filter Process, P^-(k) Is the a priori covariance predicted before the observed value is obtained. G (k) is the Kalman gain.

In the kalman filter process, the kalman gain g (k) is obtained by the above equation (11) in the observation update. Furthermore, the posterior estimate x ^ (k) is updated by equation (12) above based on the observed value y (k). Further, the a posteriori covariance p (k) of the error is updated by the above equation (13).

Further, in the Kalman filtering process, in time updating, as shown in the above equation (9), from the posterior estimate value x ^ (k-1) of time step k-1 and the system matrix A, the prior estimate value x ^ of the next time step k is predicted^-(k) In that respect Furthermore, as shown in the above equation (10), the prior covariance P at the next time step k is predicted from the posterior covariance P (k-1) at the time step k-1, the system matrix A, and the system noise v (k)^-(k)。

In addition, when the kalman filter processing of the above equations (9) to (13) is to be executed, the processing load of the processing unit 50 may become excessive, which may lead to a large-scale circuit device. For example, to find x ^ of the above formula (9)^-(k) Ax ^ (k-1) requires extended Kalman filtering. Moreover, the processing load of the extended kalman filter processing is very heavy, and when the processing unit 50 is to be realized by hardware capable of performing the extended kalman filter processing, the circuit area of the processing unit 50 tends to become very large. Therefore, it is not appropriate in a situation where miniaturization is strongly demanded for a circuit device incorporating an oscillator. On the other hand, when a scalar value of a fixed value is used as the system matrix a, the difficulty in achieving appropriate aging correction is increased.

Therefore, as a solution to avoid such a situation, in the present embodiment, the kalman filter process is realized by the processes based on the following expressions (14) to (19) instead of the above expressions (9) to (13). That is, the processing unit 50 (kalman filter unit 54) executes the kalman filter processing based on the following expressions (14) to (19).

P^-(k)＝P(k-1)+v(k)···(15)

P(k)＝(1-G(k))·P^-(k)···(18)

In the present embodiment, x (k) that is the target of the estimation process of the true value is frequency control data, and since the observation value y (k) is also frequency control data, C is 1. Further, since the scalar value of a is infinitely close to 1, the above expression (15) can be used instead of the above expression (10).

As described above, in the Kalman filtering process of the present embodiment, the a priori estimate value x ^ of time k is obtained by adding the a posteriori estimate value x ^ (k-1) at time step k-1 and the correction value D (k-1) as shown in equation (14) above, compared to the case where the extended Kalman filtering process is adopted as the Kalman filtering process^-(k) In that respect Therefore, the extended kalman filter process is not required, and the processing load of the processing unit 50 can be reduced, and an increase in the circuit scale can be suppressed.

In the present embodiment, the above expression (14) is derived by a modification of the following expression.

For example, the above formula (20) can be modified as the above formula (21). Here, since (A-1) in the above expression (21) is a very small number, (A-1). xFalpha (k-1) can be replaced with (A-1). Ff as shown in the above expressions (22) and (23)₀An approximation of. Then, the user can use the device to perform the operation,subjecting the (A-1) to F₀The correction value D (k-1) is substituted.

As shown in equation (19), when time is updated from time step k-1 to time step k, correction value D (k) ═ D (k-1) + E · (y (k) — x ^ is performed^-(k) D (k-1) + E · ek. Here, ek ═ y (k) -x ^ x^-(k) Referred to as the observation residual in the kalman filtering process. Further, E is a constant. In addition, instead of the constant E, a modification using the kalman gain g (k) may be performed. That is, D (k) may be D (k-1) + g (k) ek.

In this way, in equation (19), when the observation residual is ek and the constant is E, correction value D (k) is obtained from D (k) ═ D (k-1) + E · ek. In this way, the process of updating the correction value d (k) in which the observation residual ek in the kalman filter process is reflected can be performed.

Fig. 18 shows a configuration example of the kalman filter 54. The kalman filter unit 54 includes adders 300, 301, 302, 303, and 304, a multiplier 305, registers 310, 311, 312, and 313, selectors 320 and 321, filters 330 and 331, and calculators 332 and 333. The configuration of the kalman filter unit 54 is not limited to the configuration shown in fig. 18, and various modifications may be made such as omitting some of the components and adding other components. For example, the processing of the adders 300 to 304 and the like can be realized by time division processing of 1 arithmetic unit.

The arithmetic processing of the above equation (14) is executed by the adder 304 and the register 312. Information on the system noise constant V for setting the system noise and the observation noise constant W for setting the observation noise is read from the storage unit 34 in fig. 7 and input to the kalman filter unit 54 (the processing unit 50). Then, the arithmetic processing of the above equation (15) is executed by the adder 300 and the register 310. The arithmetic unit 332 calculates the kalman gain g (k) by executing the arithmetic processing of the above expression (16). Then, based on the obtained kalman gain g (k), the arithmetic processing of the above equation (17) is executed by the adder 301, the multiplier 305, and the adder 302. The arithmetic unit 333 calculates the posterior covariance p (k) by performing the arithmetic processing of expression (18).

Furthermore, the above equation is executed by the adder 303, the register 311, and the filter 330(19) The arithmetic processing of (1). The information of the constant E input to the filter 330 is read from the storage unit 34 in fig. 7. The constant E corresponds to a correction coefficient (filter constant) of the aging rate. For example, filter 330 performs gain adjustment based on constant E, thereby enabling E- (y (k) -x ^ of equation (19) above^-(k))。

When the signals PLLLOCK and KFEN are "1", the selectors 320 and 321 select the input signal of the terminal on the "1" side. The output signal of the selector 320 is saved into the register 313. Therefore, after the hold mode is set to the state and the signal PLLLOCK is changed from "1" to "0", x ^ (k), which is the true value at the detection time of the hold mode, is stored in the register 313.

The filter 331 performs filter processing on the correction value d (k). Specifically, digital low-pass filtering processing is performed on correction value D (k), and correction value D' (k) after the filtering processing is input to aging correction unit 56 in fig. 16. The constant J is a filter constant of the filter 331. The optimum cutoff frequency of the filter 331 is set according to the constant J.

For example, as can be seen from fig. 8, there is a finely varying fluctuation in the correction value d (k) that compensates for the frequency change caused by the aging rate. Therefore, after the correction value d (k) having such a fluctuation is added to the true value, the accuracy of the aging correction is degraded.

In this regard, in the present embodiment, the correction value D' (k) after the filtering process is added to the true value, so that aging correction with higher accuracy can be realized.

As described above, in the present embodiment, as shown in the above equation (14), the processing unit 50 performs the following processing in the process of updating the prior estimate value (time update) in the kalman filter processing: the prior estimation value x ^ (k ^) at the current time is obtained by adding the posterior estimation value x ^ (k-1) at the previous time to the correction value D (k-1)^-(k) In that respect Then, aging correction of the frequency control data is performed based on the result of the kalman filter process. That is, the addition processing of the posterior estimated value x ^ (k-1) of the time step k-1 at the previous time and the correction value D (k-1) is performed, and x ^ is used^-(k) X ^ (k-1) + D (k-1) to find the prior estimate of time step k at this timeValue x ^^-(k)。

Then, the processing unit 50 (aging correction unit 56) performs aging correction based on the result (true value, correction value) of the kalman filter process. That is, when the correction value at time step k is D (k) (or D '(k)) and the frequency control data after aging correction at time step k is AC (k), the frequency control data AC (k +1) after aging correction at time step k +1 is obtained from AC (k +1) ═ AC (k) + D (k) (or AC (k) + D' (k)).

As shown in equation (19), the processing unit 50 obtains the correction value D (k) at the current time from the correction value D (k-1) at the previous time and the observation residual ek in the kalman filter process. For example, correction value D (k) at the present time is obtained by adding E · ek (or g (k) · ek) which is a value based on the observation residual to correction value D (k-1) at the previous time. Specifically, correction value D (k) for time step k at the present time is obtained from correction value D (k-1) for time step k-1 at the previous time and observation residual ek in kalman filter processing. For example, when the observation residual is ek and the constant is E, correction value D (k) is obtained from D (k) ═ D (k-1) + E · ek.

For example, in the present embodiment, as described with reference to fig. 15, the environment fluctuation component information such as the temperature fluctuation component information is acquired, and the frequency control data from which the environment fluctuation component out of the environment fluctuation component and the aging fluctuation component is removed is acquired using the acquired environment fluctuation component information. Here, the environment fluctuation component information may be a power supply voltage fluctuation component, an air pressure fluctuation component, a gravity fluctuation component, or the like. Then, aging correction is performed based on the frequency control data from which the environment fluctuation component is removed. Specifically, the environment fluctuation component is defined as temperature. In this case, temperature fluctuation component information, which is environment fluctuation component information, is acquired from temperature detection data DTD obtained from a temperature detection voltage VTD from the temperature sensor 10 of fig. 7, which is an environment fluctuation information acquiring unit for acquiring the environment fluctuation component information. Then, frequency control data from which the temperature fluctuation component is removed is acquired using the acquired temperature fluctuation component information. For example, the temperature compensation unit 58 in fig. 10 acquires the temperature compensation data TCODE, and the adder 65 performs the addition processing of the temperature compensation data TCODE, whereby the frequency control data DFCI from which the temperature fluctuation component is removed is input from the frequency control data generation unit 40 and acquired by the processing unit 50. That is, as shown in E2 in fig. 15, the frequency control data DFCI from which the temperature fluctuation component is removed and the aging fluctuation component remains is acquired and input to the kalman filter unit 54.

The frequency control data from which the environmental fluctuation component is removed includes frequency control data in an appropriate state from which the environmental fluctuation component is completely removed, and also includes frequency control data in a state in which the environmental fluctuation component is present to a negligible extent in the frequency control data.

For example, the environment fluctuation component information such as the temperature fluctuation component information or the power supply voltage fluctuation component information can be acquired by a temperature sensor, a voltage detection circuit, or the like, which is an environment fluctuation information acquisition unit that detects the environment fluctuation component information. On the other hand, the aging fluctuation component is a fluctuation component of the oscillation frequency that changes with time, and it is difficult to directly detect information of the aging fluctuation component by a sensor or the like.

Therefore, in the present embodiment, the environment fluctuation component information such as the temperature fluctuation component information detectable by the sensor or the like is acquired, and the frequency control data from which the environment fluctuation component out of the environment fluctuation component and the aging fluctuation component is removed is acquired by using the environment fluctuation component information. That is, by performing a process of removing the environmental fluctuation component from the fluctuation component of the frequency control data (for example, an addition process by the adder 65), the frequency control data in which only the aged fluctuation component remains can be acquired as shown in E2 of fig. 15. Then, if kalman filtering or the like is performed on the frequency control data in which the aging fluctuation component remains, it is possible to estimate a true value for the frequency control data. Further, if the burn-in correction is performed based on the truth value estimated in this way, it is possible to realize the burn-in correction with high accuracy which has not been realized in the conventional example.

As described above, in the present embodiment, the frequency control data DFCI from which the temperature fluctuation component (environment fluctuation component) is removed and the aging fluctuation component remains is input to the kalman filter unit 54. Further, as shown in fig. 1 and 8, if the period is defined, it can be assumed that the oscillation frequency changes at a constant aging rate during the period. A constant slope change can be assumed, for example as shown at C3 of fig. 8.

In the present embodiment, a correction value for compensating (canceling) a frequency change at a constant aging rate due to such an aging fluctuation component is obtained by the expression D (k) ═ D (k-1) + E · ek. That is, the correction value d (k) for compensating for the frequency change caused by the aging rate corresponding to the slope of C3 of fig. 8 is found. Here, the aging rate is not constant, but varies with the passage of time as shown in fig. 1 and 8.

In contrast, in the present embodiment, the observation residual ek ═ y (k) -x ^ according to the kalman filter process, as D (k) ═ D (k-1) + E · ek, is^-(k) The correction value d (k) corresponding to the aging rate is updated. Therefore, it is possible to realize the update processing of the correction value d (k) that also reflects the change in the aging rate corresponding to the elapsed time. Therefore, aging correction with higher accuracy can be realized.

For example, fig. 19 shows a comparison between the measured frequency deviation and the predicted frequency deviation. D1 is the frequency deviation of the measured oscillation frequency, and D2 is the frequency deviation of the oscillation frequency predicted by the kalman filter estimation process according to the present embodiment. The predicted frequency deviation indicated by D2 falls within the allowable error range with respect to the measured frequency deviation indicated by D1, indicating that high-precision aging correction is achieved by the present embodiment.

6. Temperature sensor and oscillation circuit

Fig. 20 shows a configuration example of the temperature sensor 10. The temperature sensor 10 of fig. 20 has a current source IST, and a bipolar transistor TRT whose collector is supplied with a current from the current source IST. The bipolar transistor TRT is diode-connected such that its collector and base are connected, and outputs a temperature detection voltage VTDI having temperature characteristics to a node of the collector of the bipolar transistor TRT. The temperature characteristic of the temperature detection voltage VTDI is generated due to the temperature dependence of the base-emitter voltage of the bipolar transistor TRT. The temperature detection voltage VTDI of the temperature sensor 10 has, for example, a negative temperature characteristic (1 st order temperature characteristic with a negative gradient).

Fig. 21 shows a configuration example of the oscillation circuit 150. The oscillation circuit 150 includes a current source IBX, a bipolar transistor TRX, a resistor RX, a variable capacitance capacitor CX1, and capacitors CX2 and CX 3.

The current source IBX provides a bias current to the collector of the bipolar transistor TRX. The resistor RX is disposed between the collector and the base of the bipolar transistor TRX.

One end of the variable capacitance capacitor CX1 whose capacitance is variable is connected to one end of the oscillator XTAL. Specifically, one end of the variable capacitance capacitor CX1 is connected to one end of the oscillator XTAL via the 1 st oscillator terminal (oscillator pad) of the circuit device. One end of the capacitor CX2 is connected to the other end of the oscillator XTAL. Specifically, one end of capacitor CX2 is connected to the other end of oscillator XTAL via the 2 nd oscillator terminal (oscillator pad) of the circuit device. One end of capacitor CX3 is connected to one end of oscillator XTAL, and the other end is connected to the collector of bipolar transistor TRX.

A base-emitter current generated by oscillation of the oscillator XTAL flows in the bipolar transistor TRX. When the base-emitter current increases, the collector-emitter current of the bipolar transistor TRX increases, and the bias current branched from the current source IBX to the resistor RX decreases, so that the collector voltage VCX decreases. On the other hand, when the base-emitter current of the bipolar transistor TRX decreases, the collector-emitter current decreases, and the bias current branched from the current source IBX to the resistor RX increases, so the collector voltage VCX increases. This collector voltage VCX is fed back to the oscillator XTAL via a capacitor CX 3.

The oscillation frequency of the oscillator XTAL has a temperature characteristic compensated by an output voltage VQ (frequency control voltage) of the D/a conversion unit 80. That is, the output voltage VQ is input to the variable capacitance capacitor CX1, and the capacitance value of the variable capacitance capacitor CX1 is controlled by the output voltage VQ. When the capacitance value of the variable capacitance capacitor CX1 changes, the resonance frequency of the oscillation loop changes, and thus the fluctuation of the oscillation frequency due to the temperature characteristic of the oscillator XTAL is compensated. The variable capacitance capacitor CX1 may be implemented by, for example, a variable capacitance diode (varactor).

The oscillation circuit 150 of the present embodiment is not limited to the configuration shown in fig. 21, and various modifications can be made. For example, although the case where CX1 is used as the variable capacitance capacitor in fig. 21 has been described as an example, CX2 or CX3 may be used as the variable capacitance capacitor controlled by the output voltage VQ. In addition, a plurality of CX1 to CX3 may be variable capacitance capacitors controlled by VQ.

The oscillation circuit 150 may not include all circuit elements for oscillating the oscillator XTAL. For example, the following structure may be adopted: a part of the circuit elements is constituted by discrete components provided outside the circuit device 500, and is connected to the oscillation circuit 150 via external connection terminals.

7. Modification example

Next, various modifications of the present embodiment will be described. Fig. 22 shows a configuration example of a circuit device according to a modification of the present embodiment.

In fig. 22, unlike fig. 7, the oscillation signal generation circuit 140 is not provided with the D/a conversion unit 80. The oscillation frequency of the oscillation signal OSCK generated by the oscillation signal generation circuit 140 is directly controlled based on the frequency control data DFCQ from the processing unit 50. That is, the oscillation frequency of the oscillation signal OSCK is controlled without passing through the D/a conversion unit.

For example, in fig. 22, the oscillation signal generation circuit 140 has a variable capacitance circuit 142 and an oscillation circuit 150. The oscillation signal generation circuit 140 is not provided with the D/a conversion unit 80 of fig. 7. The variable capacitance circuit 142 is provided instead of the variable capacitance capacitor CX1 in fig. 21, and one end of the variable capacitance circuit 142 is connected to one end of the oscillator XTAL.

The capacitance value of the variable capacitance circuit 142 is controlled based on the frequency control data DFCQ from the processing unit 50. For example, the variable capacitance circuit 142 has a plurality of capacitors (capacitor array), and a plurality of switching elements (switch array) that control on and off of each switching element according to the frequency control data DFCQ. Each of the plurality of switching elements is electrically connected to each of the plurality of capacitors. By turning on or off the plurality of switching elements, the number of capacitors, one end of which is connected to one end of the oscillator XTAL, among the plurality of capacitors is changed. Thereby, the capacitance value of the variable capacitance circuit 142 is controlled, and the capacitance value of one end of the oscillator XTAL changes. Therefore, the frequency control data DFCQ can be used to directly control the capacitance value of the variable capacitance circuit 142 and control the oscillation frequency of the oscillation signal OSCK.

In addition, when the PLL circuit is configured by using the circuit device of the present embodiment, the PLL circuit of the direct digital synthesizer system can be also used. Fig. 23 shows an example of a circuit configuration in the case of the direct digital synthesizer method.

The phase comparison unit 380 (comparison operation unit) performs phase comparison (comparison operation) between the reference signal RFCK and the oscillation signal OSCK (input signal based on the oscillation signal). The digital filter 382 performs a smoothing process of the phase error. The phase comparison unit 380 may include a counter and a TDC (time-to-digital converter) in the same configuration and operation as the phase comparison unit 41 of fig. 6. The digital filter unit 382 corresponds to the digital filter unit 44 of fig. 6. The numerical control oscillator 384 is a circuit that digitally synthesizes an arbitrary frequency and waveform using a reference oscillation signal from a reference oscillator 386 having a vibrator XTAL. That is, instead of controlling the oscillation frequency based on the control voltage from the D/a converter as in the VCO, the oscillation signal OSCK of an arbitrary oscillation frequency is generated by digital arithmetic processing using digital frequency control data and the reference oscillator 386 (oscillator XTAL). With the configuration of fig. 23, an ADPLL circuit of a direct digital synthesizer system can be realized.

8. Oscillator, electronic apparatus, and moving object

Fig. 24 shows a configuration example of an oscillator 400 including the circuit device 500 of the present embodiment. As shown in fig. 24, oscillator 400 includes oscillator 420 and circuit device 500. The vibrator 420 and the circuit device 500 are mounted in the package 410 of the oscillator 400. Terminals of oscillator 420 and terminals (pads) of circuit device 500(IC) are electrically connected by internal wiring of package 410.

Fig. 25 shows a configuration example of an electronic device including the circuit device 500 of the present embodiment. The electronic device includes a circuit device 500 according to this embodiment, an oscillator 420 such as a quartz oscillator, an antenna ANT, a communication unit 510, and a processing unit 520. Further, the operation unit 530, the display unit 540, and the storage unit 550 may be included. Oscillator 400 is configured by oscillator 420 and circuit device 500. The electronic device is not limited to the configuration of fig. 25, and various modifications may be made such as omitting some of the components and adding other components.

As the electronic device in fig. 25, various devices such as a network-related device such as a base station or a router, a high-precision measurement device, a GPS-incorporated clock, a wearable device such as a vital information measurement device (a pulsimeter, a pedometer, or the like) or a head-mounted display device, a smart phone, a mobile phone, a portable game device, a portable information terminal (mobile terminal) such as a notebook PC or a tablet PC, a content providing terminal for delivering content, and a video device such as a digital camera or a video camera can be assumed.

The communication unit 510 (wireless circuit) performs processing for receiving data from the outside or transmitting data to the outside via the antenna ANT. The processing unit 520 performs control processing of the electronic device, various kinds of digital processing of data transmitted and received via the communication unit 510, and the like. The function of the processing unit 520 can be realized by a processor such as a microcomputer.

The operation unit 530 is used for a user to perform an input operation, and may be implemented by operation buttons, a touch panel display, and the like. The display unit 540 is used to display various information, and may be implemented by a display such as a liquid crystal display or an organic EL display. In the case where a touch panel display is used as the operation unit 530, the touch panel display also functions as the operation unit 530 and the display unit 540. The storage unit 550 stores data, and its function can be realized by a semiconductor memory such as a RAM or a ROM, an HDD (hard disk drive), or the like.

Fig. 26 shows an example of a mobile body including the circuit device of the present embodiment. The circuit device (oscillator) according to the present embodiment can be incorporated in various moving bodies such as a vehicle, an airplane, a motorcycle, a bicycle, or a ship, for example. The moving body is, for example, a device or an apparatus that has a driving mechanism such as an engine or a motor, a steering mechanism such as a steering wheel or a rudder, and various electronic devices (vehicle-mounted devices) and that moves on land, in the air, or on the sea. Fig. 26 schematically shows an automobile 206 as a specific example of the mobile object. The automobile 206 incorporates an oscillator (not shown) having the circuit device and the vibrator of the present embodiment. The control device 208 operates in accordance with the clock signal generated by the oscillator. The control device 208 controls the hardness of the suspension or the braking of each wheel 209, for example, in accordance with the posture of the vehicle body 207. For example, the control device 208 can be used to automatically operate the vehicle 206. The device incorporating the circuit device or the oscillator according to the present embodiment is not limited to the control device 208, and may be incorporated in various devices (in-vehicle devices) provided in a mobile body such as an automobile 206.

Fig. 27 shows a detailed configuration example of the oscillator 400. The oscillator 400 of fig. 27 is an oscillator of a double oven configuration (oven configuration in a broad sense).

The package 410 is composed of a substrate 411 and a case 412. Various electronic components not shown are mounted on the substrate 411. A 2 nd container 414 is provided inside the case 412, and a1 st container 413 is provided inside the 2 nd container 414. Further, a vibrator 420 is attached to an inner surface (lower surface) of the upper surface of the 1 st container 413. Further, the circuit device 500, the heater 450, and the temperature sensor 460 of the present embodiment are mounted on the outer surface (upper surface) of the upper surface of the 1 st container 413. The temperature of the inside of the 2 nd container 414, for example, can be adjusted by the heater 450 (heat generating element). The temperature sensor 460 can detect, for example, the temperature inside the 2 nd container 414.

The 2 nd container 414 is disposed on a base plate 416. The substrate 416 is a circuit board on which various electronic components can be mounted. A heater 452 and a temperature sensor 462 are mounted on the substrate 416 on the side opposite to the side on which the 2 nd container 414 is provided. The temperature of the space between the housing 412 and the 2 nd container 414 can be adjusted by, for example, a heater 452 (heat generating element). The temperature of the space between the housing 412 and the 2 nd container 414 can be detected by the temperature sensor 462.

As the heating elements of the heaters 450 and 452, for example, a heating power bipolar transistor, a heating type heater MOS transistor, a heating resistor, a peltier element, or the like can be used. The control of the heat generation of the heaters 450 and 452 can be realized by, for example, a constant temperature bath control circuit of the circuit device 500. As the temperature sensors 460 and 462, for example, thermistors, diodes, and the like can be used.

In fig. 27, since temperature adjustment of oscillator 420 and the like can be realized by the oven having the double oven structure, stabilization of the oscillation frequency of oscillator 420 and the like can be realized.

Fig. 28 shows an example of a configuration of a base station (base station apparatus) which is one of electronic devices. The physical layer circuit 600 performs a physical layer process in a communication process via a network. The network processor 602 performs processing (link layer and the like) at a higher layer than the physical layer. The switch section 604 performs various kinds of switching processing of communication processing. The DSP 606 performs various digital signal processing required for communication processing. The RF circuit 608 includes: a receiving circuit composed of a Low Noise Amplifier (LNA); a transmission circuit including a power amplifier; d/a converters, a/D converters, and the like.

The selector 612 outputs any one of the reference signal RFCK1 from the GPS 610 and the reference signal RFCK2 (clock signal from the network) from the physical layer circuit 600 to the circuit device 500 of the present embodiment as the reference signal RFCK. The circuit device 500 performs a process of synchronizing an oscillation signal (an input signal based on the oscillation signal) with the reference signal RFCK. Further, various clock signals CK1, CK2, CK3, CK4, and CK5 having different frequencies are generated and supplied to the physical layer circuit 600, the network processor 602, the switch section 604, the DSP 606, and the RF circuit 608.

According to the circuit device 500 of the present embodiment, in the base station shown in fig. 28, the oscillation signal is synchronized with the reference signal RFCK, and the clock signals CK1 to CK5 having high frequency stability generated from the oscillation signal can be supplied to the respective circuits of the base station.

While the present embodiment has been described in detail, those skilled in the art will readily appreciate that many modifications are possible without actually departing from the novel matters and effects of the present invention. Therefore, all such modifications are included in the scope of the present invention. For example, in the specification or the drawings, a term (e.g., a temperature fluctuation component) described at least once together with a different term (e.g., an environmental fluctuation component) having a broader meaning or the same meaning may be replaced with the different term in any part of the specification or the drawings. All combinations of the embodiment and the modifications are also included in the scope of the present invention. Further, the configurations and operations of the circuit device, the oscillator, the electronic apparatus, and the moving object, the aging correction process, the kalman filter process, the hold mode process, the temperature compensation process, and the like are not limited to those described in the present embodiment, and various modifications can be made.

Claims (11)

1. A circuit arrangement, wherein the circuit arrangement comprises:

a processing unit that performs signal processing on input data of frequency control data based on a phase comparison result of an input signal and a reference signal, the input signal being based on an oscillation signal, and outputs the frequency control data; and

an oscillation signal generating circuit for generating the oscillation signal of the oscillation frequency set by the frequency control data by using an oscillator,

the processing unit performs the following processing until the holding mode caused by the disappearance or abnormality of the reference signal is detected: estimating, by a Kalman filtering process, a true value for an observation of the frequency control data based on the phase comparison result,

the processing unit generates the frequency control data after the aging correction by storing the true value at a time corresponding to a time at which the hold mode is detected and performing an arithmetic process based on the true value, the arithmetic process including addition of a correction based on an aging rate indicating a rate of change of the oscillation frequency with respect to an elapsed period,

the aging rate is based on an aging gradient operation, which is sequentially added to the true values until a time when the hold mode is detected.

2. The circuit arrangement of claim 1,

the processing unit generates the aging-corrected frequency control data by performing the arithmetic processing of adding a correction value to the true value.

3. The circuit arrangement of claim 2,

when the correction value at time step k is d (k) and the frequency control data after the aging correction at time step k is AC (k), the processing unit obtains the frequency control data AC (k +1) after the aging correction at time step k +1 from AC (k +1) ═ AC (k) + d (k).

4. The circuit arrangement of claim 2,

the processing unit performs the arithmetic processing of adding the correction value after the filtering processing to the true value.

5. The circuit arrangement of claim 2,

the processing unit obtains the correction value from an observation residual in the kalman filter processing.

6. The circuit arrangement of claim 1,

the circuit device further includes a storage unit that stores a system noise constant for setting the system noise of the kalman filter process and an observation noise constant for setting the observation noise of the kalman filter process.

7. The circuit arrangement of claim 1,

the processing unit determines whether or not the state of the hold mode is reached based on a voltage of an input terminal to which a detection signal of the hold mode is input or detection information of the hold mode input via a digital interface unit.

8. The circuit arrangement of claim 1,

the oscillation signal generation circuit generates the oscillation signal in accordance with the frequency control data based on the phase comparison result in the case of recovery from the hold mode.

9. An oscillator, wherein the oscillator comprises:

the circuit arrangement of claim 1; and

the vibrator is provided.

10. An electronic device comprising the circuit arrangement of any one of claims 1 to 8.

11. A movable body comprising the circuit device according to any one of claims 1 to 8.

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