CN106940401A - A kind of impedance detecting method and system - Google Patents
A kind of impedance detecting method and system Download PDFInfo
- Publication number
- CN106940401A CN106940401A CN201710146574.3A CN201710146574A CN106940401A CN 106940401 A CN106940401 A CN 106940401A CN 201710146574 A CN201710146574 A CN 201710146574A CN 106940401 A CN106940401 A CN 106940401A
- Authority
- CN
- China
- Prior art keywords
- pcb
- test
- waveform
- numbering
- tested
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Resistance Or Impedance (AREA)
Abstract
The invention provides a kind of impedance detecting method, including:To need each printing board PCB tested to distribute corresponding numbering;According to the numbering of PCB each described, the corresponding relation between the PCB and test equipment is set;By default enabled instruction, the test equipment is controlled, according to the corresponding relation, each PCB is tested successively, obtain each PCB test data and waveform, and according to the test data and waveform of the acquisition, realize the testing impedance to the PCB.Obtain each PCB test data and the process of waveform in the present invention automatically by instruction triggers test equipment, realize the automation of testing impedance, saved the time of digital independent, improve the efficiency of testing impedance.
Description
Technical field
The present invention relates to testing impedance field, more particularly to a kind of impedance detecting method and system.
Background technology
PCB (Printed Circuit Board), Chinese is printed circuit board, also known as printed substrate, is important
Electronic unit, be the supporter of electronic component, be electronic component electrical connection carrier.Because it is to use electronic seal
What brush art made, therefore be referred to as " printing " circuit board..
In order to detect the quality of PCB crudies, it is necessary to carry out testing impedance to PCB, during acquisition testing impedance
Test data and waveform, by the analysis to test data and waveform, judge the quality of PCB crudies.It is existing to obtain each
The mode of individual PCB test datas and waveform, typically by the way of manually gathering, because the quantity for the PCB for needing to test is more,
The cabling of a plurality of different layers is provided with each PCB again, causes the extraction workload of test data and waveform very big, reduces
To the efficiency of PCB testing impedances.
The content of the invention
The technical problems to be solved by the invention are to provide a kind of impedance detecting method, can quickly extract testing impedance
During, each PCB test data and waveform improve PCB testing impedance efficiency.
The present invention also provides a kind of impedance test system, to ensure the realization and application of the above method in practice.
A kind of impedance detecting method, including:
To need each printing board PCB tested to distribute corresponding numbering;
According to the numbering of PCB each described, the corresponding relation between the PCB and test equipment is set;
By default enabled instruction, the test equipment is controlled, according to the corresponding relation, each PCB is entered successively
Row test, obtains each PCB test data and waveform, and according to the test data and waveform of the acquisition, realizes to institute
State PCB testing impedance.
Above-mentioned method, it is preferred that also include:
By presetting storage format, by the corresponding test datas of each PCB and waveform, storage to the volume with the PCB
In number corresponding file.
Above-mentioned method, it is preferred that the numbering according to PCB each described, sets between the PCB and test equipment
Corresponding relation include:
For the multiple test instructions of test equipment distribution, the quantity of the multiple test instruction and the PCB for needing to test
Total amount it is identical;
Set up the one-to-one relationship that each test instruction is numbered with each PCB.
Above-mentioned method, it is preferred that described to press default enabled instruction, controls the test equipment, according to the correspondence
Relation, is tested each PCB successively, is obtained each PCB test data and waveform and is included:
According to the default enabled instruction, the test equipment is controlled, since the multiple PCB initial number,
Tested successively by each PCB number order;
For any one PCB, when the test equipment, to each cabling in the PCB, by the volume of each cabling
Code order all after the completion of test, is tested the PCB of the current PCB for completing test Next Serial Number, until completing
Test to all PCB.
Above-mentioned method, it is preferred that described according to the test data obtained and waveform, realizes that the impedance to the PCB is surveyed
Examination includes:
By default generation method, the data path corresponding with the numbering of the PCB is generated;
By the test data and waveform of acquisition, exported from the data path, generate the data form of corresponding format;
The data form is analyzed, the testing impedance to the PCB is realized.
A kind of impedance test system, including:
Allocation unit, each printing board PCB for being tested for needs distributes corresponding numbering;
Setup unit, for the numbering according to PCB each described, sets the corresponding pass between the PCB and test equipment
System;
Test cell, for by default enabled instruction, controlling the test equipment, according to the corresponding relation, successively
Each PCB is tested, each PCB test data and waveform is obtained, and test data according to the acquisition and
Waveform, realizes the testing impedance to the PCB.
Above-mentioned system, it is preferred that also include:
Memory cell, for by presetting storage format, by the corresponding test datas of each PCB and waveform, storage
Into the file corresponding with the numbering of the PCB.
Above-mentioned system, it is preferred that the setup unit includes:
Subelement is distributed, for being instructed for the multiple tests of test equipment distribution, the quantity of the multiple test instruction
The total amount of PCB with needing to test is identical;
Subelement is set up, for setting up the one-to-one relationship that each test instruction is numbered with each PCB.
Above-mentioned system, it is preferred that the test cell includes:
Subelement is controlled, for according to the default enabled instruction, the test equipment being controlled, from the multiple PCB
Initial number start, tested successively by each PCB number order.
Above-mentioned system, it is preferred that the test cell includes:
Subelement is generated, for by default generation method, generating the data path corresponding with the numbering of the PCB.
Compared with prior art, the present invention includes advantages below:
The invention provides a kind of impedance detecting method, including:To need each print tested
Circuit board PCB processed distributes corresponding numbering;According to the numbering of PCB each described, the PCB and test are set
Corresponding relation between equipment;By default enabled instruction, the test equipment is controlled, it is right successively according to the corresponding relation
Each PCB is tested, and obtains each PCB test data and waveform, and according to the test data and ripple of the acquisition
Shape, realizes the testing impedance to the PCB.The impedance detecting method that the present invention is provided, which is that each PCB settings are corresponding, to be compiled
Number, the then numbering according to each PCB, the corresponding relation set up between every PCB and test equipment so that test equipment is pressed
This corresponding relation, testing each PCB one by one, and obtain after the completion of test data and ripple in test process
Each PCB test data and the process of waveform are obtained automatically by instruction triggers test equipment in shape, the present invention, realize resistance
The automation of anti-test, has saved the time of digital independent, improves the efficiency of testing impedance.
Brief description of the drawings
Technical scheme in order to illustrate more clearly the embodiments of the present invention, below will be to that will make needed for embodiment description
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for
For those of ordinary skill in the art, without having to pay creative labor, it can also be obtained according to these accompanying drawings
His accompanying drawing.
A kind of method flow diagram for impedance detecting method that Fig. 1 provides for the present invention;
A kind of another method flow diagram for impedance detecting method that Fig. 2 provides for the present invention;
A kind of another method flow diagram for impedance detecting method that Fig. 3 provides for the present invention;
A kind of structural representation for impedance test system that Fig. 4 provides for the present invention;
A kind of another structural representation for impedance test system that Fig. 5 provides for the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than whole embodiments.It is based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made
Embodiment, belongs to the scope of protection of the invention.
The present invention can be used in numerous general or special purpose computing device environment or configuration.For example:Personal computer, service
Device computer, handheld device or portable set, laptop device, multi-processor device including any of the above device or equipment
DCE etc..
The invention provides a kind of impedance detecting method, the executive agent of this method can be a kind of processor, the side
The particular flow sheet of method is as shown in figure 1, including step:
S101:To need each printing board PCB tested to distribute corresponding numbering;
In the impedance detecting method that the present invention is provided, to need the corresponding numbering of each PCB distribution tested, institute
State numbering sequentially adjacent distribution.
S102:According to the numbering of PCB each described, the corresponding relation between the PCB and test equipment is set;
In the embodiment of the present invention, according to the numbering distributed for each PCB, set up between each PCB and test equipment
Corresponding relation, enable test equipment according to the corresponding relation, identification each PCB sequentially.
S103:By default enabled instruction, the test equipment is controlled, according to the corresponding relation, successively to each
PCB is tested, and obtains each PCB test data and waveform, and according to the test data and waveform of the acquisition, is realized
To the testing impedance of the PCB.
It is that the test equipment sets corresponding enabled instruction in the embodiment of the present invention, can starts according to described
Instruction, controls the test equipment to start, and makes the test equipment according to its corresponding relation with each PCB, right successively
Each PCB is tested, and has often tested a PCB, obtains test data and waveform to the PCB test process, finally according to
According to each test data and waveform of acquisition, the testing impedance to each PCB is completed.
Impedance detecting method provided in an embodiment of the present invention, is that each PCB sets corresponding numbering, then according to each
Individual PCB numbering, the corresponding relation set up between every PCB and test equipment so that test equipment presses this corresponding relation, by
One tests each PCB, and obtains and pass through in data and waveform in test process, the present invention after the completion of test
Instruction triggers test equipment obtains each PCB test data and the process of waveform automatically, realizes the automation of testing impedance,
The time of digital independent has been saved, the efficiency of testing impedance has been improved.
It is in impedance detecting method provided in an embodiment of the present invention, testing impedance and data analysis is automatic by programming realization
Change, which can repeat some, is designed as a key operation.The Automation Design purpose is testing process to be simplified, by instrumentation,
Waveform is captured, extraction design data is a key operation, test data is finally automatically imported Excel forms again, engineer is only
Need to be by probe point to test point, a key realizes access waveform and preserves data, and test data is automatically imported after the progress of Excel forms
Continuous analysis, so as to mitigate the workload of engineer significantly, and does not allow error-prone.The design by Labview programmings come
Realize.
On the basis of Fig. 1, the embodiment of the present invention additionally provides the another detail flowchart of the impedance detecting method, its
Middle step S101~S103 is identical with described in Fig. 1, repeats no more, also includes:
S104:By presetting storage format, by the corresponding test datas of each PCB and waveform, storage is arrived and the PCB
The corresponding file of numbering in.
, will for each PCB of acquisition test datas produced in test process and waveform in the embodiment of the present invention
It is automatically stored in the file corresponding with the numbering of the PCB.
It is the multiple test instructions of the test equipment distribution in impedance detecting method provided in an embodiment of the present invention, it is described
PCB of the quantity of multiple test instructions with needing to test total amount is identical;
Set up the one-to-one relationship that each test instruction is numbered with each PCB.
It is described to press default enabled instruction in the embodiment of the present invention, the test equipment is controlled, is closed according to the correspondence
System, tests each PCB, obtaining each PCB test data and waveform includes successively:
According to the default enabled instruction, the test equipment is controlled, since the multiple PCB initial number,
Tested successively by each PCB number order;
For any one PCB, when the test equipment, to each cabling in the PCB, by the volume of each cabling
Code order all after the completion of test, is tested the PCB of the current PCB for completing test Next Serial Number, until completing
Test to all PCB.
In the embodiment of the present invention, not only each PCB is numbered, while also to different layers on each PCB
Cabling, sets the coding of order, during test equipment is tested each PCB, one by one on each PCB
Each cabling tested in order, after the completion of all cablings on the current PCB tested are all tested, under
Involved numbering in the PCB of one numbering test, the present invention, coding is all that order is set.
With reference to Fig. 3, described according to the test data obtained and waveform, realize includes step to the testing impedance of the PCB:
S201:By default generation method, the data path corresponding with the numbering of the PCB is generated;
S202:By the test data and waveform of acquisition, exported from the data path, generate the tables of data of corresponding format
Lattice;
S203:The data form is analyzed, the testing impedance to the PCB is realized.
In method provided in an embodiment of the present invention, for the test data and waveform of acquisition, corresponding data path, visitor are set
Family end can read stored good test data by the data path, carry out testing impedance.
During the implementing of the impedance detecting method that the present invention is provided, can on display interface setting program face
Plate, is divided to test and cfg two pages:
Test pages can adjust framework transparency, and PCBcnt represents the PCB to be tested sums, and PCBnum represents current test
PCB numberings (at present only support numeral numbering), testpoint represents trace numberings, and TPcount represents trace sums, key
Disk Z key control instrument run/stop, space bar controller unit preserve current form and and data, waveform saves as picture, data
Text document is write to preserve.
Cfg pages of setting instrument VISA address and the storing path of Wave data.
Test citing, it is assumed that 20 pieces of pcb boards need test altogether, PCBcnt is written as on 20, every block of plate having 10 trace,
TPcount is written as 10, and pcb board numbering 1~20, trace numberings 1~10 are surveyed in order since first block of plate, first trace
Examination, PCBnum is written as 1, testpoint and is written as 1, and point, which is surveyed, waits waveform stabilization, and keypad Z keys stop triggerings are preserved by space bar
Current form picture, waveform picture is automatic to see name file and trace numberings name waveform and data file with PCB numberings,
Testpoint numberings Jia 1 automatically, represent next test Article 2 trace, by that analogy.After 10 trace have been tested,
Testpoint puts 1, PCBnum and adds 1 automatically automatically, represents next piece of PCB of test first trace.Only needed during test in advance
Define testing sequence.
With the impedance detecting method shown in Fig. 1, corresponding, the embodiment of the present invention additionally provides a kind of testing impedance system
System, its structural representation as shown in figure 4, including:
Allocation unit 301, each printing board PCB for being tested for needs distributes corresponding volume
Number;
Setup unit 302, for the numbering according to PCB each described, sets corresponding between the PCB and test equipment
Relation;
Test cell 303, for by default enabled instruction, controlling the test equipment, according to the corresponding relation, according to
It is secondary that each PCB is tested, each PCB test data and waveform is obtained, and according to the test data of the acquisition
And waveform, realize the testing impedance to the PCB.
The impedance test system that the present invention is provided, is that each PCB sets corresponding numbering, then according to each PCB
Numbering, the corresponding relation set up between every PCB and test equipment so that test equipment press this corresponding relation, one by one
Each PCB is tested, and obtains in data and waveform in test process, the present invention after the completion of the test and passes through instruction
Triggering test equipment obtains each PCB test data and the process of waveform automatically, realizes the automation of testing impedance, saves
The time of digital independent, improve the efficiency of testing impedance.
On the basis of Fig. 4, impedance test system provided in an embodiment of the present invention, such as Fig. 5 also include:
Memory cell 304, for by presetting storage format, the corresponding test datas of each PCB and waveform to be deposited
Store up in the file corresponding with the numbering of the PCB.
The setup unit 302 includes:
Subelement 305 is distributed, for being instructed for the multiple tests of test equipment distribution, the number of the multiple test instruction
Measure identical with the total amount for the PCB that needs are tested;
Subelement 306 is set up, for setting up the one-to-one relationship that each test instruction is numbered with each PCB.
The test cell 303 includes:
Subelement 307 is controlled, for according to the default enabled instruction, controlling the test equipment, from the multiple
PCB initial number starts, and is tested successively by each PCB number order.
Subelement 308 is generated, for by default generation method, generating the data road corresponding with the numbering of the PCB
Footpath.
It should be noted that each embodiment in this specification is described by the way of progressive, each embodiment weight
Point explanation be all between difference with other embodiment, each embodiment identical similar part mutually referring to.
For device class embodiment, because it is substantially similar to embodiment of the method, so description is fairly simple, related part is joined
See the part explanation of embodiment of the method.
Finally, in addition it is also necessary to explanation, herein, such as first and second or the like relational terms be used merely to by
One entity or operation make a distinction with another entity or operation, and not necessarily require or imply these entities or operation
Between there is any this actual relation or order.Moreover, term " comprising ", "comprising" or its any other variant meaning
Covering including for nonexcludability, so that process, method, article or equipment including a series of key elements not only include that
A little key elements, but also other key elements including being not expressly set out, or also include be this process, method, article or
The intrinsic key element of equipment.In the absence of more restrictions, the key element limited by sentence "including a ...", is not arranged
Except also there is other identical element in the process including the key element, method, article or equipment.
For convenience of description, it is divided into various units during description apparatus above with function to describe respectively.Certainly, this is being implemented
The function of each unit can be realized in same or multiple softwares and/or hardware during invention.
As seen through the above description of the embodiments, those skilled in the art can be understood that the present invention can
Realized by the mode of software plus required general hardware platform.Understood based on such, technical scheme essence
On the part that is contributed in other words to prior art can be embodied in the form of software product, the computer software product
It can be stored in storage medium, such as ROM/RAM, magnetic disc, CD, including some instructions are to cause a computer equipment
(can be personal computer, server, or network equipment etc.) performs some of each of the invention embodiment or embodiment
Method described in part.
A kind of impedance detecting method provided by the present invention and system are described in detail above, it is used herein
Specific case is set forth to the principle and embodiment of the present invention, and the explanation of above example is only intended to help and understands this
The method and its core concept of invention;Simultaneously for those of ordinary skill in the art, according to the thought of the present invention, specific
It will change in embodiment and application, in summary, this specification content should not be construed as to the present invention's
Limitation.
Claims (10)
1. a kind of impedance detecting method, it is characterised in that including:
To need each printing board PCB tested to distribute corresponding numbering;
According to the numbering of PCB each described, the corresponding relation between the PCB and test equipment is set;
By default enabled instruction, the test equipment is controlled, according to the corresponding relation, each PCB is surveyed successively
Examination, obtains each PCB test data and waveform, and according to the test data and waveform of the acquisition, realizes to the PCB
Testing impedance.
2. according to the method described in claim 1, it is characterised in that also include:
By presetting storage format, by the corresponding test datas of each PCB and waveform, storage to the numbering phase with the PCB
In corresponding file.
3. according to the method described in claim 1, it is characterised in that the numbering according to PCB each described, setting should
Corresponding relation between PCB and test equipment includes:
Instruction is tested for test equipment distribution is multiple, PCB of the quantity that the multiple test is instructed with needing test is total
Amount is identical;
Set up the one-to-one relationship that each test instruction is numbered with each PCB.
4. according to the method described in claim 1, it is characterised in that described to press default enabled instruction, control the test to set
It is standby, according to the corresponding relation, each PCB is tested successively, each PCB test data and waveform bag is obtained
Include:
According to the default enabled instruction, the test equipment is controlled, since the multiple PCB initial number, by each
Individual PCB number order is tested successively;
It is suitable by the coding of each cabling to each cabling in the PCB when the test equipment for any one PCB
Sequence all after the completion of test, is tested the PCB of the current PCB for completing test Next Serial Number, until completing to institute
There is PCB test.
5. according to the method described in claim 1, it is characterised in that described according to the test data obtained and waveform, realization pair
The testing impedance of the PCB includes:
By default generation method, the data path corresponding with the numbering of the PCB is generated;
By the test data and waveform of acquisition, exported from the data path, generate the data form of corresponding format;
The data form is analyzed, the testing impedance to the PCB is realized.
6. a kind of impedance test system, it is characterised in that including:
Allocation unit, each printing board PCB for being tested for needs distributes corresponding numbering;
Setup unit, for the numbering according to PCB each described, sets the corresponding relation between the PCB and test equipment;
Test cell, for by default enabled instruction, the test equipment being controlled, according to the corresponding relation, successively to every
One PCB is tested, and obtains each PCB test data and waveform, and according to the test data and waveform of the acquisition,
Realize the testing impedance to the PCB.
7. system according to claim 6, it is characterised in that also include:
Memory cell, for by presetting storage format, by the corresponding test datas of each PCB and waveform, storage arrive with
The PCB's numbers in corresponding file.
8. system according to claim 6, it is characterised in that the setup unit includes:
Subelement is distributed, for being instructed for the multiple tests of test equipment distribution, the quantity of the multiple test instruction is with needing
The total amount for the PCB to be tested is identical;
Subelement is set up, for setting up the one-to-one relationship that each test instruction is numbered with each PCB.
9. system according to claim 6, it is characterised in that the test cell includes:
Subelement is controlled, for according to the default enabled instruction, controlling the test equipment, from the first of the multiple PCB
Beginning numbering starts, and is tested successively by each PCB number order.
10. system according to claim 6, it is characterised in that the test cell includes:
Subelement is generated, for by default generation method, generating the data path corresponding with the numbering of the PCB.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710146574.3A CN106940401A (en) | 2017-03-13 | 2017-03-13 | A kind of impedance detecting method and system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710146574.3A CN106940401A (en) | 2017-03-13 | 2017-03-13 | A kind of impedance detecting method and system |
Publications (1)
Publication Number | Publication Date |
---|---|
CN106940401A true CN106940401A (en) | 2017-07-11 |
Family
ID=59469568
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710146574.3A Pending CN106940401A (en) | 2017-03-13 | 2017-03-13 | A kind of impedance detecting method and system |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN106940401A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110286269A (en) * | 2019-06-13 | 2019-09-27 | 广合科技(广州)有限公司 | A kind of pcb board impedance information automatic collection and analysis method |
CN110531162A (en) * | 2019-08-30 | 2019-12-03 | 苏州浪潮智能科技有限公司 | A kind of test method and device |
CN112114245A (en) * | 2020-09-17 | 2020-12-22 | 深圳市拓普泰克电子有限公司 | PCBA (printed circuit board assembly) board testing method, PCBA board testing device and PCBA board testing system |
CN112133072A (en) * | 2020-09-23 | 2020-12-25 | 中国兵器工业集团第二一四研究所苏州研发中心 | Test system and test method for LoRa wireless data acquisition device |
CN112415358A (en) * | 2019-08-22 | 2021-02-26 | 上海为彪汽配制造有限公司 | Fault tracing method, storage medium, electronic device and system |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101413973A (en) * | 2008-11-26 | 2009-04-22 | 电子科技大学 | System and method for testing characteristic impedance of circuit board |
CN101930030A (en) * | 2009-06-26 | 2010-12-29 | 鸿富锦精密工业(深圳)有限公司 | Test system and method of characteristic impedance of electronic signal wires |
CN102798772A (en) * | 2011-05-27 | 2012-11-28 | 叶志锋 | Intelligent universal test platform |
CN105652183A (en) * | 2015-12-30 | 2016-06-08 | 惠州市德赛西威汽车电子股份有限公司 | Vehicle-mounted system PCB mainboard automated testing method |
-
2017
- 2017-03-13 CN CN201710146574.3A patent/CN106940401A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101413973A (en) * | 2008-11-26 | 2009-04-22 | 电子科技大学 | System and method for testing characteristic impedance of circuit board |
CN101930030A (en) * | 2009-06-26 | 2010-12-29 | 鸿富锦精密工业(深圳)有限公司 | Test system and method of characteristic impedance of electronic signal wires |
CN102798772A (en) * | 2011-05-27 | 2012-11-28 | 叶志锋 | Intelligent universal test platform |
CN105652183A (en) * | 2015-12-30 | 2016-06-08 | 惠州市德赛西威汽车电子股份有限公司 | Vehicle-mounted system PCB mainboard automated testing method |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110286269A (en) * | 2019-06-13 | 2019-09-27 | 广合科技(广州)有限公司 | A kind of pcb board impedance information automatic collection and analysis method |
CN112415358A (en) * | 2019-08-22 | 2021-02-26 | 上海为彪汽配制造有限公司 | Fault tracing method, storage medium, electronic device and system |
CN110531162A (en) * | 2019-08-30 | 2019-12-03 | 苏州浪潮智能科技有限公司 | A kind of test method and device |
CN112114245A (en) * | 2020-09-17 | 2020-12-22 | 深圳市拓普泰克电子有限公司 | PCBA (printed circuit board assembly) board testing method, PCBA board testing device and PCBA board testing system |
CN112114245B (en) * | 2020-09-17 | 2022-12-13 | 深圳市拓普泰克技术股份有限公司 | PCBA (printed circuit board assembly) board testing method, PCBA board testing device and PCBA board testing system |
CN112133072A (en) * | 2020-09-23 | 2020-12-25 | 中国兵器工业集团第二一四研究所苏州研发中心 | Test system and test method for LoRa wireless data acquisition device |
CN112133072B (en) * | 2020-09-23 | 2021-07-06 | 中国兵器工业集团第二一四研究所苏州研发中心 | Test system and test method for LoRa wireless data acquisition device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN106940401A (en) | A kind of impedance detecting method and system | |
US8577664B2 (en) | Symbolic switch/linear circuit simulator systems and methods | |
US20120095718A1 (en) | Automatic testing system and method | |
CN108446190A (en) | interface test method and device | |
CN101777023B (en) | Method and device for generating test cases | |
CN110187299B (en) | General calibration system for electrical parameters of aviation support equipment | |
CN205788161U (en) | The test system of communication interface | |
CN105158673B (en) | A kind of generation method and device of ATE boards file | |
CN104008042B (en) | A kind of UI automated testing methods, system and equipment | |
CN103530209A (en) | Automated testing method for code keyboard | |
CN104076214A (en) | Multi-channel microwave module automatic test method | |
CN105117566A (en) | Method and device of analyzing PCIe eye patterns | |
CN102693147B (en) | The assistant analysis device of computer assembly language and analytical approach | |
CN104536884A (en) | Code testing method and device | |
CN203658835U (en) | Testing system for various aerospace type power controllers | |
CN102340572A (en) | Method and equipment for carrying out black box test on mobile phone mainboard | |
CN106597169A (en) | Measuring apparatus for electronic equipment | |
CN110967588A (en) | Card testing system and method | |
CN105929271A (en) | Thermal transfer printing tag printer test system and method | |
CN203037754U (en) | Customized FCT/ICT integrated test device for electronic products | |
CN205720556U (en) | A kind of electronic circuit board test system | |
CN105512361A (en) | Substructure analysis method based on ANSYS software | |
US8131521B1 (en) | Block specific harmonic balance analysis system | |
CN219552618U (en) | Battery internal resistance test system | |
CN116170362B (en) | Gateway equipment rapid inspection method and system based on ARM platform |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170711 |
|
RJ01 | Rejection of invention patent application after publication |