CN106784210A - A kind of epitaxial wafer of light emitting diode and preparation method thereof - Google Patents

A kind of epitaxial wafer of light emitting diode and preparation method thereof Download PDF

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CN106784210A
CN106784210A CN201611057810.6A CN201611057810A CN106784210A CN 106784210 A CN106784210 A CN 106784210A CN 201611057810 A CN201611057810 A CN 201611057810A CN 106784210 A CN106784210 A CN 106784210A
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layer
hole injection
type
injection layer
sources
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CN106784210B (en
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马欢
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HC Semitek Zhejiang Co Ltd
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HC Semitek Zhejiang Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

The invention discloses a kind of epitaxial wafer of light emitting diode and preparation method thereof, belong to technical field of semiconductors.The epitaxial wafer includes substrate and stacks gradually cushion, undoped GaN layer, N-type layer, multiple quantum well layer, the first hole injection layer, electronic barrier layer, the second hole injection layer over the substrate, first hole injection layer includes alternately laminated p-type AlInGaN layers and p-type InGaN layer, the electronic barrier layer is AlGaN layer, and second hole injection layer is the p-type GaN layer of InN layers of interval insertion.Rich In atmosphere after the In sources decomposition that the present invention is passed through when forming the first hole injection layer and the second hole injection layer, reduce the activation energy of Mg doping in P-type dopant, improve the hole concentration in the first hole injection layer and the second hole injection layer, the radiation recombination efficiency of hole and electronics in multiple quantum well layer is improved, the luminous efficiency of light emitting diode is lifted.

Description

A kind of epitaxial wafer of light emitting diode and preparation method thereof
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of epitaxial wafer of light emitting diode and preparation method thereof.
Background technology
Rise and continuous maturation with third generation semiconductor technology, semiconductor lighting are small, pollution-free, highlighted with energy consumption The advantages such as degree, long-life, as focus of concern, have also driven flourishing for whole industry upper, middle and lower reaches industry.Its Application of the middle GaN base blue-light LED chip in life is seen everywhere, and is widely used to illumination, display screen, backlight, signal The fields such as lamp.
Chip includes epitaxial wafer and the electrode on epitaxial wafer.Epitaxial wafer generally includes substrate and is sequentially laminated on Cushion, undoped GaN layer on substrate, N-type layer, multiple quantum well layer, P-type layer.Wherein, P-type layer uses Mg elements as p-type Dopant, but Mg elements can form H-Mg complex compounds with H element during doping, it is necessary to passing through annealing interrupts the realization of H-Mg keys Mg atom acceptor activations, could provide hole injection multiple quantum well layer.But the activation of Mg can be high, ionization rate is low, it is difficult to produce Hole concentration high, limits the internal quantum efficiency of chip.
The content of the invention
In order to solve problem of the prior art, the epitaxial wafer and its system of a kind of light emitting diode are the embodiment of the invention provides Make method.The technical scheme is as follows：
On the one hand, the embodiment of the invention provides a kind of epitaxial wafer of light emitting diode, the epitaxial wafer include substrate, with And stack gradually cushion, undoped GaN layer, N-type layer, multiple quantum well layer, the first hole injection layer, electricity over the substrate Sub- barrier layer, the second hole injection layer, first hole injection layer include alternately laminated p-type AlInGaN layers and p-type InGaN layer, the electronic barrier layer is p-type AlGaN layer, and second hole injection layer is the p-type GaN of InN layers of interval insertion Layer.
Alternatively, the thickness of first hole injection layer is 30~200nm
Alternatively, the thickness of second hole injection layer is 20~200nm.
On the other hand, a kind of preparation method of the epitaxial wafer of light emitting diode, the making be the embodiment of the invention provides Method includes：
In Grown cushion；
Undoped GaN layer is grown on the cushion；
N-type layer is grown in the undoped GaN layer；
Multiple quantum well layer is grown in the N-type layer；
The hole injection layer of growth regulation one on the multiple quantum well layer, first hole injection layer includes alternately laminated P-type AlInGaN layers and p-type InGaN layer；
Electronic barrier layer is grown on first hole injection layer, the electronic barrier layer is AlGaN layer；
The hole injection layer of growth regulation two on the electronic barrier layer, second hole injection layer is interval insertion InN The p-type GaN layer of layer.
Alternatively, the hole injection layer of growth regulation one on the multiple quantum well layer, including：
Circulation performs following steps m times, 2≤m≤15：
Ga sources, In sources, Al sources, N sources and P-type dopant, growing P-type AlInGaN layers are passed through in first time period；
Stop being passed through Al sources, growing P-type InGaN layer in second time period.
Preferably, the first time period is 20~100s, and the second time period is 20~100s.
Alternatively, the growth temperature of first hole injection layer is 750~850 DEG C, first hole injection layer Growth pressure is 100~300torr.
Alternatively, the hole injection layer of growth regulation two on the electronic barrier layer, including：
Circulation performs following steps n times, 5≤n≤20：
Ga sources, N sources and P-type dopant, growth P-type GaN layer are passed through within the 3rd time period；
Stop being passed through Ga sources within the 4th time period, while being passed through In sources, grow InN layers.
Preferably, the 3rd time period is 20~50s, and the 4th time period is 5~15s.
Alternatively, the growth temperature of second hole injection layer is 950~1050 DEG C, second hole injection layer Growth pressure is 100~700torr.
The beneficial effect that technical scheme provided in an embodiment of the present invention is brought is：
By setting gradually the first hole injection layer, electronic barrier layer, the second hole injection layer on multiple quantum well layer, the One hole injection layer includes alternately laminated p-type AlInGaN layers and p-type InGaN layer, and the second hole injection layer is inserted for interval InN layers of p-type GaN layer, forms the rich In gas after the In sources being passed through when the first hole injection layer and the second hole injection layer are decomposed Atmosphere, can reduce the activation energy of Mg doping in P-type dopant, improve the sky in the first hole injection layer and the second hole injection layer Cave concentration, improves the radiation recombination efficiency of hole and electronics in multiple quantum well layer, lifts the luminous efficiency of light emitting diode.And In can improve crystal mass as surfactant in the p-type GaN layer of InN layers of interval insertion, further function as raising hole The effect of concentration.In addition, alternately laminated p-type AlInGaN layers and p-type InGaN layer, can effectively adjust heterostructure band, shape Into two-dimensional electron gas, the injection efficiency in hole is improved.
Brief description of the drawings
Technical scheme in order to illustrate more clearly the embodiments of the present invention, below will be to that will make needed for embodiment description Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for For those of ordinary skill in the art, on the premise of not paying creative work, other can also be obtained according to these accompanying drawings Accompanying drawing.
Fig. 1 is a kind of structural representation of the epitaxial wafer of light emitting diode that the embodiment of the present invention one is provided；
Fig. 2 is that a kind of flow of the preparation method of the epitaxial wafer of light emitting diode that the embodiment of the present invention two is provided is illustrated Figure.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing to embodiment party of the present invention Formula is described in further detail.
Embodiment one
The embodiment of the invention provides a kind of epitaxial wafer of light emitting diode, referring to Fig. 1, the epitaxial wafer include substrate 1, with And stack gradually cushion 2 on substrate 1, undoped GaN layer 3, N-type layer 4, multiple quantum well layer 5, the first hole injection layer 6, Electronic barrier layer 7, the second hole injection layer 8.
In the present embodiment, the first hole injection layer includes alternately laminated p-type AlInGaN layers and p-type InGaN layer, electricity Sub- barrier layer is AlGaN layer, and the second hole injection layer is the p-type GaN layer of InN layers of interval insertion.
Alternatively, the thickness of the first hole injection layer can be 30~200nm.
Alternatively, the number of plies of the number of plies of p-type InGaN layer with p-type AlInGaN layers is identical, and p-type AlInGaN layers of the number of plies can Think 2~15 layers.
Alternatively, the thickness of the second hole injection layer can be 20~200nm.
Alternatively, p-type GaN layer can be divided into 5~20 layers by InN layers.
Alternatively, the thickness of electronic barrier layer can be 30~100nm.
Specifically, substrate can be Sapphire Substrate.
Cushion can be AlN cushions, and thickness is 15~40nm.
Undoped GaN layer can include growth conditions different the first undoped GaN layer and the second undoped GaN layer, the The thickness of one undoped GaN layer is 0.5~1.5 μm, and the thickness of the second undoped GaN layer is 1~2 μm.
N-type layer can include growth conditions different the first N-type GaN layer, the second N-type GaN layer, the 3rd N-type GaN layer, the The thickness of one N-type GaN layer is 2~3 μm, and the doping concentration of Si is 1E+19~2E+19atom/cm in the first N-type GaN layer3；The The thickness of two N-type GaN layers is 0.1~0.3 μm, and the doping concentration of Si is 1E+17~2E+18atom/ in the second N-type GaN layer cm3；The thickness of the 3rd N-type GaN layer is 30~100nm, and the doping concentration of Si is 5E+17~5E+ in the 3rd N-type GaN layer 18atom/cm3。
Multiple quantum well layer includes alternately laminated InGaN quantum well layers and GaN quantum barrier layers；The number of plies of GaN quantum barrier layers The number of plies with InGaN quantum well layers is identical, and the number of plies of InGaN quantum well layers is 6~15 layers；The thickness of InGaN quantum well layers is 2 The thickness of~4nm, GaN quantum barrier layer is 10~13nm.
Alternatively, the epitaxial wafer can also include the stress release layer being arranged between N-type layer and multiple quantum well layer.Stress Releasing layer can include alternately laminated InxGa1-xN layers and GaN layer, 0.15≤x≤0.2；The number of plies and In of GaN layerxGa1-xN layers The number of plies it is identical, InxGa1-xN layers of the number of plies is 2~6 layers；InxGa1-xN layers of thickness is 0.5~10nm, and the thickness of GaN layer is 20~50nm.
Alternatively, the epitaxial wafer can also include the protection being arranged between multiple quantum well layer and the first hole injection layer Layer.Protective layer can include alternately laminated AlGaN layer and AlInGaN layer；AlInGaN layers of the number of plies and the number of plies of AlGaN layer Identical, the number of plies of AlGaN layer is 4~10 layers；AlInGaN layers of thickness is identical with the thickness of AlGaN layer, the thickness of AlGaN layer It is 1~5nm.
Alternatively, the epitaxial wafer can also include being arranged on p-type contact layer on the second hole injection layer, and thickness is 5~ 10nm。
The embodiment of the present invention on multiple quantum well layer by setting gradually the first hole injection layer, electronic barrier layer, second Hole injection layer, the first hole injection layer includes alternately laminated p-type AlInGaN layers and p-type InGaN layer, the injection of the second hole Layer inserts InN layers of p-type GaN layer for interval, forms the In sources point being passed through when the first hole injection layer and the second hole injection layer Rich In atmosphere after solution, can reduce the activation energy of Mg doping in P-type dopant, improve the first hole injection layer and the second hole Hole concentration in implanted layer, improves the radiation recombination efficiency of hole and electronics in multiple quantum well layer, lifting light emitting diode Luminous efficiency.And In, as surfactant, can improve crystal mass in the p-type GaN layer of InN layers of interval insertion, enter one Step plays a part of to improve hole concentration.In addition, alternately laminated p-type AlInGaN layers and p-type InGaN layer, can effectively be adjusted Heterostructure band, forms two-dimensional electron gas, improves the injection efficiency in hole.
Embodiment two
The embodiment of the invention provides a kind of preparation method of the epitaxial wafer of light emitting diode, referring to Fig. 2, the preparation method Including：
Step 201：In Grown cushion.
In the present embodiment, substrate can be Sapphire Substrate；Cushion can be AlN cushions, thickness be 15~ 40nm。
Specifically, the step 201 can include：
Using physical vapour deposition (PVD) (English：Physical Vapor Deposition, referred to as：PVD) technology is on substrate Plate that thickness is 15~40nm AlN layers；
Substrate is placed on MOCVD (English：Metal-organic Chemical Vapor Depositio, referred to as：MOCVD) in reative cell；
Temperature is controlled to be 1000~1050 DEG C carried out the high annealing of 60~300s, form AlN nucleus, complete cushion Growth.
Step 202：Undoped GaN layer is grown on the buffer layer.
In the present embodiment, undoped GaN layer can be non-including the first different undoped GaN layer of growth conditions and second Doped gan layer, the thickness of the first undoped GaN layer is 0.5~1.5 μm, and the thickness of the second undoped GaN layer is 1~2 μm.
Specifically, the step 202 can include：
It is 950~1050 DEG C to control temperature, and pressure is 100~600torr, is passed through TMGa, H2、N2And NH3, in cushion Upper growth thickness is 0.5~1.5 μm of the first undoped GaN layer；
It is 1000~1200 DEG C to control temperature, and pressure is 100~300torr, the growth thickness in the first undoped GaN layer It is 1~2 μm of the second undoped GaN layer.
Step 203：N-type layer is grown in undoped GaN layer.
In the present embodiment, N-type layer can include different the first N-type GaN layer of growth conditions, the second N-type GaN layer, the Three N-type GaN layers, the thickness of the first N-type GaN layer is 2~3 μm, and the doping concentration of Si is 1E+19~2E+ in the first N-type GaN layer 19atom/cm3；The thickness of the second N-type GaN layer be 0.1~0.3 μm, in the second N-type GaN layer the doping concentration of Si be 1E+17~ 2E+18atom/cm3；The thickness of the 3rd N-type GaN layer is 30~100nm, and the doping concentration of Si is 5E+17 in the 3rd N-type GaN layer ~5E+18atom/cm3。
Specifically, the step 203 can include：
It is 1050~1200 DEG C to control temperature, and pressure is 100~300torr, is passed through TMGa, SiH4、H2、N2And NH3, Growth thickness is 2~3 μm of the first N-type GaN layer in second undoped GaN layer, and doping concentration is controlled to 1E+19~2E+ 19atom/cm3；
It is 1050~1200 DEG C to control temperature, and pressure is 100~300torr, is passed through TMGa, SiH4、H2、N2And NH3, Growth thickness is 0.1~0.3 μm of the second N-type GaN layer in first N-type GaN layer, and doping concentration is controlled to 1E+17~2E+ 18atom/cm3；
It is 800~950 DEG C to control temperature, and pressure is 100~400torr, is passed through TMGa, SiH4、N2And NH3, in the 2nd N Growth thickness is the 3rd N-type GaN layer of 30~100nm in type GaN layer, and doping concentration is controlled to 5E+17~5E+18atom/ cm3。
Step 204：The growth stress releasing layer in N-type layer.
Specifically, the step 204 can include：
It is 800~950 DEG C to control temperature, and pressure is 100~400torr, 2~6 layers of In of alternating growthxGa1-xN layers and 2~ 6 layers of GaN layer, 0.15≤x≤0.2, InxGa1-xN layers of thickness control in 0.5~10nm, the thickness control of GaN layer 20~ 50nm。
Step 205：Multiple quantum well layer is grown on stress release layer.
In the present embodiment, multiple quantum well layer includes alternately laminated InGaN quantum well layers and GaN quantum barrier layers；GaN is measured The number of plies of sub- barrier layer is identical with the number of plies of InGaN quantum well layers, and the number of plies of InGaN quantum well layers is 6~15 layers；InGaN quantum The thickness of well layer is 2~4nm, and the thickness of GaN quantum barrier layers is 10~13nm.
Specifically, the step 205 can include：
Circulation performs following steps 6~15 times：
It is 800 DEG C to control temperature, and pressure is 100~300torr, and growth thickness is the InGaN quantum well layers of 2~4nm；
It is 850~900 DEG C to control temperature, and pressure is 100~300torr, and growth thickness is that the GaN quantum of 10~13nm are built Layer.
Step 206：The growth protecting layer on multiple quantum well layer.
Specifically, the step 206 can include：
Control pressure is 100~300torr, and the thickness degree of alternating growth 4~10 is the InGaN quantum well layers and 4 of 1~5nm ~10 thickness degree are the GaN quantum barrier layers of 1~5nm.
Step 207：The hole injection layer of growth regulation one on the protection layer.
In the present embodiment, the first hole injection layer includes alternately laminated p-type AlInGaN layers and p-type InGaN layer.
Alternatively, the thickness of the first hole injection layer can be 30~200nm.
Specifically, the step 207 can include：
It is 750~850 DEG C to control temperature, and pressure is 100~300torr, and circulation performs following steps m times, 2≤m≤15：
Ga sources (such as TMGa or TEGa), In sources (such as TMIn), Al sources are passed through in first time period (for example TMAl), N sources (such as NH3) and P-type dopant (such as Cp2Mg), growing P-type AlInGaN layers；
Stop being passed through Al sources, growing P-type InGaN layer in second time period.
Alternatively, first time period can be 20~100s, and second time period can be 20~100s.
Step 208：Electronic barrier layer is grown on the first hole injection layer.
In the present embodiment, electronic barrier layer is AlGaN layer.
Specifically, the step 208 can include：
It is 950~1000 DEG C to control temperature, and pressure is 100~300torr, is passed through TMGa, N2And NH3, growing P-type AlGaN Layer, thickness control is in 30~100nm.
Step 209：The hole injection layer of growth regulation two on electronic barrier layer.
In the present embodiment, the second hole injection layer is the p-type GaN layer of InN layers of interval insertion.
Alternatively, the thickness of the second hole injection layer can be 20~200nm.
Specifically, the step 209 can include：
It is 950~1050 DEG C to control temperature, and pressure is 100~700torr, and ring performs following steps n times, 5≤n≤20：
Ga sources, N sources and P-type dopant, growth P-type GaN layer are passed through within the 3rd time period；
Stop being passed through Ga sources within the 4th time period, while being passed through In sources, grow InN layers.
Alternatively, the 3rd time period can be 20~50s, and the 4th time period can be 5~15s.
Step 210：The growing P-type contact layer on the second hole injection layer.
Specifically, the step 210 can include：
It is 650~750 DEG C to control temperature, and pressure is 100~400torr, is passed through TMGa, NH3、Cp2Mg and TMIn, growth 5 The p-type contact layer of~10nm.
Step 211：Temperature is controlled for 700~750 DEG C, the Mg activation of 5~10 minutes is carried out under nitrogen atmosphere.
The embodiment of the present invention on multiple quantum well layer by setting gradually the first hole injection layer, electronic barrier layer, second Hole injection layer, the first hole injection layer includes alternately laminated p-type AlInGaN layers and p-type InGaN layer, the injection of the second hole Layer inserts InN layers of p-type GaN layer for interval, forms the In sources point being passed through when the first hole injection layer and the second hole injection layer Rich In atmosphere after solution, can reduce the activation energy of Mg doping in P-type dopant, improve the first hole injection layer and the second hole Hole concentration in implanted layer, improves the radiation recombination efficiency of hole and electronics in multiple quantum well layer, lifting light emitting diode Luminous efficiency.And In, as surfactant, can improve crystal mass in the p-type GaN layer of InN layers of interval insertion, enter one Step plays a part of to improve hole concentration.In addition, alternately laminated p-type AlInGaN layers and p-type InGaN layer, can effectively be adjusted Heterostructure band, forms two-dimensional electron gas, improves the injection efficiency in hole.
The foregoing is only presently preferred embodiments of the present invention, be not intended to limit the invention, it is all it is of the invention spirit and Within principle, any modification, equivalent substitution and improvements made etc. should be included within the scope of the present invention.

Claims (10)

1. a kind of epitaxial wafer of light emitting diode, it is characterised in that the epitaxial wafer includes substrate and is sequentially laminated on described Cushion, undoped GaN layer, N-type layer, multiple quantum well layer, the first hole injection layer, electronic barrier layer, the second sky on substrate Cave implanted layer, first hole injection layer includes alternately laminated p-type AlInGaN layers and p-type InGaN layer, the electronics resistance Barrier is AlGaN layer, and second hole injection layer is the p-type GaN layer of InN layers of interval insertion.
2. epitaxial wafer according to claim 1, it is characterised in that the thickness of first hole injection layer is 30~ 200nm。
3. epitaxial wafer according to claim 1 and 2, it is characterised in that the thickness of second hole injection layer is 20~ 200nm。
4. a kind of preparation method of the epitaxial wafer of light emitting diode, it is characterised in that the preparation method includes：
In Grown cushion；
Undoped GaN layer is grown on the cushion；
N-type layer is grown in the undoped GaN layer；
Multiple quantum well layer is grown in the N-type layer；
The hole injection layer of growth regulation one on the multiple quantum well layer, first hole injection layer includes alternately laminated p-type AlInGaN layers and p-type InGaN layer；
Electronic barrier layer is grown on first hole injection layer, the electronic barrier layer is AlGaN layer；
The hole injection layer of growth regulation two on the electronic barrier layer, second hole injection layer is the P of InN layers of interval insertion Type GaN layer.
5. preparation method according to claim 4, it is characterised in that the growth regulation on the multiple quantum well layer one is empty Cave implanted layer, including：
Circulation performs following steps m times, 2≤m≤15：
Ga sources, In sources, Al sources, N sources and P-type dopant, growing P-type AlInGaN layers are passed through in first time period；
Stop being passed through Al sources, growing P-type InGaN layer in second time period.
6. preparation method according to claim 5, it is characterised in that the first time period is 20~100s, described the Two time periods were 20~100s.
7. the preparation method according to any one of claim 4~6, it is characterised in that the life of first hole injection layer Temperature long is 750~850 DEG C, and the growth pressure of first hole injection layer is 100~300torr.
8. preparation method according to claim 4, it is characterised in that the growth regulation on the electronic barrier layer two is empty Cave implanted layer, including：
Circulation performs following steps n times, 5≤n≤20：
Ga sources, N sources and P-type dopant, growth P-type GaN layer are passed through within the 3rd time period；
Stop being passed through Ga sources within the 4th time period, while being passed through In sources, grow InN layers.
9. preparation method according to claim 8, it is characterised in that the 3rd time period is 20~50s, the described 4th Time period is 5~15s.
10. the preparation method according to any one of claim 4,8,9, it is characterised in that second hole injection layer Growth temperature is 950~1050 DEG C, and the growth pressure of second hole injection layer is 100~700torr.
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Cited By (19)

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CN108550676A (en) * 2018-05-29 2018-09-18 华灿光电（浙江）有限公司 A kind of LED epitaxial slice and its manufacturing method
CN108735864A (en) * 2018-05-28 2018-11-02 华灿光电（浙江）有限公司 A kind of preparation method of LED epitaxial slice
CN109360873A (en) * 2018-09-20 2019-02-19 华灿光电(苏州）有限公司 A kind of GaN base light emitting epitaxial wafer and preparation method thereof
CN109686822A (en) * 2017-10-18 2019-04-26 博尔博公司 The hole supply of polarized electric field auxiliary and p-type contact structure, luminescent device and photodetector using the structure
CN109920892A (en) * 2019-01-29 2019-06-21 华灿光电（浙江）有限公司 LED epitaxial slice and its growing method
CN110085712A (en) * 2019-04-30 2019-08-02 芜湖德豪润达光电科技有限公司 Light emitting diode and forming method thereof
CN111081836A (en) * 2020-01-21 2020-04-28 福建兆元光电有限公司 Light emitting diode and method for manufacturing the same
CN111180563A (en) * 2020-02-12 2020-05-19 江西乾照光电有限公司 LED chip and manufacturing method thereof
CN111554782A (en) * 2020-03-04 2020-08-18 江苏第三代半导体研究院有限公司 Light emitting diode and method for manufacturing the same
CN113206175A (en) * 2021-03-19 2021-08-03 华灿光电（浙江）有限公司 Light emitting diode epitaxial wafer and preparation method thereof
CN113451449A (en) * 2020-05-19 2021-09-28 重庆康佳光电技术研究院有限公司 RGB epitaxial structure and manufacturing method and application thereof
CN113990989A (en) * 2021-12-29 2022-01-28 材料科学姑苏实验室 Ultraviolet light-emitting diode epitaxial wafer and manufacturing method thereof
CN115425128A (en) * 2022-10-21 2022-12-02 至善时代智能科技(北京)有限公司 Ultraviolet LED epitaxial structure and preparation method thereof
CN116190522A (en) * 2023-04-26 2023-05-30 江西兆驰半导体有限公司 High-light-efficiency light-emitting diode epitaxial wafer and preparation method thereof
CN116230824A (en) * 2023-05-08 2023-06-06 江西兆驰半导体有限公司 High-light-efficiency light-emitting diode epitaxial wafer, preparation method thereof and LED chip
CN116632138A (en) * 2023-07-24 2023-08-22 江西乾照光电有限公司 Deep ultraviolet LED epitaxial wafer, epitaxial growth method and LED chip
CN117810325A (en) * 2024-02-29 2024-04-02 江西兆驰半导体有限公司 High-light-efficiency light-emitting diode epitaxial wafer and preparation method thereof
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CN109686822A (en) * 2017-10-18 2019-04-26 博尔博公司 The hole supply of polarized electric field auxiliary and p-type contact structure, luminescent device and photodetector using the structure
CN107808912B (en) * 2017-10-27 2019-07-09 安徽三安光电有限公司 A kind of iii-nitride light emitting devices and preparation method thereof
CN107808912A (en) * 2017-10-27 2018-03-16 安徽三安光电有限公司 A kind of iii-nitride light emitting devices and preparation method thereof
CN108735864B (en) * 2018-05-28 2019-08-23 华灿光电（浙江）有限公司 A kind of preparation method of LED epitaxial slice
CN108735864A (en) * 2018-05-28 2018-11-02 华灿光电（浙江）有限公司 A kind of preparation method of LED epitaxial slice
CN108550676A (en) * 2018-05-29 2018-09-18 华灿光电（浙江）有限公司 A kind of LED epitaxial slice and its manufacturing method
CN109360873A (en) * 2018-09-20 2019-02-19 华灿光电(苏州）有限公司 A kind of GaN base light emitting epitaxial wafer and preparation method thereof
CN109920892A (en) * 2019-01-29 2019-06-21 华灿光电（浙江）有限公司 LED epitaxial slice and its growing method
CN110085712B (en) * 2019-04-30 2021-07-30 芜湖德豪润达光电科技有限公司 Light emitting diode and forming method thereof
CN110085712A (en) * 2019-04-30 2019-08-02 芜湖德豪润达光电科技有限公司 Light emitting diode and forming method thereof
CN111081836A (en) * 2020-01-21 2020-04-28 福建兆元光电有限公司 Light emitting diode and method for manufacturing the same
CN111180563A (en) * 2020-02-12 2020-05-19 江西乾照光电有限公司 LED chip and manufacturing method thereof
CN111554782A (en) * 2020-03-04 2020-08-18 江苏第三代半导体研究院有限公司 Light emitting diode and method for manufacturing the same
CN113451449A (en) * 2020-05-19 2021-09-28 重庆康佳光电技术研究院有限公司 RGB epitaxial structure and manufacturing method and application thereof
CN113206175B (en) * 2021-03-19 2023-10-13 华灿光电（浙江）有限公司 Light-emitting diode epitaxial wafer and preparation method thereof
CN113206175A (en) * 2021-03-19 2021-08-03 华灿光电（浙江）有限公司 Light emitting diode epitaxial wafer and preparation method thereof
CN113990989A (en) * 2021-12-29 2022-01-28 材料科学姑苏实验室 Ultraviolet light-emitting diode epitaxial wafer and manufacturing method thereof
CN113990989B (en) * 2021-12-29 2022-03-08 材料科学姑苏实验室 Ultraviolet light-emitting diode epitaxial wafer and manufacturing method thereof
CN115425128A (en) * 2022-10-21 2022-12-02 至善时代智能科技(北京)有限公司 Ultraviolet LED epitaxial structure and preparation method thereof
CN115425128B (en) * 2022-10-21 2023-01-31 至善时代智能科技(北京)有限公司 Ultraviolet LED epitaxial structure and preparation method thereof
CN116190522A (en) * 2023-04-26 2023-05-30 江西兆驰半导体有限公司 High-light-efficiency light-emitting diode epitaxial wafer and preparation method thereof
CN116230824A (en) * 2023-05-08 2023-06-06 江西兆驰半导体有限公司 High-light-efficiency light-emitting diode epitaxial wafer, preparation method thereof and LED chip
CN116230824B (en) * 2023-05-08 2023-07-18 江西兆驰半导体有限公司 High-light-efficiency light-emitting diode epitaxial wafer, preparation method thereof and LED chip
CN116632138A (en) * 2023-07-24 2023-08-22 江西乾照光电有限公司 Deep ultraviolet LED epitaxial wafer, epitaxial growth method and LED chip
CN117810325A (en) * 2024-02-29 2024-04-02 江西兆驰半导体有限公司 High-light-efficiency light-emitting diode epitaxial wafer and preparation method thereof
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