CN106653738A - Ground-wall de-coupling connecting structure of common-emitter-structured transistor - Google Patents
Ground-wall de-coupling connecting structure of common-emitter-structured transistor Download PDFInfo
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- CN106653738A CN106653738A CN201611255233.1A CN201611255233A CN106653738A CN 106653738 A CN106653738 A CN 106653738A CN 201611255233 A CN201611255233 A CN 201611255233A CN 106653738 A CN106653738 A CN 106653738A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1231—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier comprising one or more bipolar transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6616—Vertical connections, e.g. vias
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- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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Abstract
The invention discloses a ground-wall de-coupling connecting structure of a common-emitter-structured transistor. The ground-wall de-coupling connecting structure comprises a transistor positioned in a substrate, a ground-wall de-coupling structure, and base and collector via hole connecting arrays; a thin metal layer close to the substrate and a thick metal layer on the top layer are provided by a silicon-based process, so that the top layer metal and the transistor positioned in the substrate are connected by requiring the via hole arrays; the via hole arrays are relatively close to each other at the height of about 10[mu]m; for millimeter-wave and submillimeter-wave oscillator circuits at frequency greater than 100GHz, the coupling stray capacitance between two rows of the via hole arrays can reach a fF magnitude, so that great influence is generated to the performance of the oscillators; and by introducing an emitter ground-wall de-coupling structure, the ground-wall structure length is optimized, and coupling between the base and the collector via hole arrays of the transistor can be eliminated, so that the output power and the output frequency of submillimeter-wave oscillators can be greatly improved.
Description
Technical field
The present invention relates to a kind of new ground wall uncoupling attachment structure, specifically a kind of to adopt semiconductor integrated circuit work
Skill makes, improves millimeter wave teratron output work using the ground wall uncoupling attachment structure of common-emitter configuration transistor
The novel transistor periphery attachment structure of rate and frequency of oscillation.
Background technology
The relatively low scope of electromagnetic spectrum medium frequency has been assigned at present in many wireless applications, for example extensively
Broadcast, TV, satellite communication, mobile phone, Military Application and radio astronomy etc..With the further development of radiotechnics,
At present the frequency spectrum resource of low frequency section is very crowded, and for the demand of future communications application, the channel capacity of low-frequency range is
It is difficult to meet requirement.However, in millimeter wave and submillimeter wave frequency range, still have substantial amounts of frequency range not to be developed and utilize, due to milli
Metric wave and submillimeter wave frequency band are wider, can be used to transmit higher speed, so as to obtain bigger message capacity.It is current in the world
For millimeter wave submillimeter wave frequency range has emerged increasing application, including WLAN, terahertz imaging, millimeter
Ripple trailer-mounted radar, spectroscopy and remote sensing etc..
For all these millimeter waves and submillimeter wave system, the design of silicon substrate milliwatt frequency source circuit is always one
Individual difficult point.The parasitic capacitance of transistor internal, the especially ghost effect of transistor periphery connection circuit, in millimeter wave and sub- milli
Meter wave frequency band usually can bring very negative impact to the design of high power, high frequency source circuit.For example, in 200GHz,
For the transistor base and collector circuit of a generic connectivity, uncoupling process is not done, by electromagnetic simulation software HFSS
Parasitic parameter extraction is found, the coupled capacitor between base stage and the connection of colelctor electrode via has reached fF magnitudes, and this deteriorates significantly
The performance of transistor, directly embody be exactly corresponding oscillator power output and frequency of oscillation deterioration.
In order to solve the impact of millimeter wave single tube periphery attachment structure parasitic couplings, it is often necessary to tied using cascode
Structure, will the transistor of a common-emitter configuration and the transistor of a cobasis structure stack up and use, although so can be one
Determine the impact for mitigating circuit parasitic coupling in degree, but cascode structure needs the emitter voltage of twice, is unfavorable for application
In low voltage environment, power consumption is of a relatively high, and less to oscillator power output increase rate.Additionally, cascode structure
Extra noise would generally be introduced, the phase noise of oscillator is affected.
Accordingly, it would be desirable to invent one kind can significantly weaken millimeter wave submillimeter wave frequency range transistor periphery attachment structure it
The novel transistor periphery attachment structure of effects of coupling between, while being applied to low power supply height output hunting power and frequency of oscillation
In pierce circuit.
The content of the invention
Goal of the invention:The purpose of the present invention is a kind of new ground wall uncoupling attachment structure of design, and specifically one kind is adopted
Made, improved millimeter wave Asia using the ground wall uncoupling attachment structure of common-emitter configuration transistor with semiconductor integrated circuit technique
The novel transistor periphery attachment structure of millimetre-wave generator power output and frequency of oscillation.
Technical scheme:A kind of ground wall uncoupling attachment structure of common-emitter configuration transistor, including substrate, in substrate
Transistor and the base stage positioned at substrate, colelctor electrode, the via of base stage connect array, the via of colelctor electrode connects array,
Wall decoupling structure, described ground wall decoupling structure be located at the via connection array of base stage and colelctor electrode via connection array it
Between, the via connection array of the via of base stage connection array and colelctor electrode includes thin metal layer M1, M2 near substrate,
The thick metal layers TM1 of M3, M4, M5 and top layer, and be sequentially connected by via, through M1 to TM1;The via connection of the base stage
The thick metal layers TM1 and thick metal layers TM2 of array is adjacent, and is connected by via with the base stage positioned at thick metal layers TM2;It is described
Colelctor electrode via connection array thick metal layers TM1 and thick metal layers TM2 it is adjacent, and with positioned at thick metal layers TM2 current collection
Pole is connected by via;Ground wall decoupling structure also includes the thickness of the thin metal layer M1 near substrate, M2, M3, M4, M5 and top layer
Metal level TM1, and be sequentially connected by via, through M1 to TM1;Near the thin metal layer and the thick metal layers root of top layer of substrate
There is provided according to silicon-based technology, the via of colelctor electrode connection array, the via connection array of base stage, wall decoupling structure pass through via
Connection connects the collection of array, transistor positioned at the transistor of substrate positioned at the via of the base stage connection base stage of the transistor of substrate
The via connection array of electrode connection colelctor electrode, the emitter stage connection ground wall decoupling structure of transistor.
Further, the end of each layer of ground wall decoupling structure is three-legged structure.
Further, positioned at substrate transistor variable dimension, the length of ground wall decoupling structure is according to transistor
Length changes.
Further, the length of ground wall decoupling structure is the twice of the length of transistor.
Further, wall decoupling structure in ground adopts silicon substrate Bipolar Metal Oxide semiconductor integrated circuit technique reality
It is existing.
Beneficial effect:
1) power output and frequency of oscillation of millimeter wave teratron are greatly improved.
2) there is no special requirement to the structure of oscillator, any silicon substrate milli based on common-emitter configuration transistor can be selected
Metric wave teratron structure.
3) it is suitable for the oscillator application occasion for minimizing, high-output power and high-frequency are exported.
Description of the drawings
Fig. 1 (a) is the metal of silicon-based technology and via layer distribution map, and Fig. 1 (b) is that the new common-emitter configuration in the present invention is brilliant
The top view of body pipe uncoupling attachment structure;
Fig. 2 is the 3-D view of the new common-emitter configuration transistor periphery uncoupling attachment structure in the present invention;
Fig. 3 is the circuit theory diagrams applied the present invention in a J wave band submillimeter wave quadravalence fundamental wave oscillator;
Fig. 4 is the circuit theory diagrams applied the present invention in a rank fundamental wave oscillator of J wave bands submillimeter wave six;
Fig. 5 is that the present invention is applied the power output test result in a J wave band submillimeter wave quadravalence fundamental wave oscillator;
Fig. 6 is that the present invention is applied the power output test result in a rank fundamental wave oscillator of J wave bands submillimeter wave six.
Specific embodiment
The present invention is further described below in conjunction with the accompanying drawings.
As shown in figure 1, the basic structure of the present invention is a kind of ground wall uncoupling periphery connection knot of common-emitter configuration transistor
Structure, schemes metal and via layer distribution map that (a) is silicon-based technology, and figure (b) is bowing for the novel transistor uncoupling attachment structure
View.For the transistor periphery attachment structure of common-emitter configuration, a ground wall from M1 to TM1 is introduced, ground wall is located at the He of base stage 3
Between colelctor electrode 4, ground wall decoupling structure length is L1, and the length of transistor is S, and ground wall decoupling structure length is at least crystalline substance
The twice of body length of tube, in order to effectively reduce the coupling effect between base stage and colelctor electrode via connection array, the wall end on ground
End introduces the coupling that three-legged structure is further removed between base stage and colelctor electrode via connection array.
As shown in Fig. 2 represent the new common emitter ground wall uncoupling crystal pipe connecting structure in order to what is become apparent from,
Spy gives the 3 d effect graph of the transistor periphery connection.Can see in figure base stage between substrate to top-level metallic and
Colelctor electrode via connects array, and the ground wall decoupling structure 7 is between two vias connection arrays.Silicon-based technology provides close
The thin metal layer of substrate 1 and the thick metal layers of top layer, because the resistance to properties of flow of thin metal layer is poor and loss is larger, top layer gold
Category is generally used for main signal transmission.Arrays of vias connection top-level metallic and the transistor 2 positioned at substrate, mistake are needed in actual design
Hole array height H2 is at 10 μm or so and closer to the distance, for millimeter wave submillimeter wave circuit vias of the frequency higher than 100GHz connect
The electrical length for connecing be can not ignore, and find that the two coupling parasitic capacitances being drained through between hole array reach by electromagnetic simulation software HFSS
FF magnitudes, to circuit performance strong influence is produced.In oscillator design, ground wall decoupling structure 7 is introduced, by optimally
Length L1 of wall construction, can eliminate the coupling between transistor base and colelctor electrode arrays of vias, such that it is able to significantly carry
The power output and output frequency of teratron are risen, conventional crystal pipe connecting structure is solved to millimeter wave submillimeter wave
The impact that pierce circuit power output and frequency performance deteriorate.
Fig. 3 is the schematic diagram applied the present invention in a J wave band submillimeter wave quadravalence fundamental wave oscillator.The oscillator
Four transistors be common-emitter configuration, and using the peripheral attachment structure of proposed by the present invention ground wall uncoupling.Micro-strip in figure
Connecting line l1-l12 is respectively positioned on TM2 layers, and Q1, Q2, Q3, Q4 are the cascode crystal using the ground wall uncoupling periphery attachment structure
Pipe, W is the width of microstrip line, and L is the length of microstrip line.
Fig. 4 is that the present invention is applied into the schematic diagram in a rank fundamental wave oscillator of J wave bands submillimeter wave six, B points, C points
For tie point.Six transistors of the oscillator are common-emitter configuration, and using ground proposed by the present invention wall uncoupling periphery
Attachment structure.Micro-strip connecting line L1-L16 is respectively positioned on TM2 layers in figure, and Q5-Q10 is using the ground wall uncoupling periphery attachment structure
Grounded-emitter transistor, W for microstrip line width, L for microstrip line length.
Fig. 5 is that the present invention is applied the power output test result in a J wave band submillimeter wave quadravalence fundamental wave oscillator.
Can read a book from figure, be improved by about one time using the power output of oscillator after the present invention.In addition the oscillator is defeated
Go out frequency also because ground wall decoupling arrangements introducing from 210GHz lifted to 225GHz frequency range.
Fig. 6 is that the present invention is applied the power output test result in a rank fundamental wave oscillator of J wave bands submillimeter wave six.
It can be seen that averagely improving more than 50% using the power output of oscillator after the present invention.In addition the oscillator
Output frequency also because ground wall decoupling arrangements introducing from 200GHz lifted to 213GHz frequency range.
The present invention and its apply millimeter wave teratron using silicon substrate Bipolar Metal Oxide partly
Conductor integrated circuit technology is realized.
The above is only the preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, under the premise without departing from the principles of the invention, some improvements and modifications can also be made, these improvements and modifications also should
It is considered as protection scope of the present invention.
Claims (5)
1. the ground wall uncoupling attachment structure of a kind of common-emitter configuration transistor, it is characterised in that including substrate (1), positioned at substrate
In transistor (2) and the base stage (3) positioned at substrate, colelctor electrode (4), base stage via connection array (5), colelctor electrode
Via connection array (6), wall decoupling structure (7), described ground wall decoupling structure (7) positioned at base stage via connection battle array
Between via connection array (6) of row (5) and colelctor electrode, via connection array (5) and the via of colelctor electrode of the base stage
Connection array (6) includes the thick metal layers TM1 of the thin metal layer M1 near substrate (1), M2, M3, M4, M5 and top layer, and passes through
Via is sequentially connected, through M1 to TM1;The thick metal layers TM1 and thick metal layers TM2 of via connection array (5) of the base stage
It is adjacent, and be connected by via with the base stage (3) positioned at thick metal layers TM2;The thickness of via connection array (6) of the colelctor electrode
Metal level TM1 and thick metal layers TM2 are adjacent, and are connected by via with the colelctor electrode (4) positioned at thick metal layers TM2;Ground wall goes
Coupled structure (7) also includes the thick metal layers TM1 of the thin metal layer M1 near substrate (1), M2, M3, M4, M5 and top layer, and leads to
Via is sequentially connected, through M1 to TM1;Near the thin metal layer of substrate (1) and the thick metal layers of top layer according to silicon-based technology
There is provided, the via of colelctor electrode connection array (6), via connection array (5) of base stage, wall decoupling structure (7) by via
Connection connects via connection array (5), the crystalline substance of base stage positioned at the transistor (2) of substrate positioned at the base stage of the transistor (2) of substrate
Via connection array (6) of the colelctor electrode connection colelctor electrode of body pipe (2), the emitter stage connection ground wall uncoupling knot of transistor (2)
Structure (7).
2. the ground wall uncoupling attachment structure of common-emitter configuration transistor according to claim 1, it is characterised in that ground wall goes
The end of each layer of coupled structure (7) is three-legged structure.
3. the ground wall uncoupling attachment structure of common-emitter configuration transistor according to claim 1 and 2, it is characterised in that position
In the variable dimension of the transistor (2) of substrate, the length of ground wall decoupling structure changes according to the length of transistor.
4. the ground wall uncoupling attachment structure of common-emitter configuration transistor according to claim 3, it is characterised in that ground wall goes
The length of coupled structure (7) is the twice of the length of transistor (2).
5. the ground wall uncoupling attachment structure of common-emitter configuration transistor according to claim 1, it is characterised in that ground wall goes
Coupled structure (7) is realized using silicon substrate Bipolar Metal Oxide semiconductor integrated circuit technique.
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CN201611255233.1A CN106653738B (en) | 2016-12-30 | 2016-12-30 | The ground wall uncoupling connection structure of common-emitter configuration transistor |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN111159881A (en) * | 2019-12-27 | 2020-05-15 | 电子科技大学 | Rapid optimization design method applied to millimeter wave extension interaction oscillator |
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US5926062A (en) * | 1997-06-23 | 1999-07-20 | Nec Corporation | Reference voltage generating circuit |
JP2003060438A (en) * | 2001-08-16 | 2003-02-28 | Toyo Commun Equip Co Ltd | Piezoelectric oscillator |
US20050110588A1 (en) * | 2003-11-21 | 2005-05-26 | Fujitsu Media Devices Limited | Oscillator |
CN102403561A (en) * | 2011-09-22 | 2012-04-04 | 东南大学 | Micro-electromechanical cantilever beam switch type microwave power coupler and method for preparing microwave power coupler |
CN105609486A (en) * | 2015-12-25 | 2016-05-25 | 电子科技大学 | Ground shielding structure for millimeter wave/terahertz multi-metal layer semiconductor device |
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2016
- 2016-12-30 CN CN201611255233.1A patent/CN106653738B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5926062A (en) * | 1997-06-23 | 1999-07-20 | Nec Corporation | Reference voltage generating circuit |
JP2003060438A (en) * | 2001-08-16 | 2003-02-28 | Toyo Commun Equip Co Ltd | Piezoelectric oscillator |
US20050110588A1 (en) * | 2003-11-21 | 2005-05-26 | Fujitsu Media Devices Limited | Oscillator |
CN102403561A (en) * | 2011-09-22 | 2012-04-04 | 东南大学 | Micro-electromechanical cantilever beam switch type microwave power coupler and method for preparing microwave power coupler |
CN105609486A (en) * | 2015-12-25 | 2016-05-25 | 电子科技大学 | Ground shielding structure for millimeter wave/terahertz multi-metal layer semiconductor device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN111159881A (en) * | 2019-12-27 | 2020-05-15 | 电子科技大学 | Rapid optimization design method applied to millimeter wave extension interaction oscillator |
CN111159881B (en) * | 2019-12-27 | 2022-03-15 | 电子科技大学 | Rapid optimization design method applied to millimeter wave extension interaction oscillator |
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