CN106649927B - FPGA-based real-time simulation combined modeling method for power electronic element - Google Patents
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Abstract
A real-time simulation combined modeling method for a power electronic element based on an FPGA (field programmable gate array). The method comprises the following steps of modeling the electric power system by adopting basic elements of the electric system in an off-line environment; setting the real-time simulation step length of the electrical system as delta t; establishing a combined model for a parallel circuit composed of a turn-off device and a diode; uploading the parameters to an online simulation environment; starting simulation in an online environment; judging the states of the turn-off device and the diode; calculating historical quantities of the turn-off device and the diode; calculating the voltage of each node; calculating the current of the current step branch of the turn-off device and the diode; and judging whether the simulation time reaches the simulation end or not. The model established by the invention can combine various controllable power electronic devices and diodes for modeling to form a single element, thereby improving the universality of modeling of the power electronic elements, effectively reducing the number of the power electronic elements and improving the processing speed of the power electronic elements in real-time simulation on the premise of ensuring the simulation precision.
Description
Technical Field
The invention belongs to the technical field of computer control, and particularly relates to a real-time simulation combination modeling method for a power electronic element based on an FPGA (field programmable gate array).
Background
Along with interconnection of regional power grids, modern power systems are continuously expanded in scale, high-power electronic equipment such as high-voltage direct current power transmission and FACTS (flexible alternating current transmission system) is widely applied to power transmission systems, clean energy such as renewable energy power generation and distributed power sources is introduced to popularize power electronic equipment in power distribution networks, the power systems are increasingly complex in component composition, dynamic characteristics of different time scales are interwoven to become main characteristics of the modern power systems, and therefore new challenges are provided for power system simulation technologies. The research on the operating characteristics of the power system is not enough only by means of offline calculation and analysis of the power system, and a large amount of research on the operating characteristics of the power system and equipment testing must be completed through hardware-in-loop simulation tests carried out in a laboratory, so that the real-time simulation of the power system has very important significance.
Real-time simulation of an electric power system is electromagnetic transient simulation completely synchronous with real time, and the main function of the simulation is to test outgoing protection and control equipment through Hardware-in-the-loop simulation. The real-time simulator can be connected with the equipment to be tested and simulate a relatively real transient condition, so that the equipment to be tested is prevented from influencing a real system. From the power level, the hardware-in-loop simulation can be divided into signal type hardware-in-loop simulation and power type hardware-in-loop simulation. In the signal-type hardware-in-loop simulation, the tested devices are usually secondary controllers, protection devices, intelligent terminals and the like, and low-power signal interaction is performed between the tested devices and a real-time simulator. In contrast, in power-type hardware-in-loop simulation, the device under test is generally an actual electrical device, such as an engine, a power electronic device, and the like, and a large power flow is required to be realized between the actual electrical device and the real-time simulator, so that a power amplifier is often required to interface between the real-time simulator and the device under test.
The traditional power system real-time simulation is mainly based on commercial real-time simulation platforms such as RTDS, HYPERSIM, eEGAsim and the like, but the modern power system has new characteristics: 1) a large amount of high-frequency power electronic equipment is introduced into a modern power system, so that the consumption of computing resources of a real-time simulator is increased, higher requirements are put on the computing performance of the real-time simulator, and when relevant problems are researched by utilizing real-time simulation platforms such as RTDS (real time digital system) and the like, if methods such as system equivalence and the like are not used, the research cost and cost are too high, and the problem expansion is not facilitated. On the other hand, the system equivalence can cause the operation characteristics of the power grid to change, and when the research on the characteristics of the power system is involved, the simulation accuracy is influenced by the equivalence simplification of the power grid; 2) the electric power electronic devices such as HVDC, FACTS and the like usually adopt turn-off devices, and to accurately reflect the transient process of the system, including the influence of the electric power electronic devices, smaller simulation step size needs to be adopted, which further aggravates the contradiction of computing resources and puts higher requirements on the real-time performance of simulation. Therefore, real-time simulation of power systems faces the dual challenges of computing power and accuracy and economy.
In order to realize real-time simulation of a power system containing a large number of high-frequency power electronic devices, advanced underlying computing hardware and a rapid simulation algorithm are required.
On the bottom computing hardware level, most real-time simulators adopt RISC (reduced instruction level computer) -based workstations, multi-DSP, multi-CPU computers, PC clusters, multi-core technologies and the like, the real-time computing capability is achieved through a parallel technology, and most data processing work related to the method is still carried out in series. In addition, in order to realize large-scale system simulation, a large number of data processing units need to be arranged, and data communication between the processing units becomes a main bottleneck of the calculation speed. In contrast, full hardware computation based on field-programmable gate array (FPGA) provides a new idea for real-time simulation. The FPGA essentially has a completely configurable inherent hardware parallel structure, and the logic resources of the FPGA can be configured into a plurality of parallel processing units and realize multi-level high-degree parallel computation; meanwhile, the FPGA chip is provided with a large number of embedded block RAMs which can be configured into a large number of distributed ROMs or RAMs, the data and address width and the port number of the FPGA chip can be configured, most of memories and buses in the traditional real-time simulator are shared, the ports are limited, and the data transmission efficiency is limited; the FPGA allows the use of a pipeline technology, so that the data processing efficiency is improved, and the FPGA also has a large number of internal connecting wires with extremely high transmission speed, so that overlarge communication delay is not introduced; finally, the FPGA has a reconfigurable characteristic, and the real-time simulator can be adjusted in a customized manner according to the simulation calculation example so as to achieve the fastest calculation speed.
In the simulation algorithm level, the basic solution method of the transient real-time simulation problem of the conventional power system can be divided into a node analysis method (nodal analysis) and a state space analysis method (state space analysis). Compared with state variable analysis, the node analysis method has great advantages in the aspects of algorithm implementation difficulty, simulation calculation speed and the like, so that the node analysis method is used as a basic framework in transient offline simulation tools such as EMTP, PSCAD/EMTDC and the like and transient real-time simulation tools such as RTDS, HYPERSIM and the like.
In off-line simulation based on the node method, the power electronic converter device is generally divided into two modeling methods: 1) and (5) topology modeling. The method emphasizes the individuality of the modeling of the switching elements and the assembling property of the modeling of the converter, expresses the switching individuals from the element level, and models according to the actual topological structure combination of various converter devices on the basis of the representation. Although the method leads the modeling of the power electronic converter to be complex, the electrical information in the device can be obtained, the method is closer to an actual system in a physical sense, and the method has strong universality and generality; 2) the output modeling method is characterized in that the transient behavior of a single switching element is ignored for a specific power electronic converter, the whole power electronic converter device is regarded as a multi-port network, and modular equivalent modeling is carried out according to input and output characteristics. The modeling method is relatively simple, but because the internal information of the device is ignored, the analysis of the internal characteristics cannot be carried out, the flexibility and the application range of the model are reduced, each power electronic converter needs to be independently modeled, the universality is poor, and when an energy storage element (inductor and capacitor) is contained in a power electronic system, the modeling method is not easy to realize.
In the real-time simulation of power electronics, a small-step-size switch model based on a topological modeling method is generally adopted, and the specific method comprises the following steps: when the switch is closed, the small inductor is used for simulating, when the switch is opened, the small capacitor is used for simulating, and the equation (1) is written in a characteristic equation of the switch which is obtained by using a trapezoidal method for difference when the switch is opened and closed.
In the formula (1), Ls represents inductance when the switch is closed, Cs represents capacitance when the switch is opened, i (t) and i (t- Δ t) represent switching currents of the current step and the previous step, u (t) and u (t- Δ t) represent switching voltages of the current step and the previous step, and Δ t represents simulation step length. If the admittance when the switch is opened and closed in the formula (1) satisfies the formula (2)
The admittance matrix is ensured to be unchanged when the switch state is switched, and the switch state can be switched only depending on the change of the history quantity. When the method is used, the admittance matrix is always kept unchanged no matter how the switch is changed, so that only one inverse matrix needs to be stored, and the storage pressure is greatly relieved. In addition, using this method, the switching of the switch states, in addition to causing numerical oscillations, also produces unrealistic energy oscillations resulting from the transfer of energy when the switches in the inductive system are switched from closed (inductive) to open (capacitive). In order to eliminate the influence of numerical value oscillation and energy oscillation as much as possible and ensure the numerical value stability, the Rs and Cs series branch analog switch can be disconnected, and the switch calculation formula is shown as formula (3).
The formula (2) should also be adjusted to the formula (4)
At present, some researchers have conducted research on real-time simulation of an electric power system based on an FPGA, and although the coordination of the FPGA based on high performance and a small step switch model is very suitable for real-time simulation of the electric power system, the number of power electronic components becomes a new problem. At present, most of controllable power electronic elements such as IGBTs, GTOs, MOSFETs and the like are connected with a freewheeling diode D in an anti-parallel mode when being applied, so that only one IGBT fully-controlled converter comprises 12 power electronic elements, and when the simulation scale is large, the number of the power electronic elements is further increased, thereby seriously influencing the processing speed of the simulator on the power electronic elements; meanwhile, the connection modes of various types of power electronic equipment and different applications thereof are more, and a unified simulation model is lacked.
Disclosure of Invention
In order to solve the above problems, the present invention aims to provide a power electronic component real-time simulation combination modeling method based on an FPGA.
In order to achieve the purpose, the invention provides a power electronic component real-time simulation combined modeling method based on an FPGA, which comprises the following steps in sequence:
the first step is as follows: under the offline environment, the basic elements of the electrical system are adopted to model the electrical system, and the basic parameter information and the topological connection relation of the basic passive elements, the line elements, the power supply elements, the breaker elements and the power electronic elements are readCalculating the clock period number n required by the electric system to carry out one time step calculation according to the integral solving framework of the electric system in the real-time simulator, the processing modes of the various basic elements and the matrix solving modeeAccording to the driving clock frequency f of FPGA and the clock period number n of electrical systemeCalculating the calculation time t required by each time step simulation corresponding to the electrical systemeWherein t ise＝ne/f；
The second step is that: in an off-line environment, setting the real-time simulation step length of the electrical system to be delta t, and te≤Δt；
The third step: under an offline environment, according to the selected real-time simulation step length delta t of the electrical system, a combined model is established for a parallel circuit composed of a turn-off device including an IGBT, a GTO and an MOSFET and a diode D, and the traditional small-step switch model is utilized to determine the turn-off device and the inductance L when the diode D is closedfAnd LdAnd determining the equivalent conductance G of the twofAnd GdAnd a capacitor C when disconnectedf、CdAnd a resistance Rf、RdThe initial switch state of the two is set to be off;
the fourth step: under the off-line environment, according to the selected real-time simulation step length delta t of the electrical system, calculating the equivalent conductance, the historical current source and the updated calculation parameter of the basic passive element, the line element, the power element and the breaker element in the first step, calculating a node admittance matrix inverse matrix, and calculating the equivalent conductance, the historical current source, the updated calculation parameter, the admittance matrix inverse matrix and the equivalent conductance G in the third stepfAnd GdBasic parameter information and topological connection relations of the basic passive elements, the line elements, the power supply elements, the breaker elements and the power electronic elements in the first step are uploaded to an online simulation environment;
the fifth step: setting a simulation time t to be 0 in an online environment;
and a sixth step: starting the simulation of the next time step, and making t equal to t + delta t;
the seventh step: for the turn-off device, if the previous time step is offWhen the control signal is '1' and the terminal voltage reaches the conducting voltage and the diode D in the last step is in the off state, the device which can be turned off in the first step is in the on state and is expressed as an inductor LfIf not, the turn-off device remains in the off state, which is represented as a capacitor CfAnd a resistance RfA series circuit of (a); meanwhile, for the diode D, if the previous time step is in the turn-off state, the terminal voltage of the diode D and the turn-on state of the turn-off device in the previous time step are detected, and when the terminal voltage reaches the turn-on voltage and the turn-off device in the previous time step is in the turn-off state, the diode D is placed in the turn-on state and is represented as an inductor LdIf not, the diode D is still in the off state and is represented as a capacitor CdAnd a resistance RdA series circuit of (a); the state judgment of the turn-off device and the diode D is realized in a parallel mode;
eighth step: respectively calculating historical quantities hist for the turn-off device and the diode D;
the ninth step: the electric system calculates a time step and calculates the voltage of each node;
the tenth step: respectively calculating the branch current of the current step of the turn-off device and the diode D, and if the corresponding state is the on state, the calculation formula of the branch current is as follows
If the corresponding state is the off state, the branch current calculation formula is
Medium effective admittance in formula
u (t) represents the calculated terminal voltage at the current step;
the eleventh step: for the turn-off device, if the current step is in the on state, detecting the control signal and the current of the branch circuit of the current step, and if the control signal is '0' or the current of the branch circuit is less than the off current, setting the turn-off device to be in the off state, and if the control signal is not equal to the "0" or the current of the branch circuit is less than the off current, setting the turn-off device to be in the on state; meanwhile, for the diode D, if the current step is in a conducting state, the current of a branch circuit of the current step is detected, when the current of the branch circuit is smaller than a cut-off current, the diode D is placed in a turn-off state, and if the current of the branch circuit is not smaller than the cut-off current, the diode D is placed in a conducting state;
the twelfth step: judging whether the simulation time reaches the simulation finishing time, if so, finishing the simulation; otherwise, returning to the sixth step.
In the eighth step, the method for calculating the history quantity hist for the turn-off device and the diode D respectively is as follows:
if the corresponding state is the on state, the historical value calculation formula is
If the corresponding state is the off state, the historical value calculation formula is as follows:
in the formula LsCorresponding to the inductance L of the turn-off device and the diode D when turned onfAnd Ld，Cs、RsCorresponding to the turn-off device and the capacitance C when the diode D is turned offf、CdAnd a resistance Rf、RdAnd i (t-delta t) and u (t-delta t) respectively represent the branch current and the terminal voltage of the previous time step.
In the tenth step, the method for calculating the branch current of the current step of the turn-off device and the diode D respectively is as follows: if the corresponding state is the conducting state, the branch current calculation formula is
If the corresponding state is the off state, the branch current calculation formula is
In the formulaEquivalent admittance
u (t) represents the terminal voltage calculated at this time step.
The invention provides a power electronic component real-time simulation combined modeling method based on FPGA, which mainly aims at the problems of large quantity of power electronic components and low model universality in the real-time simulation of a power system.
Drawings
Fig. 1 is a parallel circuit diagram consisting of a turn-off device and a diode D.
FIG. 2 is a historical quantity solving module of the power electronic combined model based on the FPGA.
FIG. 3 is a branch current solving module of the power electronic combined model based on FPGA.
FIG. 4 is a flow chart of the FPGA-based power electronic component real-time simulation combination modeling method provided by the invention.
FIG. 5 is a schematic diagram of an exemplary light-storage hybrid power generation system.
Fig. 6 is a simulation result of inverter output a-phase current.
Fig. 7 is an inverter output power simulation result.
Fig. 8 is a simulation result of the battery output power.
Fig. 9 is a photovoltaic array output power simulation result.
Fig. 10 is a photovoltaic cell output voltage simulation result.
Fig. 11 shows the dc bus voltage simulation result.
Detailed Description
The method for modeling the power electronic component based on the FPGA by real-time simulation combination is described in detail with reference to the accompanying drawings and specific embodiments.
As shown in fig. 4, the method for modeling the real-time simulation combination of the power electronic component based on the FPGA of the present invention includes the following steps performed in sequence:
the first step is as follows: under an off-line environment, modeling an electric power system by adopting basic elements of the electric system, reading basic parameter information and topological connection relation of basic passive elements, line elements, power supply elements, breaker elements and power electronic elements, and calculating the number n of clock cycles required by the electric system for one-time-step calculation according to an integral solution frame of the electric system in a real-time simulator, processing modes of various basic elements and a matrix solution modeeAccording to the driving clock frequency f of FPGA and the clock period number n of electrical systemeCalculating the calculation time t required by each time step simulation corresponding to the electrical systemeWherein t ise＝ne(iv) f; in the following example, the number of clock cycles neFor 148, the driving clock frequency f is 135MHz, and the time t is calculatede1.096 μ s;
the second step is that: in an off-line environment, the real-time simulation step length of an electrical system is set to be delta t, and the calculation of the electrical system needs to ensure the real-time property firstly, namely teThe step length delta t is not more than delta t, and the real-time simulation step length delta t of the electrical system is selected on the premise of ensuring the simulation precision; in the following calculation example, the real-time simulation step length Δ t of the electrical system is set to 1.096 μ s;
the third step: under an offline environment, according to the selected real-time simulation step length delta t of the electrical system, a combined model is established for a parallel circuit composed of a turn-off device including an IGBT, a GTO and a MOSFET and a diode D as shown in fig. 1, and the inductance L when the turn-off device and the diode D are closed is determined by utilizing a traditional small-step switch modelfAnd LdAnd determining the equivalent conductance G of the twofAnd GdAnd a capacitor C when disconnectedf、CdAnd a resistance Rf、RdThe initial switch state of the two is set to be off; in the following example, the inductance LfAnd LdAre all set to 6.554e-6H, capacitance Cf、CdAre all set to 5.0e-8F, and the resistance Rf、RdAre all provided withIs 1 omega;
the fourth step: under the off-line environment, according to the selected real-time simulation step length delta t of the electrical system, calculating the equivalent conductance, the historical current source and the updated calculation parameter of the basic passive element, the line element, the power element and the breaker element in the first step, calculating a node admittance matrix inverse matrix, and calculating the equivalent conductance, the historical current source, the updated calculation parameter, the admittance matrix inverse matrix and the equivalent conductance G in the third stepfAnd GdBasic parameter information and topological connection relations of the basic passive elements, the line elements, the power supply elements, the breaker elements and the power electronic elements in the first step are uploaded to an online simulation environment;
the fifth step: setting a simulation time t to be 0 in an online environment;
and a sixth step: starting the simulation of the next time step, and making t equal to t + delta t;
the seventh step: for the turn-off device, if the previous step is in the turn-off state, the control signal, the voltage of the last step and the turn-on state of the diode D of the previous step are detected, and when the control signal is '1' and the voltage reaches the turn-on voltage and the diode D of the previous step is in the turn-off state, the turn-off device in the first step is set to be in the turn-on state and is expressed as an inductor LfIf not, the turn-off device remains in the off state, which is represented as a capacitor CfAnd a resistance RfA series circuit of (a); meanwhile, for the diode D, if the previous time step is in the turn-off state, the terminal voltage of the diode D and the turn-on state of the turn-off device in the previous time step are detected, and when the terminal voltage reaches the turn-on voltage and the turn-off device in the previous time step is in the turn-off state, the diode D is placed in the turn-on state and is represented as an inductor LdIf not, the diode D is still in the off state and is represented as a capacitor CdAnd a resistance RdA series circuit of (a); the state judgment of the turn-off device and the diode D is realized in a parallel mode;
eighth step: respectively calculating the historical quantity hist aiming at the turn-off device and the diode D, and if the corresponding state is the on state, then calculating the historical quantity histThe historical amount is calculated as
If the corresponding state is the off state, the historical value calculation formula is as follows:
in the formula LsCorresponding to the inductance L of the turn-off device and the diode D when turned onfAnd Ld，Cs、RsCorresponding to the turn-off device and the capacitance C when the diode D is turned offf、CdAnd a resistance Rf、RdI (t- Δ t) and u (t- Δ t) respectively represent the branch current and terminal voltage of the previous time step, and the corresponding FPGA implementation process is shown in FIG. 2. The historical quantity solving of the turn-off device and the diode D is realized in a parallel mode;
the ninth step: the electric system calculates a time step and calculates the voltage of each node;
the tenth step: respectively calculating the branch current of the current step of the turn-off device and the diode D, and if the corresponding state is the on state, the calculation formula of the branch current is as follows
If the corresponding state is the off state, the branch current calculation formula is
Medium effective admittance in formula
u (t) represents the calculated terminal voltage at this time step, and the corresponding FPGA implementation process is shown in FIG. 3. Wherein, the branch current calculation of the turn-off device and the diode D is realized in a parallel mode;
the eleventh step: for the turn-off device, if the current step is in the on state, detecting the control signal and the current of the branch circuit of the current step, and if the control signal is '0' or the current of the branch circuit is less than the off current, setting the turn-off device to be in the off state, and if the control signal is not equal to the "0" or the current of the branch circuit is less than the off current, setting the turn-off device to be in the on state; meanwhile, for the diode D, if the current step is in a conducting state, the current of a branch circuit of the current step is detected, when the current of the branch circuit is smaller than a cut-off current, the diode D is placed in a turn-off state, and if the current of the branch circuit is not smaller than the cut-off current, the diode D is placed in a conducting state; the state judgment of the turn-off device and the diode D is realized in a parallel mode;
the twelfth step: judging whether the simulation time reaches the simulation finishing time, if so, finishing the simulation; otherwise, returning to the sixth step.
The inventor takes a typical light-storage hybrid power generation system as an example to verify the effect of the FPGA-based power electronic component real-time simulation combined modeling method provided by the invention. FIG. 5 is a schematic diagram of an exemplary light-storage hybrid power generation system. As shown in fig. 5, in the system, the storage battery pack is connected to the DC bus through the bidirectional DC/DC converter and the photovoltaic array, wherein the photovoltaic array is controlled by MPPT; the mode of a Boost circuit and a Buck voltage reduction circuit are respectively adopted during discharging and charging of the storage battery pack and are used for maintaining the voltage of a bus to be constant; the three-phase PMW inverter adopts PQ control, and the output active power and the reactive power of the whole system are kept constant. The voltage of the direct current bus is controlled to be 750V, and the reactive reference value Q isrefSet to 0Var to ensure unity power factor operation and set to 298.15K. The initial illumination intensity of the system is set to 1000W/m2The active power instruction of the three-phase PMW inverter is 10kW, and after the system reaches a steady state, the illumination intensity is 1000W/m2The reduction is 800W/m2The active power command is then reduced to 4kW after 1 s.
The execution environment of the example is that of Altera corporation
IV GX FPGA 530 official development board. The development board is provided with a Stratix IV series FPGA EP4SGX530KH40C2N, and the chip comprises 531200 logic units, 212480 adaptive logic modules, 1280M 9K memories, 64M 144K memories, 1024 special multipliers of 18x18, 8 PLLs and744I/Os. In addition to the EP4SGX530KH40C2N chip, the development board also provides clock circuits for multiple frequencies, 3 user configurable buttons, a large amount of external memory, PCI Express slots, 10/100/1000 Ethernet interface, and other peripheral circuits.
In the aspect of simulation scale, the system comprises 15 RLC elements, 9 IGBTs and 10 diodes D, and the power electronic element real-time simulation combined model based on the FPGA simplifies 19 power electronic elements into 10 combined models, so that the processing speed of the real-time simulation system on the power electronic elements is improved; meanwhile, in the embodiment, the power electronic component real-time simulation combined modeling method based on the FPGA comprises 1 single diode D besides 9 combination modules of the IGBT and the diode D, and all the components are modeled by the power electronic component real-time simulation combined modeling method based on the FPGA, so that the universality of modeling is embodied.
In terms of simulation precision, fig. 6-11 compare simulation results of the FPGA-based power electronic component real-time simulation combined model established by the method of the present invention and the commercial simulation software PSCAD/EMTDC, and the simulation step size of the PSCAD/EMTDC is also 1.096 μ s. As can be seen from the figure, the PSCAD/EMTDC simulation result and the simulation result of the method can be completely matched in the steady-state process and the transient-state process, the dynamic response characteristics of the PSCAD/EMTDC simulation result and the transient-state process are highly consistent, good simulation precision is embodied, and the feasibility of the FPGA-based power electronic component real-time simulation combined modeling method provided by the invention is fully verified.
The test results of the above examples prove that the FPGA-based power electronic component real-time simulation combined modeling method provided by the invention has better feasibility and applicability, and provides a good solution for realizing the real-time simulation of a power system containing a large amount of power electronic equipment.
Claims (2)
1. A real-time simulation combined modeling method for a power electronic element based on an FPGA is characterized by comprising the following steps: the FPGA-based power electronic component real-time simulation combined modeling method comprises the following steps in sequence:
the first step is as follows: in an off-line environment, the electrical system is usedThe element models the electric power system, reads the parameter information and topological connection relation of the basic passive element, the line element, the power supply element, the breaker element and the power electronic element, and calculates the clock period number n required by the electric power system for one time step calculation according to the overall solving frame of the electric system in the real-time simulator, the processing mode and the matrix solving mode of the basic passive element, the line element, the power supply element, the breaker element and the power electronic elementeAccording to the driving clock frequency f of FPGA and the clock period number n of electrical systemeCalculating the calculation time t required by each time step simulation corresponding to the electrical systemeWherein t ise＝ne/f；
The second step is that: in an off-line environment, setting the real-time simulation step length of the electrical system to be delta t, and te≤Δt；
The third step: under an offline environment, according to the set real-time simulation step length delta t of the electrical system, a combined model is established for a parallel circuit composed of a turn-off device including an IGBT, a GTO and an MOSFET and a diode D, and the traditional small-step switch model is utilized to determine the turn-off device and the inductance L when the diode D is closedfAnd LdAnd determining the equivalent conductance G of the twofAnd GdAnd a capacitor C when disconnectedf、CdAnd a resistance Rf、RdThe initial switch state of the two is set to be off;
the fourth step: under the off-line environment, according to the set real-time simulation step length delta t of the electric system, calculating the equivalent conductance, the historical current source and the updated calculation parameter of the basic passive element, the line element, the power element and the breaker element in the first step, calculating a node admittance matrix inverse matrix, and calculating the equivalent conductance, the historical current source, the updated calculation parameter, the admittance matrix inverse matrix and the equivalent conductance G in the third stepfAnd GdBasic parameter information and topological connection relations of the basic passive elements, the line elements, the power supply elements, the breaker elements and the power electronic elements in the first step are uploaded to an online simulation environment;
the fifth step: setting a simulation time t to be 0 in an online environment;
and a sixth step: starting the simulation of the next time step, and making t equal to t + delta t;
the seventh step: for the turn-off device, if the previous step is in the turn-off state, the control signal, the voltage of the last step and the turn-on state of the diode D of the previous step are detected, and when the control signal is '1' and the voltage reaches the turn-on voltage and the diode D of the previous step is in the turn-off state, the turn-off device in the first step is set to be in the turn-on state and is expressed as an inductor LfIf not, the turn-off device remains in the off state, which is represented as a capacitor CfAnd a resistance RfA series circuit of (a); meanwhile, for the diode D, if the previous time step is in the turn-off state, the terminal voltage of the diode D and the turn-on state of the turn-off device in the previous time step are detected, and when the terminal voltage reaches the turn-on voltage and the turn-off device in the previous time step is in the turn-off state, the diode D is placed in the turn-on state and is represented as an inductor LdIf not, the diode D is still in the off state and is represented as a capacitor CdAnd a resistance RdA series circuit of (a); the state judgment of the turn-off device and the diode D is realized in a parallel mode;
eighth step: respectively calculating historical quantities hist for the turn-off device and the diode D;
the ninth step: the electric system calculates a time step and calculates the voltage of each node;
the tenth step: respectively calculating the branch current of the current step of the turn-off device and the diode D, and if the corresponding state is the on state, the calculation formula of the branch current is as follows
If the corresponding state is the off state, the branch current calculation formula is
Medium effective admittance in formula
u (t) represents the calculated terminal voltage at the current step;
the eleventh step: for the turn-off device, if the current step is in the on state, detecting the control signal and the current of the branch circuit of the current step, and if the control signal is '0' or the current of the branch circuit is less than the off current, setting the turn-off device to be in the off state, and if the control signal is not equal to the "0" or the current of the branch circuit is less than the off current, setting the turn-off device to be in the on state; meanwhile, for the diode D, if the current step is in a conducting state, the current of a branch circuit of the current step is detected, when the current of the branch circuit is smaller than a cut-off current, the diode D is placed in a turn-off state, and if the current of the branch circuit is not smaller than the cut-off current, the diode D is placed in a conducting state;
the twelfth step: judging whether the simulation time reaches the simulation finishing time, if so, finishing the simulation; otherwise, returning to the sixth step;
in the eighth step, the method for calculating the history quantity hist for the turn-off device and the diode D respectively is as follows:
if the corresponding state is the on state, the historical value calculation formula is
If the corresponding state is the off state, the historical value calculation formula is as follows:
in the formula LsCorresponding to the inductance L of the turn-off device and the diode D when turned onfAnd Ld，Cs、RsCorresponding to the turn-off device and the capacitance C when the diode D is turned offf、CdAnd a resistance Rf、RdAnd i (t-delta t) and u (t-delta t) respectively represent the branch current and the terminal voltage of the previous time step.
2. The FPGA-based power electronic component real-time simulation combination modeling method of claim 1, characterized in that: in the tenth step, the calculation of the turn-off devices and two respectivelyThe method for the branch current of the pole tube D at the time step is as follows: if the corresponding state is the conducting state, the branch current calculation formula is
If the corresponding state is the off state, the branch current calculation formula is
Medium effective admittance in formula
u (t) represents the terminal voltage calculated at this time step.
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