CN113268942A - Real-time simulation method and system of hybrid direct-current circuit breaker suitable for FPGA - Google Patents

Real-time simulation method and system of hybrid direct-current circuit breaker suitable for FPGA Download PDF

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CN113268942A
CN113268942A CN202010096865.8A CN202010096865A CN113268942A CN 113268942 A CN113268942 A CN 113268942A CN 202010096865 A CN202010096865 A CN 202010096865A CN 113268942 A CN113268942 A CN 113268942A
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current
direct
breaker
circuit breaker
transmission line
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彭逸轩
闫鹤鸣
纪锋
高路
林畅
常彬
庞辉
刘栋
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State Grid Corp of China SGCC
Global Energy Interconnection Research Institute
State Grid Beijing Electric Power Co Ltd
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State Grid Corp of China SGCC
Global Energy Interconnection Research Institute
State Grid Beijing Electric Power Co Ltd
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Abstract

The invention discloses a real-time simulation method of a hybrid direct-current circuit breaker suitable for an FPGA (field programmable gate array), which comprises the following steps of: decoupling the direct current breaker from the direct current power grid; performing equivalent replacement on the nonlinear element in the decoupled direct-current circuit breaker to construct a simplified model; carrying out simulation operation on each decoupled direct current breaker based on the simplified model and an inverse matrix of an admittance matrix pre-stored in the FPGA; wherein the non-linear element of the direct current breaker comprises: switching devices and arresters. The technical scheme provided by the invention adopts the existing small-step model for modeling, regards the lightning arrester as a nonlinear resistor and carries out piecewise linearization treatment. And adding stray capacitance, and performing decoupling calculation on the lightning arrester by using the capacitance to finally obtain a direct current breaker admittance matrix which is kept unchanged.

Description

Real-time simulation method and system of hybrid direct-current circuit breaker suitable for FPGA
Technical Field
The invention relates to a modeling method, in particular to a real-time simulation method and a real-time simulation system of a hybrid direct-current circuit breaker suitable for an FPGA (field programmable gate array).
Background
Because a large number of nonlinear elements such as switches exist in the direct-current power grid, the number of states of the direct-current power grid is large, and the admittance matrix needs to be frequently modified; on the other hand, due to the reduction of the sampling frequency of the control equipment and the requirement of transient process research, the simulation step size in real-time digital simulation needs to be further reduced so as to more accurately control and observe the electromagnetic transient process. Both the two aspects can greatly increase the simulation calculation amount, seriously affect the calculation speed and bring new challenges to real-time simulation.
In order to simulate a direct current network in real time under a small step length, the prior research provides a solution for flexible high voltage direct current transmission (VSC), and the solution can realize real-time simulation in an FPGA under the simulation step length of less than 2 microseconds; however, for the dc circuit breaker, in the current commercial software, the dc circuit breaker is still simulated in the CPU, and on one hand, the minimum simulation step size that can be achieved in the CPU is typically tens of microseconds. On the other hand, due to the existence of nonlinear elements such as switches and lightning arresters, the calculation amount is large, and finally the direct current circuit breaker is difficult to be put into a CPU (central processing unit) under a small step length to realize real-time simulation.
Disclosure of Invention
Aiming at the problem that the direct current circuit breaker in the prior art is difficult to be put into a CPU (central processing unit) to realize real-time simulation under a small step length, the invention provides a real-time simulation method of a hybrid direct current circuit breaker suitable for an FPGA (field programmable gate array), which comprises the following steps:
decoupling the direct current breaker from the direct current power grid;
performing equivalent replacement on the nonlinear element in the decoupled direct-current circuit breaker to construct a simplified model;
carrying out simulation operation on each decoupled direct-current circuit breaker based on the simplified model and an inverted matrix of a lightning arrester section characteristic curve and an admittance matrix which are pre-stored in the FPGA;
wherein the nonlinear element of the direct current breaker comprises: switching devices and arresters.
Preferably, the decoupling the dc circuit breaker from the dc power grid includes:
decoupling the DC breaker by using a current-limiting inductor between the DC breaker and the MMC and a transmission line between the DC breaker and the opposite side;
after the direct current breaker is decoupled, the current-limiting inductor and the transmission line are equivalent to a resistor parallel current source according to the transmission line principle, and the resistor is kept unchanged.
Preferably, the equivalent replacement of the nonlinear element in the decoupled dc breaker is performed to construct a simplified model, which includes:
the lightning arrester in the decoupled direct current breaker is regarded as a nonlinear resistor, and segmented linearization processing is carried out;
the method comprises the following steps that a small-step switch model is adopted for a switch in a decoupled direct-current circuit breaker, the on state of the switch is simulated by using an inductor, and the off state is simulated by using a capacitor;
and constructing a simplified model based on the circuit and the small-step switch module after the lightning arrester is subjected to the piecewise linearization processing.
Preferably, the step of regarding the arrester in the decoupled dc circuit breaker as a nonlinear resistor and performing piecewise linearization processing includes:
and adding a stray capacitor connected with the lightning arrester in parallel, equivalently converting the stray capacitor into a short transmission line, and performing decoupling calculation on the lightning arrester by using the transmission delay of the transmission line.
Preferably, the performing simulation operation based on the simplified model and the lightning arrester segment characteristic curve and the admittance matrix inverse matrix pre-stored in the FPGA includes:
according to the segmentation points of the arrester in the simplified model, the slope and intercept of each segmented straight line are stored in the FPGA in advance, the working point of the arrester is searched by using a table look-up method in simulation, and the current source quantity updated by the arrester equivalent model in each time step is further determined;
and realizing simulation operation based on the current source quantity updated by the equivalent model of the lightning arrester at each time step and the inverse matrix of the admittance matrix in the FPGA.
Preferably, the current source amount updated every time step is calculated according to the following formula:
Figure BDA0002385671830000021
wherein, In+1The current source quantity of the (n + 1) th time step;
Figure BDA0002385671830000022
the transmission line incident voltage of the (n + 1) th time step; zcs: the equivalent transmission line characteristic impedance of the stray capacitance; gx: the slope of the segment line of the x;
Figure BDA0002385671830000023
the reflected voltage of the nth time step; i isx: the intercept of the segment line of the x section;
preferably, the admittance matrix is represented by the following formula, including:
Figure BDA0002385671830000031
in the formula, Ron1And Ron2The on-resistances of the main branch and the transfer branch respectively; c1: simulating a capacitance value in the main branch module; c2: simulating a capacitance value in the transfer branch module; z1: the inductance is equivalent to the characteristic impedance of the transmission line; delta t is a simulation step length; z2: characteristic impedance of a long transmission line between the converter station and the opposite side converter station; zs1、Zs2、 Zs3、Zs4Are respectively a switch S1、S2、S3、S4Equivalent resistance in the small step size model; zcs: the equivalent transmission line characteristic impedance of the stray capacitance.
Preferably, the transmission line characteristic impedance ZcsCalculated by the following formula
Figure BDA0002385671830000032
In the formula, CdA capacitance value per unit length; l isd: an inductance value per unit length; cSStray capacitance of the lightning arrester;
preferably, the capacitance value per unit length CdCalculated as follows:
Figure BDA0002385671830000033
in the formula, Δ l is a transmission line length.
Preferably, the inductance per unit length value LdCalculated as follows:
Figure BDA0002385671830000034
preferably, the section x is the intercept I of the segment straight linexThe relation between the port current and the voltage of the x-th section of the segmented straight line is calculated;
the relation between the port current and the voltage of the x-th section of the segmented straight line is as follows: i ═ Gxv+Ix
In the formula, v: a port voltage; i: the port current.
A real-time simulation system of a hybrid direct current breaker suitable for an FPGA comprises:
the decoupling module is used for decoupling the direct current breaker from a direct current power grid;
the model building module is used for carrying out equivalent replacement on the nonlinear element in the decoupled direct-current circuit breaker to build a simplified model;
the simulation operation module is used for carrying out simulation operation on each decoupled direct-current circuit breaker based on the simplified model, the lightning arrester subsection characteristic curve and the admittance matrix inverse matrix which are stored in the FPGA in advance;
wherein the non-linear element of the direct current breaker comprises: switching devices and arresters.
Preferably, the decoupling module comprises:
decoupling the DC breaker by using a current-limiting inductor between the DC breaker and the MMC and a transmission line between the DC breaker and the opposite side;
and the equivalent submodule is used for equating the current-limiting inductor and the transmission line into a resistor parallel current source according to the transmission line principle after the direct-current circuit breaker is decoupled, and the resistor is kept unchanged.
Preferably, the model building module includes:
the first construction submodule is used for regarding an arrester in the decoupled direct current breaker as a nonlinear resistor and performing piecewise linearization processing;
the second construction submodule is used for simulating the on state of a switch by using an inductance and simulating the off state by using a capacitor by using a small-step switch model for the switch in the decoupled direct-current circuit breaker;
and the combined submodule is used for constructing a simplified model based on the circuit subjected to the piecewise linearization processing on the lightning arrester and the small-step switch module.
Compared with the prior art, the invention has the beneficial effects that:
1. the invention provides a real-time simulation method of a hybrid direct-current circuit breaker suitable for an FPGA (field programmable gate array), which comprises the following steps of: decoupling the direct current breaker from the direct current power grid; performing equivalent replacement on nonlinear elements in the decoupled direct-current circuit breaker to construct a simplified model; carrying out simulation operation on each decoupled direct current breaker based on the simplified model and an inverse matrix of an admittance matrix pre-stored in the FPGA; wherein the non-linear element of the DC circuit breaker comprises: switching devices and arresters. The invention decouples the direct current breaker into a single module for simulation, and can realize real-time simulation under small step length by utilizing the high-performance calculation of the FPGA.
Drawings
FIG. 1 is a flow chart of a hybrid DC circuit breaker real-time simulation method suitable for FPGA of the present invention;
FIG. 2 is a schematic diagram of the DC circuit breaker decoupling of the present invention;
fig. 3 is a schematic diagram of a hybrid dc circuit breaker;
fig. 4 simplified model of a hybrid dc circuit breaker;
FIG. 5 is a schematic view of a stray capacitance decoupling surge arrester of the present invention;
FIG. 6 is a schematic diagram of a capacitor modeled with a short transmission line according to the present invention;
FIG. 7 is a schematic view of the present invention after equivalent replacement of the lightning arrester;
fig. 8 is a model of a dc circuit breaker in an FPGA of the present invention.
Detailed Description
This patent provides a simplified model of direct current circuit breaker, can carry out the decoupling zero with mixing direct current circuit breaker from direct current electric wire netting, forms independent module and carries out the emulation calculation. A fixed admittance matrix can be obtained through modeling of the switching arrester, and an inverse matrix of the admittance matrix is stored in the FPGA in advance for simulation, so that the solving speed can be increased, and the requirement of small-step simulation is met. The specific technical scheme is as follows:
example 1: a real-time simulation method for a hybrid dc circuit breaker suitable for an FPGA, as shown in fig. 1, includes:
step 1: decoupling the direct current breaker from the direct current power grid;
step 2: equivalently replacing nonlinear elements in the decoupled direct-current circuit breaker to construct a simplified model;
and step 3: and carrying out simulation operation on each decoupled direct-current circuit breaker based on the simplified model, the lightning arrester subsection characteristic curve pre-stored in the FPGA and the inverse matrix of the admittance matrix of the direct-current circuit breaker.
Step 1: decoupling a direct current breaker from a direct current power grid, specifically comprising the following steps:
one side of the direct current breaker is connected with the MMC through a current-limiting inductor, and the other side of the direct current breaker is connected with the opposite side through a transmission line. Therefore, the invention firstly utilizes the current-limiting inductor and the transmission line to decouple the direct-current circuit breaker, so that the direct-current circuit breaker can form an independent module for calculation. After decoupling, as shown in fig. 2, according to the transmission line principle, the inductor and the transmission line are equivalent to a resistor parallel current source, the resistor is kept unchanged, and the updating amount in each time step is only the current source.
Step 2: equivalently replacing nonlinear elements in the decoupled direct-current circuit breaker, and constructing a simplified model, wherein the simplified model specifically comprises the following steps:
the simplified model proposed by the patent is based on the hybrid direct current breaker shown in fig. 3, and the simplified model can be obtained through decoupling simplification as shown in fig. 4. Wherein R ison1And Ron1Conducting resistances, S, of the main branch and the transfer branch, respectively1、S2、C1Submodule for simulating the main branch, S3、S4、C2Submodule for simulating a branch transfer, CsIs the stray capacitance of the lightning arrester.
The working process of the simplified model is as follows: a) during normal operation, current flows through the main branch S1、S2Conduction, S3、S4Closing; b) when a fault occurs, the current rises, and when a protection threshold is reached, S2Disconnect S3、S4Closing, charging the main branch capacitor by current, and gradually transferring the current from the main branch to the transfer branch; c) when the main branch current is 0, S1、S4Is disconnected and the current flows to C2Charging is carried out, when the protection voltage of the lightning arrester is reached, S3Disconnecting; d) the current is discharged by the arrester.
Two nonlinear elements of a switch and a lightning arrester exist in the direct current circuit breaker, when a resistance model is adopted, an admittance matrix needs to be continuously modified, and when the admittance matrix is put into an FPGA (field programmable gate array) for small step length real-time simulation, the solving speed can be greatly influenced. In order to keep the admittance matrix of the direct current breaker unchanged, the switch in the patent adopts the existing small step switch model[5][6]When the switch is switched on, the on state of the switch is simulated by using the inductor, and when the switch is switched off, the off state is simulated by using the capacitor, and the 'resistance' after the inductor and the capacitor are dispersed is kept unchanged, and the quantity required to be updated in each step is a parallel current source.
For the arrester, regard it as non-linear resistance to add stray capacitance specially in this patent, become the short transmission line with electric capacity equivalence, utilize the transmission delay of transmission line to carry out the decoupling calculation with the arrester, the arrester is the reciprocal of characteristic impedance in reflecting in the admittance matrix finally, and the direct current circuit breaker admittance matrix that obtains will keep unchangeable. The specific decoupling analysis procedure is as follows:
fig. 5 shows a stray capacitance shunt arrester, and fig. 6 shows the capacitance modeled by a short transmission line, where V is1 iIs the incident wave voltage, V1 rTo reflect the wave voltage, the two ports can finally be decoupled according to the lossless transmission line principle, as shown in fig. 7.
The parameter calculation process is as follows:
is provided with CdIs a capacitance value per unit length, Delal is a transmission line length, CSThe capacitance value is as follows:
Figure BDA0002385671830000061
is provided with LdFor the inductance value per unit length, Δ t is the simulation step size, then:
Figure BDA0002385671830000062
assuming a transmission line characteristic impedance ZcsComprises the following steps:
Figure BDA0002385671830000071
and step 3: carrying out simulation operation on each decoupled direct-current circuit breaker based on the simplified model, the lightning arrester segmental characteristic curve pre-stored in the FPGA and the inverse matrix of the admittance matrix of the direct-current circuit breaker, and specifically comprising the following steps:
if the lightning arrester is subjected to piecewise linearization treatment[9]And if the lightning arrester is in a section state, the section point data of the lightning arrester needs to be stored in advance in the FPGA, the working point of the lightning arrester is searched by using a table look-up method in the simulation, and the inversion operation amount is converted into the operation amount of the table look-up. Assuming that after segmenting the voltammogram of the arrester, the equation of each segmented line is as follows, where i, v are port voltage and current, and GxFor the slope of the segment line of the x-th segment, IxThe intercept of the segment line of the x-th segment.
i=Gxv+Ix (4)
The final current source amount per time step can be obtained as follows:
Figure BDA0002385671830000072
wherein n and n +1 in the lower right-hand parentheses of the voltage represent the nth and n +1 time steps.
After the method is adopted, the model of the circuit breaker finally reflected in the FPGA is shown in fig. 8, the admittance matrix is formula (6), each element in the admittance matrix is a constant, and since the matrix is a symmetric matrix and the inverse matrix is also a symmetric matrix and remains unchanged, only the upper (lower) triangular matrix elements can be stored in the FPGA, 21 elements are stored in total, and the amount required to be updated in each calculation is only a current source.
Figure BDA0002385671830000073
Example 2
The invention based on the same inventive concept also provides a real-time simulation system of the hybrid direct-current circuit breaker suitable for the FPGA, which comprises the following steps:
the decoupling module is used for decoupling the direct current breaker from a direct current power grid;
the model building module is used for carrying out equivalent replacement on the nonlinear element in the decoupled direct-current circuit breaker to build a simplified model;
the simulation operation module is used for carrying out simulation operation on each decoupled direct-current circuit breaker based on the simplified model and an inverse matrix of an admittance matrix pre-stored in the FPGA;
wherein the non-linear element of the direct current breaker comprises: switching devices and arresters.
Further, the decoupling module comprises:
decoupling the DC breaker by using a current-limiting inductor between the DC breaker and the MMC and a transmission line between the DC breaker and the opposite side;
and the equivalent submodule is used for equating the current-limiting inductor and the transmission line into a resistor parallel current source according to the transmission line principle after the direct-current circuit breaker is decoupled, and the resistor is kept unchanged.
Further, the model building module includes:
the first construction submodule is used for regarding an arrester in the decoupled direct current breaker as a nonlinear resistor and performing piecewise linearization processing;
the second construction submodule is used for simulating the on state of a switch by using an inductance and simulating the off state by using a capacitor by using a small-step switch model for the switch in the decoupled direct-current circuit breaker;
and the combined submodule is used for constructing a simplified model based on the circuit subjected to the piecewise linearization processing on the lightning arrester and the small-step switch module.
Furthermore, the simulation operation module comprises a current source metering operator module and an updating submodule;
the current magnitude calculation submodule searches a working point of the arrester by using a table look-up method in simulation according to the segmentation point of the arrester in the simplified model, and further determines the current magnitude updated in each time step;
and the updating submodule updates an inverse matrix of an admittance matrix in the FPGA based on the current source quantity updated at each time step to realize simulation operation.
The admittance matrix is as follows:
Figure BDA0002385671830000091
in the formula, Ron1And Ron2The on-resistances of the main branch and the transfer branch respectively; c1: simulating a capacitance value in the main branch module; c2: simulating a capacitance value in the transfer branch module; z1: the inductance is equivalent to the characteristic impedance of the transmission line; delta t is a simulation step length; z2: characteristic impedance of a long transmission line between the converter station and the opposite side converter station; zs1、Zs2、 Zs3、Zs4Are respectively a switch S1、S2、S3、S4Equivalent resistance in the small step size model; zcs: the equivalent transmission line characteristic impedance of the stray capacitance.
Characteristic impedance Z of the transmission linecsCalculated by the following formula
Figure BDA0002385671830000092
In the formula, CdA capacitance value per unit length; l isd: an inductance value per unit length; cSStray capacitance of the lightning arrester;
the capacitance value C per unit lengthdCalculated as follows:
Figure BDA0002385671830000093
in the formula, Δ l is a transmission line length.
The inductance per unit length LdCalculated as follows:
Figure BDA0002385671830000094
the relation between the port current and the voltage of the x-th section of the segmented straight line is calculated according to the following formula:
i=Gxv+Ix
in the formula, v: a port voltage; i: the port current.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The present invention is not limited to the above embodiments, and any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention are included in the scope of the claims of the present invention which are filed as the application.

Claims (14)

1. A real-time simulation method of a hybrid direct-current circuit breaker suitable for an FPGA is characterized by comprising the following steps:
decoupling the direct current breaker from the direct current power grid;
performing equivalent replacement on the nonlinear element in the decoupled direct-current circuit breaker to construct a simplified model;
carrying out simulation operation on each decoupled direct-current circuit breaker based on the simplified model, a lightning arrester subsection characteristic curve pre-stored in the FPGA and a direct-current circuit breaker admittance matrix inverse matrix;
wherein the nonlinear element of the direct current breaker comprises: switching devices and arresters.
2. The method of claim 1, wherein the decoupling the dc circuit breaker from the dc power grid comprises:
decoupling the direct current breaker by using a current-limiting inductor between the direct current breaker and the MMC and a transmission line between the direct current breaker and the opposite side;
after the direct current breaker is decoupled, the current-limiting inductor and the transmission line are equivalent to a resistor parallel current source according to the transmission line principle, and the resistor is kept unchanged.
3. The method of claim 1, wherein the equivalently replacing the nonlinear element in the decoupled dc circuit breaker and constructing the simplified model comprises:
the lightning arrester in the decoupled direct current breaker is regarded as a nonlinear resistor, and piecewise linearization processing is carried out;
the method comprises the following steps that a small-step switch model is adopted for a switch in a decoupled direct-current circuit breaker, the on state of the switch is simulated by using an inductor, and the off state is simulated by using a capacitor;
and constructing a simplified model based on the circuit and the small step switch module after the lightning arrester is subjected to the piecewise linearization processing.
4. The method of claim 3, wherein the treating the arrester in the decoupled DC circuit breaker as a nonlinear resistor and performing piecewise linearization comprises:
and adding a stray capacitor connected with the lightning arrester in parallel, equivalently converting the stray capacitor into a short transmission line, and performing decoupling calculation on the lightning arrester by using the transmission delay of the transmission line.
5. The method of claim 1, wherein the performing simulation operations based on the simplified model and the lightning arrester segment characteristic curve and the inverse admittance matrix stored in the FPGA in advance comprises:
according to the segmentation points of the lightning arrester in the simplified model, the slope and intercept of each segmented straight line are stored in the FPGA in advance, the working point of the lightning arrester is searched by using a table look-up method in simulation, and the current source quantity of the equivalent model of the lightning arrester is further determined to be updated in each time step;
and realizing simulation operation based on the current source quantity updated by the lightning arrester equivalent model in each time step and the inverse matrix of the admittance matrix in the FPGA.
6. The method of claim 5, wherein the current source quantity updated by the arrester equivalent model per time step is calculated as follows:
Figure FDA0002385671820000021
wherein, In+1The current source quantity of the (n + 1) th time step;
Figure FDA0002385671820000022
the transmission line incident voltage of the (n + 1) th time step; zcs: the equivalent transmission line characteristic impedance of the stray capacitance; gx: the slope of the segment line of the x;
Figure FDA0002385671820000023
the reflected wave voltage of the nth time step; i isx: the section x is the intercept of the segment line.
7. The method of claim 6, wherein the admittance matrix is represented by the following equation, including:
Figure FDA0002385671820000024
in the formula, Ron1And Ron2The on-resistances of the main branch and the transfer branch respectively; c1: simulating a capacitance value in the main branch module; c2: simulating a capacitance value in the transfer branch module; z1: the inductance is equivalent to the characteristic impedance of the transmission line; delta t is a simulation step length; z2: characteristic impedance of a long transmission line between the converter station and the opposite side converter station; zs1、Zs2、Zs3、Zs4Are respectively a switch S1、S2、S3、S4Equivalent resistance in the small step size model; zcs: the equivalent transmission line characteristic impedance of the stray capacitance.
8. The method of claim 7, wherein the stray capacitance is equivalent to a characteristic impedance Z of the transmission linecsCalculated as follows:
Figure FDA0002385671820000025
in the formula, CdA capacitance value per unit length; l isd: an inductance value per unit length; cSStray electricity of lightning arresterAnd (4) capacity value.
9. The method of claim 8, wherein the capacitance per unit length C isdCalculated as follows:
Figure FDA0002385671820000031
in the formula, Δ l is a transmission line length.
10. The method of claim 8, wherein the inductance per unit length value LdCalculated as follows:
Figure FDA0002385671820000032
11. the method of claim 10, wherein the x-th segment piecewise linear has an intercept IxThe relation between the port current and the voltage of the x-th section of the segmented straight line is calculated;
the relation between the port current and the voltage of the x-th section of the segmented straight line is as follows:
i=Gxv+Ix
in the formula, v: a port voltage; i: the port current.
12. A real-time simulation system of a hybrid direct-current circuit breaker suitable for an FPGA is characterized by comprising:
the decoupling module is used for decoupling the direct current breaker from a direct current power grid;
the model building module is used for carrying out equivalent replacement on the nonlinear element in the decoupled direct-current circuit breaker to build a simplified model;
the simulation operation module is used for carrying out simulation operation on each decoupled direct-current circuit breaker based on the simplified model, the lightning arrester subsection characteristic curve and the admittance matrix inverse matrix which are stored in the FPGA in advance;
wherein the non-linear element of the direct current breaker comprises: switching devices and arresters.
13. The system of claim 12, wherein the decoupling module comprises:
decoupling the direct current breaker by using a current-limiting inductor between the direct current breaker and the MMC and a transmission line between the direct current breaker and the opposite side;
and the equivalent submodule is used for equating the current-limiting inductor and the transmission line into a resistor parallel current source according to the transmission line principle after the direct-current circuit breaker is decoupled, and the resistor is kept unchanged.
14. The system of claim 12, wherein the model building module comprises:
the first construction submodule is used for regarding an arrester in the decoupled direct current breaker as a nonlinear resistor and performing piecewise linearization processing;
the second construction submodule is used for simulating the on-state of a switch by using an inductance and simulating the off-state by using a capacitor by using a small-step switch model for the switch in the decoupled direct-current circuit breaker;
and the combined submodule is used for constructing a simplified model based on the circuit subjected to the piecewise linearization processing on the lightning arrester and the small-step switch module.
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