CN106533172A - DC step-down voltage regulator and pulse frequency modulation control circuit and method thereof - Google Patents
DC step-down voltage regulator and pulse frequency modulation control circuit and method thereof Download PDFInfo
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- CN106533172A CN106533172A CN201611123969.3A CN201611123969A CN106533172A CN 106533172 A CN106533172 A CN 106533172A CN 201611123969 A CN201611123969 A CN 201611123969A CN 106533172 A CN106533172 A CN 106533172A
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- 239000004065 semiconductor Substances 0.000 claims description 38
- 230000000630 rising effect Effects 0.000 claims description 36
- 238000007600 charging Methods 0.000 claims description 17
- 239000003990 capacitor Substances 0.000 claims description 14
- 238000007599 discharging Methods 0.000 claims description 12
- 230000007306 turnover Effects 0.000 claims description 7
- 230000000052 comparative effect Effects 0.000 claims description 6
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- 238000004080 punching Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 230000000087 stabilizing effect Effects 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 3
- 101150110971 CIN7 gene Proteins 0.000 description 2
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- 208000031481 Pathologic Constriction Diseases 0.000 description 2
- 101100464782 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) CMP2 gene Proteins 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
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Abstract
The invention relates to a DC step-down voltage regulator and a pulse frequency modulation control circuit and method thereof, and belongs to the field of electronic circuits. The power consumption can be reduced. The circuit comprises a triangular wave generator, a sampling unit, a PFM control unit and a synchronization unit, wherein the triangular wave generator generates a triangular wave when an enable signal of the triangular wave generator is enabled; the sampling unit is used for sampling peak current of an inductive component and output voltage of the DC step-down voltage regulator; the PFM control unit controls the inductive component to be in a charged state when a first condition is met, and controls the inductive component to be in a follow current state when the peak current is greater than a default peak current threshold; the first condition is that two of the following three conditions are met and the remaining one is changed into a satisfied state from an unsatisfied state: the peak current is smaller than the default peak current threshold, the output voltage is lower than default reference voltage and a triangular wave charge-discharge cycle is completed; and the synchronization unit is used for synchronizing the moment when the enable signal of the triangular wave generator begins to be enabled and the moment when the inductive component begins to be charged.
Description
Technical field
The embodiment of the present disclosure is related to electronic circuit field, in particular it relates to a kind of DC buck manostat and its pulse
Frequency modulation(PFM) control circuit and method.
Background technology
With the demand of SOC(system on a chip) and mobile phone modules to High-current output, DC buck manostat needs
All there is in the case of underloading and heavy duty higher efficiency.
In order to efficiency is improved in underloading, the more commonly used underloading control model is jump modulation (Pulse Skip between pulse
Modulation, PSM) control model.The control principle of PSM current-mode control patterns is as shown in figure 1, the schematic diagram is directed to
The upper pipe of the buck of DC buck manostat is PMOS, down tube is NMOS.Its operation principle is as follows:
The work loop of pulsewidth modulation (Pulse Width Modulation, PWM) pattern is:The output voltage of buck
Vout obtains feedback voltage V FB after the feedback network being made up of C1, R1 and R2;Feedback voltage V FB is input to computing and puts
Big device EA, is compared with reference signal Vref of buck output voltages, compares output voltage modulated signal VC for obtaining and pass through
It is compared with oblique wave sampled signal Vramp after the compensation network be made up of C2, C3 and R3, the output of comparator PWMCMP is believed again
The power switch pipe of buck is driven by driver.
The work loop of PSM patterns is:Control loop before VC signals is identical with PWM mode.When load current drops
When low, VC signals are decreased.When VC signals are less than VrefPSM signals, after comparator PSMCMP, PSM controls will be produced
Signal processed.As PSM=1, buck is operated in PFM patterns, and otherwise buck is operated in PWM mode.In PFM states, buck will
With PWM frequency open several times, when buck output voltage be higher than threshold voltage after, buck by shutdown switch, in discharge condition.
Load current is bigger, and the number of times of unlatching is more, conversely, the number of times opened is then fewer.
Such scheme the disadvantage is that, PSM control models be actually PWM mode discontinuous operating mode.In PSM patterns
When, the modules needed for PWM work are in enabled state, therefore can not substantially optimization efficiency.Secondly, PSM underloading moulds
The switching frequency each time of formula is identical with PWM mode, and the number of times of unlatching is simply changed according to load change.Therefore, stricture of vagina
Ripple will be different according to load change and the change of opening times.Output voltage ripple will produce shake, produce subharmonic point
Amount.
The content of the invention
The purpose of the embodiment of the present disclosure is to provide a kind of DC buck manostat and its pulse frequency modulated control circuit
And method, can solve the problem that the problems referred to above of the prior art.
To achieve these goals, the embodiment of the present disclosure provides a kind of pulse frequency for DC buck manostat and adjusts
Control circuit processed, the DC buck manostat include to load the inductive element for providing electric current, and the circuit includes:
Triangular-wave generator, produces triangular wave for enabling when signal is enabled in triangular-wave generator;
Sampling unit, for the peak point current to the inductive element and the output voltage of the DC buck manostat
Sampled;
Pulse frequency modulated control unit, for the inductive element is controlled when first condition meets in charging shape
State, controls the inductive element in freewheeling state, wherein described when the peak point current is more than pre-set peak value current threshold
First condition is that both in following three have met and remaining one is from being unsatisfactory for being changed into meeting:The peak point current is less than
The pre-set peak value current threshold, the output voltage are less than predetermined reference voltage and a triangular wave charging-discharging cycle is completed;
Lock unit, the moment for making the triangular-wave generator enable signal start enable are filled with the inductive element
Establish the timing synchronization of beginning by cable.
According to the another aspect of the embodiment of the present disclosure, there is provided a kind of DC buck manostat, the DC buck voltage stabilizing
Device includes above-mentioned pulse frequency modulated control circuit.
According to the another aspect of the embodiment of the present disclosure, there is provided a kind of pulse frequency modulated for DC buck manostat
Control method, the DC buck manostat include to load the inductive element for providing electric current, and the method includes:
The output voltage of peak point current and the DC buck manostat to the inductive element is sampled;
The inductive element is controlled when first condition meets in charged state, wherein the DC buck manostat
Triangular-wave generator triangular-wave generator enable signal start enable moment and the inductive element charge start when
Carve synchronous, the triangular-wave generator produces triangular wave for enabling when signal is enabled in the triangular-wave generator;
The inductive element is controlled when the peak point current is more than pre-set peak value current threshold in freewheeling state,
Wherein described first condition is that both in following three have met and remaining one is from being unsatisfactory for being changed into meeting:
The peak point current is less than predetermined reference voltage and a triangular wave less than the pre-set peak value current threshold, the output voltage
Charging-discharging cycle is completed.
Above-mentioned technical proposal is by when DC buck manostat is in light condition, making the triangle of triangular-wave generator
Wave producer enables signal and starts the timing synchronization that the inductive element charging of the moment and DC buck manostat for enabling starts,
And the peak point current of inductive element is limited no more than pre-set peak value current threshold, the purpose of PFM controls when reaching underloading.By
In the peak inrush current for limiting inductive element charging, therefore according to input and output voltage and inductance value, can draw in PFM shapes
The ripple value of maximum switching frequency (i.e. PWM operating frequencies) under state.Again by the cut-off current and current ripples size of peak point current,
The load current threshold from PFM pattern switching to PWM mode can be drawn.And as the switching frequency of output current can be with load electricity
Cleanliness increases, and ripple linearly can diminish then, under whole PFM patterns will not produce order harmonic components.Further, since PFM
The simple structure of control circuit, and under PFM control models do not need PWM loops work always, therefore rise reduce direct current
The power consumption of buck regulator, improves efficiency.And make the triangular-wave generator enable signal of triangular-wave generator start to enable
Moment and inductive element charge the timing synchronization for starting, then can solve the problem that some load patch occur due to triangle period of wave
With current charge-discharge electricity the cycle be it is non-integral multiple caused by output voltage fall or upper punching problem.
Other feature and advantage of the embodiment of the present disclosure will be described in detail in subsequent specific embodiment part.
Description of the drawings
Accompanying drawing is the embodiment of the present disclosure to be further understood for providing, and constitutes a part for description, with
The specific embodiment in face is used for explaining the embodiment of the present disclosure together, but does not constitute the restriction to the embodiment of the present disclosure.Attached
In figure:
Fig. 1 is the principle schematic of existing PSM control models;
Fig. 2 is the buck structural representations in DC buck manostat;
Fig. 3 is showing for the pulse frequency modulated control circuit for DC buck manostat according to the embodiment of the present disclosure
Meaning block diagram;
Fig. 4 is the illustrative circuitry of the triangular-wave generator of the pulse frequency modulated control circuit according to the embodiment of the present disclosure
Figure;
Fig. 5 is showing for the pulse frequency modulated control unit of the pulse frequency modulated control circuit according to the embodiment of the present disclosure
Meaning circuit diagram;
Fig. 6 is the schematic circuit diagram of the lock unit of the pulse frequency modulated control circuit according to the embodiment of the present disclosure;
Fig. 7 is the pulse frequency modulated pattern turnover control of the pulse frequency modulated control circuit according to the embodiment of the present disclosure
The schematic circuit diagram of unit;
Fig. 8 shows the simulation result of the lower PFM control models of 100mA loads;
Fig. 9 shows the simulation result of PFM control models in load change procedure;
Figure 10 is the pulse frequency modulated controlling party for DC buck manostat according to a kind of embodiment of the disclosure
The flow chart of method.
Specific embodiment
The specific embodiment of the embodiment of the present disclosure is described in detail below in conjunction with accompanying drawing.It should be appreciated that this
The described specific embodiment in place is merely to illustrate and explains the embodiment of the present disclosure, is not limited to the embodiment of the present disclosure.
The embodiment of the present disclosure provides a kind of pulse frequency modulated control circuit for DC buck manostat, the direct current
Buck regulator includes to load the inductive element for providing electric current.Fig. 2 shows what the DC buck manostat was driven
The schematic circuit diagram of buck power switch pipes and its passive control element.As shown in Fig. 2 the PFM control letters obtained under PFM patterns
The break-make of the upper pipe M11 and down tube M12 in buck is controlled number after driver 20.When M11 conductings, M12 disconnect, perception unit
Part L charges, so as to the load supplying to be made up of capacitor C and resistor R;When M11 disconnections, M12 are turned on, inductive element L
In freewheeling state.In addition, the pwm control signal obtained under PWM mode is also by the upper pipe controlled after driver 20 in buck
The break-make of M11 and down tube M12.
It will be apparent to a skilled person that Fig. 2 is only example.In fact, straight described in the embodiment of the present disclosure
Stream buck regulator and its pulse frequency modulated control circuit are applied to any kind of buck structures of driving.
The pulse frequency modulated for DC buck manostat according to the embodiment of the present disclosure described in detail below is controlled
Circuit.As shown in figure 3, the circuit can include:
Triangular-wave generator 301, produces triangular wave for enabling when signal is enabled in triangular-wave generator;
Sampling unit 302, for the output of the peak point current to the inductive element and the DC buck manostat
Voltage is sampled;
Pulse frequency modulated control unit 303, for the inductive element is controlled when first condition meets in charging
State, controls the inductive element in freewheeling state, wherein institute when the peak point current is more than pre-set peak value current threshold
It is that both in following three have met and remaining one is from being unsatisfactory for being changed into meeting to state first condition:The peak point current is little
Predetermined reference voltage is less than in the pre-set peak value current threshold, the output voltage and a triangular wave charging-discharging cycle is complete
Into;
Lock unit 304, starts the moment for enabling with the perception unit for making the triangular-wave generator enable signal
The timing synchronization that part charging starts.
Above-mentioned technical proposal is by when DC buck manostat is in light condition, making triangular-wave generator 301
Triangular-wave generator enables inductive element L (shown in Fig. 2) chargings that signal starts the moment and DC buck manostat for enabling
The timing synchronization of beginning, and the peak point current of inductive element L is limited no more than pre-set peak value current threshold, when reaching underloading
The purpose that pulse frequency modulated (Pulse Frequency Modulation, PFM) is controlled.Due to limiting inductive element charging
Peak inrush current, therefore according to input and output voltage and inductance value, can show that maximum switching frequency is (i.e. under PFM states
PWM operating frequencies) ripple value.Again by the cut-off current and current ripples size of peak point current, can draw from PFM pattern switchings
To the load current threshold of PWM mode.And as the switching frequency of output current can linearly increase with load current, ripple then
Can linearly diminish, order harmonic components will not be produced under whole PFM patterns.Further, since the simple structure of PFM control circuit,
And under PFM control models do not need PWM loops to work always, therefore the power consumption for reducing DC buck manostat is acted,
Improve efficiency.And make the triangular-wave generator of triangular-wave generator 301 enable moment and the inductive element L that signal starts to enable
Charge the timing synchronization for starting, then can solve the problem that in some load patch appearance due to triangle period of wave and current charge-discharge electricity cycle
Fall for non-integral multiple caused output voltage or upper punching problem.
In a kind of possible embodiment, when DC buck manostat is in heavy condition, which is operated in PWM moulds
In formula, now triangular-wave generator enables signal and is constantly in enabled state, therefore triangular-wave generator 301 being capable of the company of generation
Continuous triangular wave.Produced triangular signal can be compared to obtain tying the buck for example shown in Fig. 2 with reference signal
The pwm control signal that structure is controlled.And when DC buck manostat is in light condition, the triangular-wave generator makes
Energy signal starts the timing synchronization that the moment for enabling and inductive element L chargings start, and this causes triangular-wave generator 301 to produce
The interrupted triangular wave of life.
In a kind of possible embodiment, the circuit structure of triangular-wave generator 301 can be with as shown in figure 4, can wrap
Include:
Connected by the first semiconductor switch S11, the 3rd semiconductor switch S13 and capacitor C1 the charge circuit for being formed, institute
State the output voltage vtri of the voltage as the triangular-wave generator 301 at capacitor C1 two ends, the 3rd semiconductor switch
The break-make of S13 enables signal PFM_ch_ctl controls by the triangular-wave generator;
Connected by the second semiconductor switch S12, the 3rd semiconductor switch S13 and capacitor C1 electric discharge for being formed
Loop;
The output voltage vtri of the triangular-wave generator 301 is with triangular wave high voltage threshold vh as the second comparator
The input signal of CMP2, the output voltage vtri of the triangular-wave generator 301 and triangular wave low voltage threshold vl are used as first
The input signal of comparator CMP1, output signal vl_th1 of first comparator CMP1 and the second comparator CMP2's
Input signal of output signal vh_th1 as rest-set flip-flop RS1, Q output signals vcharge of the rest-set flip-flop RS1 are used for
Control the first semiconductor switch S11 it is different with the second semiconductor switch S12 when it is in the conduction state.
By the triangle generator circuit structure shown in Fig. 4, when DC buck manostat works in a PWM mode
When, triangular-wave generator enable signal PFM_ch_ctl can control the 3rd semiconductor switch S13 and be constantly in conducting state (example
Such as, if the 3rd semiconductor switch S13 is NMOS tube, triangular-wave generator enables signal PFM_ch_ctl equal to 1, namely always
For high level), to ensure the closure of charging and discharging circuit, so as to continuous discharge and recharge is carried out to capacitor C1, produce continuous
Triangular signal vtri.And preferably, the size of current of the charge circuit and the discharge loop is equal, namely charge
Electric current Ich is equal in magnitude with discharge current Idisch.In addition, triangular wave high voltage threshold vh and triangular wave low voltage threshold vl
Purpose is for the peak-to-peak value for limiting produced triangular wave.
In addition, the discharge and recharge frequency of triangular-wave generator 301 is controlled by Q output signals vcharge of rest-set flip-flop RS1
System.Wherein, if the conduction type of the first semiconductor switch S11 and the second semiconductor switch S12 is identical, for example can use
Vcharge signals control the first half and lead controlling the second semiconductor switch S12 with the inversion signal vchargeB of vcharge
Body switchs S11.And if the conduction type of the first semiconductor switch S11 and the second semiconductor switch S12 is different, then can be such as
The second semiconductor switch S12 and the first semiconductor switch S11 is controlled simultaneously with vcharge signals.
In a kind of possible embodiment, the circuit structure of the pulse frequency modulated control unit 303 can be such as Fig. 5
It is shown, can include:
The peak point current Isample of the inductive element L and pre-set peak value current threshold PFM_lim is used as the 4th comparator
The input signal of CMP4, the output voltage VFB of the DC buck manostat and predetermined reference voltage Vref is used as
The input signal of three comparator CMP3, input signals of the power supply signal VDD as the first d type flip flop D1, the rest-set flip-flop RS1
Q output signals vcharge inversion signal vchargeB as the first d type flip flop D1 clock signal;
Output signal S1 of the 4th comparator CMP4, Q output signals S2 of the first d type flip flop D1 and described
The output signal S3 phase of three comparator CMP3 passes through the place of the device M1 that rising edge signal is changed into rising pulses signal with afterwards
Signal PFM_EN phases are enabled with pulse frequency modulated after reason and anti-phase process and the output signal of Xiang Yuhou is triggered as the 2nd D
The clear terminal input signal of device D2, the pulse frequency modulated are enabled when signal PFM_EN is enabled and make the DC buck voltage stabilizing
Device into pulse frequency modulated pattern, do not enable when make the DC buck manostat enter PWM mode;
Q output signals PFM of the second d type flip flop D2 are changed into rising pulses through anti-phase process, by rising edge signal
Signal PFM_EN phases and the letter of Xiang Yuhou are enabled after the process of the device M2 of signal, anti-phase process with the pulse frequency modulated
Number as the first d type flip flop D1 clear terminal input signal;
Output signal S1 of the 4th comparator CMP4 is believed through anti-phase process, by rising edge signal change rising pulses
Number the process of device M3, enable signal PFM_EN phases and the signal of Xiang Yuhou with the pulse frequency modulated after anti-phase process
Used as the clock signal of the second d type flip flop D2, the power supply signal VDD is the input signal of the second d type flip flop D2.
By the circuit structure of the pulse frequency modulated control unit 303 shown in Fig. 5, the Q of the second d type flip flop D2 is defeated
Go out the on off state of the upper down tube of buck when signal PFM determines that DC buck manostat is in PFM control models.With Fig. 2
As a example by shown buck structures, as PFM=1, corresponding to upper pipe M11 disconnections, the conducting of down tube M12, i.e. inductive element L is in continuous
Stream mode;Conversely, during PFM=0, disconnecting corresponding to upper pipe M11 conductings, down tube M12, then inductive element L is in charged state.
During non-PFM patterns (namely pwm pattern), i.e. PFM_EN=0, the second d type flip flop D2 are in cleared condition all the time.By above-mentioned
Description understands so that inductive element L is in freewheeling state, needs output signal S1 for meeting the 4th comparator to experience by 1 to 0
Process, i.e. Isample current sampling signals become greater than PFM_lim by less than PFM_lim, and such S1 signals are through phase inverter
And a rising edge signal, now the second d type flip flop D2 will be produced at the clock signal CK end of the second d type flip flop D2 after module M3
Clear terminal input signal be 1, therefore will cause PFM=1.
Want to make inductive element L in charged state, then need to allow the clear terminal input signal of the second d type flip flop D2 be
Zero.Meet this condition needs to meet:Output signal S1 of the 4th comparator, output signal S2 of the first d type flip flop and the 3rd
In output signal S3 of comparator, there are two output signals to be 1, another output signal is then changed into 1 from 0.So, three it is defeated
Go out signal after logical AND gate, a rising edge signal will be produced;Again through M1 modules, rising edge signal is converted into rising
Pulse signal;After eventually passing phase inverter, negative pulse input signal is produced in the clear terminal RN of the second d type flip flop D2.Wherein, S1
=1, show PFM_lim>Isample;S2=1, shows that triangular-wave generator 301 has completed a charging-discharging cycle;S3=1,
Show VFB<Vref.
Therefore, the clear terminal RN in the second d type flip flop D2 produces negative pulse and there are three kinds of combinations:
(1) S1=1, S2=1, S3 are changed into 1 from 0.This peak value sampling electric current corresponding to the upper PMOS of buck structures
Isample is less than pre-set peak value current threshold PFM_lim, and a triangular wave charging-discharging cycle has been completed, and now occurs in that straight
The output voltage VFB of stream buck regulator is less than predetermined reference voltage Vref, therefore now inductive element L will be charged;
(2) S1=1, S3=1, S2 are changed into 1 from 0.This peak value sampling electric current corresponding to the upper PMOS of buck structures
Isample is less than pre-set peak value current threshold PFM_lim, and the output voltage VFB of DC buck manostat is less than preset reference
Voltage Vref, a triangular wave charging-discharging cycle are just completed, i.e. the inversion signal of the Q output signals of rest-set flip-flop RS1
VchargeB is changed into 1 from 0;
(3) S2=1, S3=1, S1 are changed into 1 from 0.This has been completed corresponding to a triangular wave charging-discharging cycle, direct current drop
The output voltage VFB of die mould manostat is less than predetermined reference voltage Vref, the peak value sampling electric current of the upper PMOS of buck structures
Isample will cause PFM=1 after more than PFM_lim, and now Isample will decline, after its value is less than PFM_lim, the
Output signal S1 of four comparators will be changed into 1 from 0.
Fig. 6 shows the exemplary circuit figure of lock unit 304.Wherein, the lock unit 304 can be touched including the 3rd D
Device D3 is sent out, wherein:
Input signals of the power supply signal VDD as the 3d flip-flop D3;
The inversion signal vchargeB of Q output signals vcharge of the rest-set flip-flop RS1 is triggered as the 3rd D
The clock signal of device D3;
Q output signals PFM of the second d type flip flop D2 are changed into rising pulses through anti-phase process, by rising edge signal
Signal PFM_EN phases and the letter of Xiang Yuhou are enabled after the process of the device M4 of signal, anti-phase process with the pulse frequency modulated
Number as the 3d flip-flop D3 clear terminal input signal;
The QN output signals of the 3d flip-flop D3 enable signal PFM_ch_ctl as the triangular-wave generator.
By the circuit diagram of the lock unit 304 shown in Fig. 6, it can be seen that being operated in DC buck manostat
During pwm pattern, PFM_EN=0, therefore PFM_ch_ctl=1, now the 3rd quasiconductor in triangular-wave generator 301 open
Close S13 in the conduction state all the time so that triangular-wave generator 301 can produce continuous triangular wave, so as to just not interfere with
Normal triangular wave discharge and recharge.When DC buck manostat is operated in PFM control models, when PFM is by high step-down, i.e. buck
The upper PMOS turn-on instant of structure, PFM signals by M4 modules produce positive pulse signal, the signal after phase inverter with
PFM_EN signals phase and the clear terminal RN input undersuings in 3d flip-flop D3, therefore 3d flip-flop D3 is clear
Zero so that PFM_ch_ctl=1.Now triangular-wave generator 301 is started to charge up.When vchargeB signals produce a positive pulse
During signal, show that a triangular wave charging-discharging cycle is completed, now will be switched off triangular wave charge path, be i.e. now PFM_ch_ctl
=0.Therefore, by the circuit diagram of the lock unit 304 shown in Fig. 6, it is possible to achieve triangular-wave generator enables signal
PFM_ch_ctl starts the timing synchronization that moment is started with inductive element L chargings for enabling, and can solve the problem that in some loads
Section occur due to the triangle period of wave and current charge-discharge electricity cycle be it is non-integral multiple caused by output voltage fall or upper punching
Problem.
In a kind of possible embodiment, the pulse frequency modulated control circuit can also include pulse frequency modulated
Pattern passes in and out control unit, and now the sampling unit 302 is can be also used for the average electric current under the PWM mode
Sampled.
Fig. 7 shows that pulse frequency modulated pattern passes in and out the circuit diagram of control unit, and which can compare including the 5th
Device CMP5, the 6th comparator CMP6, phase inverter INV1 and with door AND1, wherein, the average electric current that sampling unit 302 is sampled
The equal threshold voltage V that Isense is converted toIsenseWith default average voltage threshold Vth_PFMAs the 5th comparator CMP5's
Input signal, the output voltage VFB of the DC buck manostat and the default electricity lower than the predetermined reference voltage Vref
Input signal of pressure value VFB_lev1 as the 6th comparator CMP6, the output signal of the 6th comparator CMP6 are passed through
After phase inverter INV1 is anti-phase with the output signal of the 5th comparator CMP5 with door AND1 at obtain the pulse frequency
Rate modulation enables signal PFM_EN.
By the circuit diagram shown in Fig. 7, Vth_PFMIt is the threshold voltage into PFM control models, VFB_lev1 is one
The individual value more lower slightly than predetermined reference voltage Vref.Work as VIsenseLess than Vth_PFMWhen, the output signal of the 5th comparator CMP5 is 1,
And VFB_lev1 is less than VFB, therefore PFM_EN=1 in steady statue, so that DC buck manostat is controlled into PFM
Pattern.When VFB is less than VFB_lev1, the output signal of the 6th comparator CMP6 is 1, therefore PFM_EN=0, namely when load
When electric current is more than peak value current limliting corresponding electric current average, due to the restriction of maximum switching frequency, now inductive element L can not be exported
Enough energy can decline to load, therefore VFB, so as to jump out PFM control models.In addition, presetting equal threshold voltage by setting
Threshold value Vth_PFMSize so as to the electric current average of corresponding entrance PFM patterns less than electric current average when jumping out PFM patterns, this
Retarding window ensure that and will not be switched between PFM patterns and PWM mode repeatedly under a certain load condition.
Fig. 8 shows the simulation result of the lower PFM control models of 100mA loads.In simulation result, vtri represents that triangular wave is sent out
Raw device output signal, IL represent the electric current of inductive element L, and PFM represents control buck power switch pipe break-makes under PFM control models
Signal, PFM_ch_ctl represent triangular-wave generator enable signal.From simulation result as can be seen that in light condition,
Vtri signals are synchronous with the holding of the start time of IL signals.In this example, the peak point current of IL is limited in 2A or so, therefore upper pipe
M11 after peak current threshold 2A is reached, will be switched off pipe M11, conducting down tube M12, make inductive element L be in afterflow shape every time
State.After a triangular wave charging-discharging cycle terminates, vtri signals will be in low level threshold value all the time, and until next time, perception is first
Part charges and starts, and triangular-wave generator will start next charge cycle.
Fig. 9 shows the simulation result of PFM control models in load change procedure, wherein load from 20mA changing to 2A.
In Fig. 9, output signals of the vtri for triangular-wave generator, electric currents of the IL for inductive element L, Vout is DC decompression
The output voltage of type manostat, Iload are load current, and PFM_EN is PFM pattern enables signals.PFM_EN=1, shows direct current
Buck regulator is operated in PFM control models.It can be seen that during loading from little change greatly, IL perception unit
The open frequency of part electric current rises, and the open frequency of vtri also rises therewith, and both keep synchronous.When load current becomes big
When, open frequency accelerates, and causes ripple to diminish.At the t1 moment that double-head arrow is indicated, as load current Iload is limited more than peak value
Corresponding average electric current output is flowed, therefore output voltage Vout begins to decline, after which is less than preset value, PFM_EN=0 is jumped out
PFM control models, into pwm pattern.From simulation result as can be seen that at the t1 moment, switching frequency is PWM frequencies
Rate, the i.e. peak frequency of PFM mode of operations.Can visually see from figure, ripple value now is equal to the stricture of vagina under PWM mode
Wave number.On the premise of peak current level and electric current peak-to-peak value is known, you can draw its average electric current.This electric current be from
PFM patterns jump back out to the threshold point of PWM mode.
The embodiment of the present disclosure also provides a kind of DC buck manostat, and the DC buck manostat includes being described above
The pulse frequency modulated control circuit for DC buck manostat.
The power management module that the DC buck manostat mentioned in the embodiment of the present disclosure can be used in chip for cell phone.
The embodiment of the present disclosure also provides a kind of pulse frequency modulated control method for DC buck manostat, and this is straight
Stream buck regulator includes to load the inductive element for providing electric current, and as shown in Figure 10, the method may comprise steps of:
In step S1001, the output electricity of peak point current and the DC buck manostat to the inductive element
Pressure is sampled;
In step S1002, the inductive element is controlled when first condition meets in charged state, wherein described straight
The triangular-wave generator of the triangular-wave generator of stream buck regulator enables signal and starts the moment of enable and the perception unit
The timing synchronization that part charging starts, the triangular-wave generator are produced for enabling when signal is enabled in the triangular-wave generator
Triangular wave;Wherein, the first condition is that both in following three have met and remaining one is from being unsatisfactory for being changed into meeting:
The peak point current is less than predetermined reference voltage and a triangular wave less than the pre-set peak value current threshold, the output voltage
Charging-discharging cycle is completed.
In the step s 1003, control at the inductive element when the peak point current is more than pre-set peak value current threshold
In freewheeling state.
Above-mentioned technical proposal is by when DC buck manostat is in light condition, making the triangle of triangular-wave generator
Wave producer enables signal and starts the timing synchronization that the inductive element charging of the moment and DC buck manostat for enabling starts,
And the peak point current of inductive element is limited no more than pre-set peak value current threshold, the purpose of PFM controls when reaching underloading.By
In the peak inrush current for limiting inductive element charging, therefore according to input and output voltage and inductance value, can draw in PFM shapes
The ripple value of maximum switching frequency (i.e. PWM operating frequencies) under state.Again by the cut-off current and current ripples size of peak point current,
The load current threshold from PFM pattern switching to PWM mode can be drawn.And as the switching frequency of output current can be with load electricity
Cleanliness increases, and ripple linearly can diminish then, under whole PFM patterns will not produce order harmonic components.Further, since PFM
The simple structure of control circuit, and under PFM control models do not need PWM loops work always, therefore rise reduce direct current
The power consumption of buck regulator, improves efficiency.And make the triangular-wave generator enable signal of triangular-wave generator start to enable
Moment and inductive element charge the timing synchronization for starting, then can solve the problem that some load patch occur due to triangle period of wave
With current charge-discharge electricity the cycle be it is non-integral multiple caused by output voltage fall or upper punching problem.
In a kind of possible embodiment, the triangular-wave generator includes:
Connected by the first semiconductor switch, the 3rd semiconductor switch and capacitor the charge circuit for being formed, the capacitor
Output voltage of the voltage at two ends as the triangular-wave generator, the break-make of the 3rd semiconductor switch is by the triangular wave
Generator enables signal control;
Connected by the second semiconductor switch, the 3rd semiconductor switch and the capacitor discharge loop for being formed;
Input signal of the output voltage and triangular wave high voltage threshold of the triangular-wave generator as the second comparator,
Input signal of the output voltage and triangular wave low voltage threshold of the triangular-wave generator as first comparator, described first
Input signal of the output signal of comparator and second comparator as rest-set flip-flop, the Q output letters of the rest-set flip-flop
Number for control first semiconductor switch it is different with second semiconductor switch when it is in the conduction state.
In a kind of possible embodiment, the size of current of the charge circuit and the discharge loop is equal.
It is in a kind of possible embodiment, described that the inductive element is controlled when first condition meets in charging shape
State and the step that the inductive element is controlled when the peak point current is more than pre-set peak value current threshold in freewheeling state
It is rapid by pulse frequency modulated control unit realizing, the pulse frequency modulated control unit includes:
The input signal of the peak point current and the pre-set peak value current threshold as the 4th comparator, the direct current drop
The input signal of the output voltage of die mould manostat and the predetermined reference voltage as the 3rd comparator, power supply signal is used as
The input signal of one d type flip flop, the inversion signal of the Q output signals of the rest-set flip-flop as first d type flip flop when
Clock signal;
The output signal of the 4th comparator, the Q output signals of first d type flip flop and the 3rd comparator
Output signal phase with afterwards, with pulse frequency after process and anti-phase process that rising edge signal is changed into rising pulses signal
Modulation enables the clear terminal input signal of the output signal as the second d type flip flop of signal phase and, Xiang Yuhou, the pulse frequency
Modulation enable make when signal is enabled the DC buck manostat into pulse frequency modulated pattern, do not enable when make it is described straight
Stream buck regulator enters PWM mode;
The Q output signals of second d type flip flop are changed into rising pulses signal through anti-phase process, by rising edge signal
Signal phase is enabled with the pulse frequency modulated after process, anti-phase process and the signal of Xiang Yuhou is used as first d type flip flop
Clear terminal input signal;
The output signal of the 4th comparator changes the place of rising pulses signal through anti-phase process, by rising edge signal
Signal phase is enabled with the pulse frequency modulated after reason, anti-phase process and the signal of Xiang Yuhou is used as second d type flip flop
Clock signal, the power supply signal are the input signal of second d type flip flop.
In a kind of possible embodiment, the triangular wave of the triangular-wave generator of the DC buck manostat occurs
Device is enabled the step of signal starts the timing synchronization that moment is started with inductive element charging for enabling by lock unit reality
Existing, the lock unit includes:
3d flip-flop;
Input signal of the power supply signal as the 3d flip-flop;
Clock signal of the inversion signal of the Q output signals of the rest-set flip-flop as the 3d flip-flop;
The Q output signals of second d type flip flop are changed into rising pulses signal through anti-phase process, by rising edge signal
Signal phase is enabled with the pulse frequency modulated after process, anti-phase process and the signal of Xiang Yuhou is used as the 3d flip-flop
Clear terminal input signal;
The QN output signals of the 3d flip-flop enable signal as the triangular-wave generator.
In a kind of possible embodiment, the method also includes:
Average electric current under the PWM mode is sampled;
According to comparative result and the DC buck voltage stabilizing of the average electric current that samples and default average current threshold
The output voltage of device and the comparative result of the preset voltage value lower than the predetermined reference voltage, control to pass in and out pulse frequency tune
Molding formula.
In a kind of possible embodiment, the ratio of the average electric current that the foundation is sampled and default average current threshold
The ratio of the output voltage of relatively result and the DC buck manostat and the preset voltage value lower than the predetermined reference voltage
Relatively result come control pass in and out pulse frequency modulated pattern the step of, can by pulse frequency modulated pattern pass in and out control unit come
Realize,
Pulse frequency modulated pattern turnover control unit include the 5th comparator, the 6th comparator, phase inverter and with
Door, wherein, the input signal of the average electric current that samples and default average current threshold as the 5th comparator is described straight
The output voltage and the preset voltage value lower than the predetermined reference voltage of stream buck regulator is used as the 6th comparator
Input signal, after the output signal of the 6th comparator is anti-phase with the output signal of the 5th comparator with obtain institute
State pulse frequency modulated and enable signal.
According to the such as triangular-wave generator, pulse frequency modulated control unit being related in the method for the embodiment of the present disclosure,
The concrete principle of lock unit and pulse frequency modulated pattern turnover control unit is described according to the embodiment of the present disclosure
It has been described in detail in circuit, here is omitted.
The preferred implementation of the embodiment of the present disclosure is described in detail above in association with accompanying drawing, but, the embodiment of the present disclosure is simultaneously
The detail being not limited in above-mentioned embodiment, in the range of the technology design of the embodiment of the present disclosure, can be to disclosure reality
The technical scheme for applying example carries out various simple variants, and these simple variants belong to the protection domain of the embodiment of the present disclosure.
It is further to note that each particular technique feature described in above-mentioned specific embodiment, in not lance
In the case of shield, can be combined by any suitable means.In order to avoid unnecessary repetition, the embodiment of the present disclosure pair
Various possible compound modes are no longer separately illustrated.
Additionally, combination in any between a variety of embodiments of the embodiment of the present disclosure, can also be carried out, as long as which is not
The thought of the embodiment of the present disclosure is run counter to, which should equally be considered as embodiment of the present disclosure disclosure of that.
Claims (15)
1. a kind of pulse frequency modulated control circuit for DC buck manostat, the DC buck manostat include to
Load provides the inductive element of electric current, it is characterised in that the circuit includes:
Triangular-wave generator, produces triangular wave for enabling when signal is enabled in triangular-wave generator;
Sampling unit, the output voltage for the peak point current to the inductive element and the DC buck manostat are carried out
Sampling;
Pulse frequency modulated control unit, is in charged state for the inductive element is controlled when first condition meets,
The peak point current controls the inductive element in freewheeling state when being more than pre-set peak value current threshold, wherein described first
Part is that both in following three have met and remaining one is from being unsatisfactory for being changed into meeting:The peak point current is less than described pre-
If peak current threshold, the output voltage are less than predetermined reference voltage and a triangular wave charging-discharging cycle is completed;
Lock unit, for enabling the triangular-wave generator, signal starts the moment of enable and inductive element charging is opened
The timing synchronization of beginning.
2. circuit according to claim 1, it is characterised in that the triangular-wave generator includes:
Connected by the first semiconductor switch, the 3rd semiconductor switch and capacitor the charge circuit for being formed, the capacitor two ends
Voltage as the triangular-wave generator output voltage, the break-make of the 3rd semiconductor switch occurs by the triangular wave
Device enables signal control;
Connected by the second semiconductor switch, the 3rd semiconductor switch and the capacitor discharge loop for being formed;
Input signal of the output voltage and triangular wave high voltage threshold of the triangular-wave generator as the second comparator, it is described
Input signal of the output voltage and triangular wave low voltage threshold of triangular-wave generator as first comparator, described first compares
Input signal of the output signal of device and second comparator as rest-set flip-flop, the Q output signals of the rest-set flip-flop are used
It is in the conduction state when control first semiconductor switch is different with second semiconductor switch.
3. circuit according to claim 2, it is characterised in that the size of current of the charge circuit and the discharge loop
It is equal.
4. circuit according to claim 2, it is characterised in that first semiconductor switch and second quasiconductor are opened
The conduction type of pass is identical or different.
5. circuit according to claim 2, it is characterised in that the pulse frequency modulated control unit includes:
The input signal of the peak point current and the pre-set peak value current threshold as the 4th comparator, the DC buck
The input signal of the output voltage of manostat and the predetermined reference voltage as the 3rd comparator, power supply signal is used as a D
The input signal of trigger, the inversion signal of the Q output signals of the rest-set flip-flop are believed as the clock of first d type flip flop
Number;
The output of the output signal, the Q output signals of first d type flip flop and the 3rd comparator of the 4th comparator
Signal phase with afterwards, with pulse frequency modulated after process and anti-phase process that rising edge signal is changed into rising pulses signal
Enable the clear terminal input signal of the output signal as the second d type flip flop of signal phase and, Xiang Yuhou, the pulse frequency modulated
Enable make when signal is enabled the DC buck manostat into pulse frequency modulated pattern, do not enable when make direct current drop
Die mould manostat enters PWM mode;
The Q output signals of second d type flip flop are changed into the place of rising pulses signal through anti-phase process, by rising edge signal
Signal phase is enabled with the pulse frequency modulated after reason, anti-phase process and the signal of Xiang Yuhou is used as first d type flip flop
Clear terminal input signal;
The output signal of the 4th comparator through anti-phase process, by rising edge signal change rising pulses signal process,
Enable with the pulse frequency modulated after anti-phase process the signal of signal phase and, Xiang Yuhou as second d type flip flop when
Clock signal, the power supply signal are the input signal of second d type flip flop.
6. circuit according to claim 5, it is characterised in that the lock unit includes:
3d flip-flop;
Input signal of the power supply signal as the 3d flip-flop;
Clock signal of the inversion signal of the Q output signals of the rest-set flip-flop as the 3d flip-flop;
The Q output signals of second d type flip flop are changed into the place of rising pulses signal through anti-phase process, by rising edge signal
Signal phase is enabled with the pulse frequency modulated after reason, anti-phase process and the signal of Xiang Yuhou is used as the 3d flip-flop
Clear terminal input signal;
The QN output signals of the 3d flip-flop enable signal as the triangular-wave generator.
7. the circuit according to claim 5 or 6, it is characterised in that the pulse frequency modulated control circuit also includes arteries and veins
Frequency modulation pattern turnover control unit is rushed, wherein:
The sampling unit is additionally operable to sample the average electric current under the PWM mode;
Pulse frequency modulated pattern turnover control unit include the 5th comparator, the 6th comparator, phase inverter and with door, its
In, the input signal of the average electric current that samples and default average current threshold as the 5th comparator, the direct current drop
The output voltage of die mould manostat and the preset voltage value lower than the predetermined reference voltage are used as the defeated of the 6th comparator
Enter signal, after the output signal of the 6th comparator is anti-phase with the output signal of the 5th comparator with obtain the arteries and veins
Rush frequency modulation(PFM) and enable signal.
8. a kind of DC buck manostat, it is characterised in that the DC buck manostat is appointed in including claim 1 to 7
Circuit described in one claim.
9. a kind of pulse frequency modulated control method for DC buck manostat, the DC buck manostat include to
Load provides the inductive element of electric current, it is characterised in that the method includes:
The output voltage of peak point current and the DC buck manostat to the inductive element is sampled;
The inductive element is controlled when first condition meets in charged state, wherein the three of the DC buck manostat
The triangular-wave generator enable signal of angle wave producer starts the moment for enabling and the moment of inductive element charging beginning is same
Step, the triangular-wave generator produce triangular wave for enabling when signal is enabled in the triangular-wave generator;
The inductive element is controlled when the peak point current is more than pre-set peak value current threshold in freewheeling state,
Wherein described first condition is that both in following three have met and remaining one is from being unsatisfactory for being changed into meeting:It is described
Peak point current is less than predetermined reference voltage and a triangular wave charge and discharge less than the pre-set peak value current threshold, the output voltage
The electric cycle completes.
10. method according to claim 9, it is characterised in that the triangular-wave generator includes:
Connected by the first semiconductor switch, the 3rd semiconductor switch and capacitor the charge circuit for being formed, the capacitor two ends
Voltage as the triangular-wave generator output voltage, the break-make of the 3rd semiconductor switch occurs by the triangular wave
Device enables signal control;
Connected by the second semiconductor switch, the 3rd semiconductor switch and the capacitor discharge loop for being formed;
Input signal of the output voltage and triangular wave high voltage threshold of the triangular-wave generator as the second comparator, it is described
Input signal of the output voltage and triangular wave low voltage threshold of triangular-wave generator as first comparator, described first compares
Input signal of the output signal of device and second comparator as rest-set flip-flop, the Q output signals of the rest-set flip-flop are used
It is in the conduction state when control first semiconductor switch is different with second semiconductor switch.
11. methods according to claim 10, it is characterised in that the electric current of the charge circuit and the discharge loop is big
It is little equal.
12. methods according to claim 10, it is characterised in that described that the perception unit is controlled when first condition meets
Part is in charged state and described control the inductive element and be in when the peak point current is more than pre-set peak value current threshold
The step of freewheeling state, realizes that by pulse frequency modulated control unit the pulse frequency modulated control unit includes:
The input signal of the peak point current and the pre-set peak value current threshold as the 4th comparator, the DC buck
The input signal of the output voltage of manostat and the predetermined reference voltage as the 3rd comparator, power supply signal is used as a D
The input signal of trigger, the inversion signal of the Q output signals of the rest-set flip-flop are believed as the clock of first d type flip flop
Number;
The output of the output signal, the Q output signals of first d type flip flop and the 3rd comparator of the 4th comparator
Signal phase with afterwards, with pulse frequency modulated after process and anti-phase process that rising edge signal is changed into rising pulses signal
Enable the clear terminal input signal of the output signal as the second d type flip flop of signal phase and, Xiang Yuhou, the pulse frequency modulated
Enable make when signal is enabled the DC buck manostat into pulse frequency modulated pattern, do not enable when make direct current drop
Die mould manostat enters PWM mode;
The Q output signals of second d type flip flop are changed into the place of rising pulses signal through anti-phase process, by rising edge signal
Signal phase is enabled with the pulse frequency modulated after reason, anti-phase process and the signal of Xiang Yuhou is used as first d type flip flop
Clear terminal input signal;
The output signal of the 4th comparator through anti-phase process, by rising edge signal change rising pulses signal process,
Enable with the pulse frequency modulated after anti-phase process the signal of signal phase and, Xiang Yuhou as second d type flip flop when
Clock signal, the power supply signal are the input signal of second d type flip flop.
13. methods according to claim 12, it is characterised in that the triangular-wave generator of the DC buck manostat
Triangular-wave generator enable signal start moment for enabling and the inductive element charge the timing synchronization for starting the step of it is logical
Lock unit realization is crossed, the lock unit includes:
3d flip-flop;
Input signal of the power supply signal as the 3d flip-flop;
Clock signal of the inversion signal of the Q output signals of the rest-set flip-flop as the 3d flip-flop;
The Q output signals of second d type flip flop are changed into the place of rising pulses signal through anti-phase process, by rising edge signal
Signal phase is enabled with the pulse frequency modulated after reason, anti-phase process and the signal of Xiang Yuhou is used as the 3d flip-flop
Clear terminal input signal;
The QN output signals of the 3d flip-flop enable signal as the triangular-wave generator.
14. methods according to claim 12 or 13, it is characterised in that the method also includes:
Average electric current under the PWM mode is sampled;
According to the average electric current and the comparative result and the DC buck manostat of default average current threshold that sample
Output voltage and the comparative result of the preset voltage value lower than the predetermined reference voltage, control to pass in and out pulse frequency modulated mould
Formula.
15. methods according to claim 14, it is characterised in that the average electric current that the foundation is sampled and default average
The output voltage of the comparative result of current threshold and the DC buck manostat is pre- with lower than the predetermined reference voltage
If the comparative result of magnitude of voltage, the step of passing in and out pulse frequency modulated pattern is controlled by the turnover control of pulse frequency modulated pattern
Unit processed realizing,
Pulse frequency modulated pattern turnover control unit include the 5th comparator, the 6th comparator, phase inverter and with door, its
In, the input signal of the average electric current that samples and default average current threshold as the 5th comparator, the direct current drop
The output voltage of die mould manostat and the preset voltage value lower than the predetermined reference voltage are used as the defeated of the 6th comparator
Enter signal, after the output signal of the 6th comparator is anti-phase with the output signal of the 5th comparator with obtain the arteries and veins
Rush frequency modulation(PFM) and enable signal.
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Address after: 100085 unit C, building C, lin66, Zhufang Road, Qinghe, Haidian District, Beijing Applicant after: Beijing Xiaomi pinecone Electronic Co.,Ltd. Address before: 100085 Beijing city Haidian District Qinghe Shun Yip things Park Building 3 unit A Applicant before: BEIJING PINECONE ELECTRONICS Co.,Ltd. |
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