CN106383726B - A kind of signal adapter upgrade method based on image/video coffret - Google Patents

A kind of signal adapter upgrade method based on image/video coffret Download PDF

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CN106383726B
CN106383726B CN201610763890.0A CN201610763890A CN106383726B CN 106383726 B CN106383726 B CN 106383726B CN 201610763890 A CN201610763890 A CN 201610763890A CN 106383726 B CN106383726 B CN 106383726B
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image
upgrading
upgrade
signal
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CN106383726A (en
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刘施
沈亚非
许恩
陈瑶
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Wuhan Jingce Electronic Group Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/65Updates
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/765Interface circuits between an apparatus for recording and another apparatus

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Abstract

The signal adapter upgrade method based on image/video coffret that the invention discloses a kind of, first shares the carry file in the file and PG where host computer at the middle and upper levels software;When host computer receives upgrade command, by the file where upgrade image file migration to upper layer software (applications);When PG receives upgrade command, upgrade image data are obtained from carry file, and cache arrangement is carried out to upgrade image data and generates data packet;PG sends signal adapter by image/video coffret for data packet by sending the module of image/video information, and signal adapter parses the data packet received, and module to be upgraded is written in the data parsed under enable signal control, completes upgrading;This method provided by the invention realizes the transmission of upgrading data by the hardware and channel of multiplexing PG and signal adapter, does not influence the other functions of system, has the beneficial effect for saving channel.

Description

A kind of signal adapter upgrade method based on image/video coffret
Technical field
The invention belongs to display module the field of test technology, are based on image/video coffret more particularly, to one kind Signal adapter upgrade method.
Background technique
With the development of LCD technology, display area is greater than the ultra high-definition 4K resolution ratio (3840 × 2160) of 50 English inch Large-sized display devices gradually popularize;The very large-sized display devices of high definition 8K resolution ratio (7680 × 4320) the also amount of beginning It produces.In order to reach the display performance of ultrahigh resolution, it is ensured that the reliability that uses simultaneously reduces manufacturing cost, display equipment mould group Manufacturer generallys use all kinds of image/video interfaces to receive picture signal.
In order to support the point screen of the various lane numbers of image/video coffret and split screen mode, need through PG (Pattern Generator, image signal generator) according to a several signal adapters of screen lane number collocation, PG is passed by its image/video Defeated interface sends out basic 4lane signal to each signal adapter, and signal adapter is according to company, image/video coffret institute The lane number and split screen mode of the point screen connect achieve the effect that input data signal progress permutation and combination required.In system reality In the application of border, physical equipment PG and signal adapter may be to be downloaded in complicated industrial environment using traditional JTAG Mode is updated program image inconvenient, and efficiency is lower.Application No. is CN201510035839.3, entitled it is based on Scheme disclosed in the patent of the more mirror image loading methods of the FPGA program of ARM, it is total by Serial Peripheral Interface (SPI) using arm processor FPGA (Field-Programmable Gate Array, field programmable gate array) file of packing is written line by computer Flash memory;The storage address and corresponding external bus of quasi- load document is written when upgrading from arm processor to external bus interface The register address of interface, from required file is loaded in flash memory into the random access memory of fpga chip, realization powers on automatic Operation and power-off are not lost;But the program is still to be carried out data transmission using external bus, is still limited by complex industrial ring Remote physical connection in border.
Summary of the invention
Aiming at the above defects or improvement requirements of the prior art, the present invention provides one kind to be based on image/video coffret Signal adapter upgrade method, its object is in existing display module test macro be based on image signal generator realize To the remote upgrade of signal adapter.
To achieve the above object, according to one aspect of the present invention, it provides a kind of based on image/video coffret Signal adapter upgrade method, includes the following steps:
(1) by the file where the carry upper layer software (applications) in the operating system of image signal generator, by host computer The file where software is shared with the carry file in image signal generator at the middle and upper levels;
(2) when host computer receives upgrade command, by the file where upgrade image file migration to upper layer software (applications);
(3) upgrading data are obtained from above-mentioned carry file using image signal generator and cached, and to the liter of caching Grade data carry out arrangement and generate data packet;
(4) above-mentioned data packet is passed by image/video by the image/video information sending module of image signal generator Defeated interface is sent to signal adapter;
(5) above-mentioned data packet is parsed using signal adapter, obtains upgrading enable signal and upgrade image data, And by the upgrade image data buffer storage;
(6) according to upgrading enable signal, the upgrade image data of external memory unit will be stored according to Active Serial mode is loaded into field programmable gate array to be upgraded, completes signal adapter upgrade.
Preferably, the above-mentioned signal adapter upgrade method based on image/video coffret, further includes to upgrade image The step of file formats, the binary system bin file that conversion is generated is as upgrade image file.
Preferably, the above-mentioned signal adapter upgrade method based on image/video coffret, step (1) include as follows Sub-step:
(1.1) when host computer receives the initialization command of user, image signal hair is sent by the initialization command The processor of raw device;
(1.2) processor is according to the initialization command, in the system of described image signal generator on carry File where layer software, realizes the carry file of the host computer file where software and image signal generator at the middle and upper levels It is shared.
Preferably, the above-mentioned signal adapter upgrade method based on image/video coffret, step (3) include as follows Sub-step:
(3.1) image signal generator obtains upgrading data from the carry file, passes through image signal generator The upgrading data are sent to the field programmable gate array of image signal generator by processor, and to the field-programmable The register of gate array is configured;Address configuration including upgrading size configuration, the quasi- storage of upgrading data of data;
(3.2) field programmable gate array caches received grade data, and arranges the upgrading data of caching Column-generation data packet.
Preferably, the above-mentioned signal adapter upgrade method based on image/video coffret, step (6) include as follows Sub-step:
(6.1) it when receiving upgrading enable signal, whole to external memory unit or is wiped using sector;
(6.2) when the instruction for receiving erasure completion, under chip selection signal control, according to clock signal by external storage list Field programmable gate array to be upgraded is written in the upgrade image data of member, completes signal adapter upgrade.
Preferably, the above-mentioned signal adapter upgrade method based on image/video coffret, upgrade data in include Version information;Current version information can be obtained by host computer after completing upgrading, so as to the management and retrospect of FileVersion.
Preferably, utensil occurs for the above-mentioned signal adapter upgrade method based on image/video coffret, image signal There are multiple signal adaptor interfaces, support multiple signal adapters while upgrading;By in image signal generator physical interface The upper multiple signal adapters of connection are realized the signal adapter connected to image signal generator while upgraded.
Preferably, the above-mentioned signal adapter upgrade method based on image/video coffret, to upgrading data according to such as Lower combination of protocols generates the data packet of 30 bits;
0th~7 bit is the data of upgrade image;
8th bit is upgrading data enable signal;
Register address and data-signal when the transmission upgrading of the 9th bit indication;
Register address information when 10th~17 bit refers to upgrading;
The constant transmission preset data of 18th~19 bit, recipient ignore the two bits;
Register data information when 20th~27 bit indication upgrades;
The constant transmission preset data of 28th~29 bit, recipient ignore the two bits.
Preferably, the above-mentioned signal adapter upgrade method based on image/video coffret, in escalation process, if rising FPGA to be upgraded, then is restored to the mirror of a upper version by grade failure by signal adapter according to the upgrading data of last revision Picture;The normal use of system is not influenced.
The above-mentioned signal adapter upgrade method based on image/video coffret provided through the invention, user only need Will by the upper layer software (applications) in host computer by upgrade image file migration into PG, by PG by image/video coffret will rise Grade file is sent in signal adapter, completes new configuration upgrading by the FPGA in signal adapter.
In general, through the invention it is contemplated above technical scheme is compared with the prior art, can obtain down and show Beneficial effect:
(1) the signal adapter upgrade method provided by the invention based on image/video coffret, in mould group point screen system In system, in the case where not changed to hardware device, it can be realized by host computer to the signal adapter for physically having distance FPGA remote upgrade mirror image, do not need to increase additional hardware resource;
When signal adapter is in industrial environment, and program image needs to upgrade update, can be incited somebody to action by host computer The program image file remote upgrade of the signal adapter in host computer is stored in into signal adapter, not will receive long-range object Manage the limitation of connecting line;And version number can be traced in real time, realize quick upgrading and management to image file;
(2) the signal adapter upgrade method provided by the invention based on image/video coffret, it is existing by being multiplexed PG and signal adapter between be used for transmission the image/video coffret of image/video, realize the transmission of upgrading data, not shadow The other functions of acoustic system have the beneficial effect for saving channel;
(3) the signal adapter upgrade method provided by the invention based on image/video coffret, can pass through FPGA core Piece realizes, has the characteristics that be easy to seamless compatible system other function, at low cost, easy to operate, reliable and stable.
Detailed description of the invention
Fig. 1 is the flow chart for the signal adapter upgrade method based on image/video coffret that embodiment provides;
Fig. 2 is the detailed process based on FPGA Yu the signal adapter upgrade method of V-BY-ONE interface that embodiment provides Schematic diagram;
Fig. 3 is that upgrading data, file size, the sequential schematic of initial address message (IAM) are sent in embodiment.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and It is not used in the restriction present invention.As long as in addition, technical characteristic involved in the various embodiments of the present invention described below Not constituting a conflict with each other can be combined with each other.
The signal adapter upgrade method based on FPGA Yu V-BY-ONE interface that embodiment provides, process such as Fig. 1 institute Show, specifically comprises the following steps:
(1) by the file where the carry upper layer software (applications) in the operating system of PG, by host computer software institute at the middle and upper levels File and PG in carry file shared;
(2) when host computer receives upgrading signal adapter fpga image command entry, by upgrade image file migration to upper layer In file where software;When the arm processor of PG receives upgrading signal adapter fpga image command entry, then from carry text Upgrade image data are read in part;
(3) by the arm processor of PG by upgrade image data distributing to the FPGA in PG;Synchronously, pass through the ARM of PG Processor configures the register of FPGA, configures the size of upgrade image data, and the address of the quasi- storage of upgrading data;
(4) when PG receives the upgrade image data, upgrade image data are cached, and to upgrade image data Arrangement group packet is carried out, data packet is generated;
(5) PG is sent the data packet to by image/video coffret by sending the module of image/video information The FPGA of signal adapter;
Wherein, image/video coffret includes but is not limited to LVDS, DP, MIPI or V-BY-ONE interface;
(6) when the FPGA in signal adapter receives above-mentioned data packet, according to the resolve packet, upgrading enables letter out Number, initial signal, file size signal, flash starting address signal, upgrade image data;
(7) signal is loaded into according to the upgrade image data that the upgrading enable signal will be stored in external memory unit to fit In orchestration FPGA to be upgraded, signal adapter upgrade is completed.
Fig. 2 is the detailed process based on FPGA Yu the signal adapter upgrade method of V-BY-ONE interface that embodiment provides Operation chart;Below in conjunction with Fig. 2, it is to carry out remote upgrade to the distal end signal adapter in complex industrial environment Example, is specifically described the signal adapter upgrade method of embodiment offer, and process specifically comprises the following steps:
(1) upgrade image file is converted into work by Altera Quartus ii Convert Programming File Tool generates rpd file;Then rpd file is converted to binary system bin file;
(2) after hardware device powers on, by upper layer software (applications) by initialization command item with udp protocol format according in such as Fig. 2 Path shown in dotted arrow 1~2 is sent to the arm processor of PG by cable;When the arm processor of PG receives initialization command Afterwards, the file in the Linux system according to path shown in dotted arrow 3 in Fig. 2 in PG in carry upper layer software (applications), by This, the carry file in the file and PG where software is in shared state to PC at the middle and upper levels;
(3) when user issues upgrading signal adapter fpga image command entry, the then upgrading that will be stored in computer hard disc Image file is sent under the file in upper layer software (applications), and upgrade image file is flowed to as shown in 11 direction of block arrow in Fig. 2;Together When will upgrading signal adapter fpga image command entry according to path shown in dotted arrow 4,5,6 in Fig. 2 by udp protocol and Cable is dealt into the arm processor in PG;When the arm processor of PG receives the upgrading signal adapter fpga image command entry, press Upgrading data are obtained from carry file according to the direction of block arrow 12 in Fig. 2;
(4) upgrading data are handed down to the FPGA in PG by arm processor according to the direction of block arrow 13 in Fig. 2 in PG;Together When, which configures FPGA register to be upgraded, the size of configuration upgrading data, quasi- to be stored in DDR Address;
(5) after the FPGA in PG receives upgrading data, first being cached in upgrading data deposit DDR, then to upgrading mirror As data and information generate according to protocol groups packet the data packet of a 30bit;In embodiment, protocol conventions are as follows:
[7:0] bit includes the data of upgrade image;
[8] bit indicates upgrading data enable signal;
[9] register address and data-signal in bit instruction [17:10] and [27:20] when transmission upgrading;
[17:10] bit indicates register address information when upgrading;
The constant hair 2'b00 of [19:18] bit, recipient ignore the two bit;
[27:20] bit indicates register data information when upgrading;
As [17:10] bit=8'ha7,8'ha8, the data of [27:20] bit are 8'haa, and when 8'h55, instruction is risen Grade will start;When the data on [17:10] bit=8'ha7,8'ha8, [27:20] bit are 8'ha5, when 8'h5a, indicate Upgrading data close to an end;
As [17:10] bit=8'h9f, 8'ha0,8'ha1,8'ha2, the data of [27:20] bit are upgrading The size of mirror image data, total bit wide are 32bit;
As [17:10] bit=8'ha3,8'ha4,8'ha5,8'ha6, the data of bit are to rise on [27:20] Class mirror-image data will be stored in the initial address of flash, and total bit wide is 32bit;
The constant hair 2'b00 of [29:28] bit, recipient ignore the two bit;In embodiment, the data packet root of generation It is sent according to sequence shown in Fig. 3;
(6) FPGA in PG sends data packet for sending the module of image/video information by multiplexing, and passes through V-BY- Data packet is transferred to the end FPGA of signal adapter by ONE interface;
(7) FPGA in signal adapter is received after the upgrade image information of V-BY-ONE format according to arrow thick in Fig. 2 The upgrading data resolution module that signal adapter is sent into direction shown in first 14 is parsed according to agreement, obtains the enabled letter of upgrading Number, initial signal, file size signal, flash starting address signal, upgrade image data-signal;
In the present embodiment, enable signal is sent to the ddr3_top module in FGPA, and initial signal is sent to ddr3_top With rsu_factory module, file size signal, flash starting address signal are sent to rsu_factory module;Upgrade mirror As data-signal is then sent to ddr3_top module, as shown in the block arrow 15 in Fig. 2;It is sent to the upgrading of ddr3_top module Mirror image data then passes through internal logic ddr_writeddr_arbitration module and is written in external physics DDR, such as Fig. 2 In block arrow 16 shown in;
(8) when rsu_factory module receives upgrading enable signal, according to upgrading enable signal to external memory EPCQ256 is whole or used sector carries out erasing operation;After EPCQ256 erasure completion, by rsu_factory module Erase_done signal and update_wr_en signal are issued to ddr3_top module;Ddr3_top module receives these and refers to After showing information, confirmation is now to start to write upgrade image data toward EPCQ256 chip, then passes through internal ddr_read, ddr_ Upgrading data in DDR are sent to rsu_factory module by arbitration module, as shown in block arrow 17 in Fig. 2;
(9) when rsu_factory module receives upgrading data, elder generation is cached to upgrading data in internal fifo, recycles Internal logic controls this ip core of Altasmi_parallea Megafunction, and upgrading data are written to outside by the ip core In portion memory EPCQ256;FPGA uses Active Serial mode loading upgrading data from EPCQ256, completes long-range mirror As upgrading;As shown in block arrow 18 in Fig. 2.
Due to including version information in upgrading data, current mirror image can be got by upper layer software (applications) after the completion of upgrading The version number of file, so as to the management and retrospect of version;On the other hand, during image upgrade, if Remote Switched Port Analyzer upgrading is lost It loses, then FPGA to be upgraded is restored to the mirror image of a upper version by signal adapter according to the mirror image data of last revision, no It will affect the normal use of system.
In embodiment, signal adapter that the arm processor in PG supports it to be connected while updating operation is carried out;If needing To upgrade multiple signal adapters simultaneously, then can be realized by connecting multiple signal adapters on physical hardware.
As it will be easily appreciated by one skilled in the art that the foregoing is merely illustrative of the preferred embodiments of the present invention, not to The limitation present invention, any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should all include Within protection scope of the present invention.

Claims (10)

1. a kind of signal adapter upgrade method based on image/video coffret, which comprises the steps of:
(1) file where host computer at the middle and upper levels software is shared with the carry file in image signal generator;
(2) by the file where upgrade image file migration to the upper layer software (applications);
(3) upgrading data are obtained from the carry file using image signal generator and cached, and to the ascending series of caching Data packet is generated according to arrangement is carried out;
(4) data packet is connect by image/video transmission by the image/video information sending module of image signal generator Mouth is sent to signal adapter;
(5) data packet is parsed using signal adapter, obtains upgrading enable signal and upgrade image data;By institute State upgrade image data deposit external memory unit;
(6) to be upgraded show is loaded into according to the upgrade image data that the upgrading enable signal will be stored in external memory unit Field programmable gate array completes signal adapter upgrade.
2. signal adapter upgrade method as described in claim 1, which is characterized in that further include being carried out to upgrade image file The step of format is converted, the binary system bin file that conversion is generated is as upgrade image file.
3. signal adapter upgrade method as claimed in claim 1 or 2, which is characterized in that the step (1) includes following son Step:
(1.1) when host computer receives the initialization command of user, image signal generator is sent by the initialization command Processor;
(1.2) processor is according to the initialization command, and carry upper layer is soft in the system of described image signal generator File where part realizes that the file where software and the carry file of image signal generator are total to host computer at the middle and upper levels It enjoys.
4. signal adapter upgrade method as claimed in claim 1 or 2, which is characterized in that the step (3) includes following son Step:
(3.1) image signal generator obtains upgrading data from the carry file, passes through the processing of image signal generator The upgrading data are sent to the field programmable gate array of image signal generator by device, and to the field-programmable gate array The register of column is configured;Address configuration including upgrading size configuration, the quasi- storage of upgrading data of data;
(3.2) field programmable gate array caches received grade data, and arranges the upgrading data of caching Column-generation data packet.
5. signal adapter upgrade method as claimed in claim 1 or 2, which is characterized in that the step (6) includes following son Step:
(6.1) it when receiving upgrading enable signal, whole to external memory unit or is wiped using sector;
(6.2) when the instruction for receiving erasure completion, under chip selection signal control, according to clock signal by external memory unit Field programmable gate array to be upgraded is written in upgrade image data, completes signal adapter upgrade.
6. signal adapter upgrade method as claimed in claim 1 or 2, which is characterized in that include version in the upgrading data This information is completed to obtain current version information by host computer after upgrading, so as to the management and retrospect of FileVersion.
7. signal adapter upgrade method as claimed in claim 1 or 2, which is characterized in that described image signal generator Processor has multiple signal adaptor interfaces;By connecting multiple signal adaptations on the physical interface of image signal generator Device is realized multiple signal adapters that image signal generator is connected while being upgraded.
8. signal adapter upgrade method as claimed in claim 4, which is characterized in that in the step (3.2), to caching Upgrade data and arranges the data packet for generating 30 bits according to following agreement;
0th~7 bit is the data of upgrade image;
8th bit is upgrading data enable signal;
Register address and data-signal when the transmission upgrading of the 9th bit indication;
Register address information when 10th~17 bit is upgrading;
The constant transmission preset data of 18th~19 bit, recipient ignore the two bits;
Register data information when 20th~27 bit indication upgrades;
The constant transmission preset data of 28th~29 bit, recipient ignore the two bits.
9. signal adapter upgrade method as claimed in claim 8, which is characterized in that in the data packet,
When [17:10] bit data is 8'ha7,8'ha8, [27:20] bit data is 8'haa, and when 8'h55, instruction upgrading is opened Begin;
When [17:10] bit data is 8'ha7,8'ha8, [27:20] bit data is 8'ha5, when 8'h5a, indicates ascending series According to end;
When [17:10] bit data is 8'h9f, 8'ha0,8'ha1, when 8'ha2, the data of [27:20] bit are upgrading mirror As the size of data;
When [17:10] bit data is 8'ha3,8'ha4,8'ha5, when 8'ha6, the data of [27:20] bit are upgrading mirror As the initial address of the quasi- deposit flash of data.
10. signal adapter upgrade method as claimed in claim 1 or 2, which is characterized in that in escalation process, if remotely FPGA to be upgraded, then is restored to the mirror of a upper version by upgrading failure by signal adapter according to the mirror image data of last revision Picture.
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CN107957876A (en) * 2017-11-27 2018-04-24 马瑞利汽车电子(广州)有限公司 A kind of method of upgrading automobile instrument UI and firmware program
CN109783119B (en) * 2018-12-07 2022-01-28 上海七印信息科技有限公司 Data multi-version compatible upgrade management system and management method thereof
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Address after: 430070 Hubei City, Hongshan Province, South Lake Road, No. 53, Hongshan Venture Center, building on the four floor, No.

Applicant after: Wuhan fine test electronics group Limited by Share Ltd

Address before: 430070 Hubei City, Hongshan Province, South Lake Road, No. 53, Hongshan Venture Center, building on the four floor, No.

Applicant before: Wuhan Jingce Electronic Technology Co., Ltd.

GR01 Patent grant
GR01 Patent grant