CN106372014A - Implementation method for converting PCIE (Peripheral Component Interface Express) bus into CPCI (Compact Peripheral Component Interconnect) bus - Google Patents
Implementation method for converting PCIE (Peripheral Component Interface Express) bus into CPCI (Compact Peripheral Component Interconnect) bus Download PDFInfo
- Publication number
- CN106372014A CN106372014A CN201610721804.XA CN201610721804A CN106372014A CN 106372014 A CN106372014 A CN 106372014A CN 201610721804 A CN201610721804 A CN 201610721804A CN 106372014 A CN106372014 A CN 106372014A
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- China
- Prior art keywords
- bus
- pcie
- cpci
- implementation method
- peripheral component
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/38—Universal adapter
- G06F2213/3852—Converter between protocols
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
- Communication Control (AREA)
Abstract
The invention relates to an implementation method of bus conversion, in particular to an implementation method for converting a PCIE (Peripheral Component Interface Express) bus into a CPCI (Compact Peripheral Component Interconnect) bus. A circuit in the implementation method comprises a PCIE bus interface, a protocol conversion circuit and a CPCI bus interface, wherein the PCIE bus interface is connected with the protocol conversion circuit, and the protocol conversion circuit is connected with the CPCI bus interface. The specific conversion function of the implementation method is mainly finished by the protocol conversion circuit, and the implementation method has the characteristics of high integration degree, high maneuverability and high stability.
Description
Technical field
The present invention relates to a kind of implementation method of general line system, specially a kind of realization of pcie general line system cpci bus
Method.
Background technology
Cpci bus is a kind of synchronous 32 independent of processor or 64 local bus, is parallel communication busses,
Maximum operating frequency be 33mhz, peak velocity when 32 be 132mb/s, when 64 be 264mb/s, bus specification by
Pcisig issues.It is exactly that it belongs to serial communication bus that pcie bus is different from the maximum feature of cpci bus.In operation principle
On, the two does not have any similarity, and pcie bus adopts serial mode transmission data, relies on altofrequency to obtain high property
Can, because serial transmission does not have interference, bus frequency lifting is unobstructed, and therefore pcie bus speed has reached 2.5g.Mesh
Before have many boards to remain unchanged to apply cpci bus to be communicated, cpci bus is still being widely used, but increasing locates
Manage the no longer integrated cpci bus of development with technology for the device, based on pcie bus to the absolute advantagess of cpci bus it is necessary to set
Count out the equipment of pcie general line system cpci bus.
Content of the invention
For the deficiencies in the prior art, the present invention provides a kind of implementation method of pcie general line system cpci bus, and this is real
Existing method realizes simple, stable performance, strong applicability.
The technical solution that the present invention solves described technical problem is: a kind of realization of pcie general line system cpci bus
Method, implementation method circuit includes pcie EBI, protocol conversion circuitry and cpci EBI；Described pcie bus connects
Mouth is connected with protocol conversion circuitry, and described protocol conversion circuitry is connected with cpci EBI.
The invention has the beneficial effects as follows, compared with prior art, the concrete translation function of the present invention is mainly by agreement for the application
Change-over circuit completing, has that integrated level is high, workable, the feature of implementation method high stability.
Brief description
Fig. 1 is the implementation method catenation principle block diagram of pcie general line system cpci bus of the present invention.
In figure 1.pcpi EBI, 2. protocol conversion circuitry, 3.cpci EBI.
Specific embodiment
With reference to embodiment and its accompanying drawing, the present invention is described in more detail.
Referring to the drawings, the implementation method of a kind of pcie of present invention general line system pci bus, implementation method circuit includes
Pcie EBI 1, protocol conversion circuitry 2 and cpci EBI 3；Described pcie EBI 1 is with protocol conversion circuitry 2 even
Connect, described protocol conversion circuitry 2 is connected with cpci EBI 3.
The pcie EBI 1 of implementation method of the present invention is used for accessing user's self-defining pcie defining interface, and pcie is total
The data that line interface is used for the instruction of transmission data control command and is uploaded cpci bus by pcie bus.
The protocol conversion circuitry 2 of implementation method of the present invention is used for connecting pcie bus and cpci bus, and it is total to complete pcie
Wire protocol is to the conversion of cpci bus protocol.
Pcie bus passes through protocol conversion circuitry, specifically the pi7c9x110 chip of plx company can be adopted to be accomplished to cpci total
The protocol conversion of line, realizes pcie equipment to the interconnected communication problem of pci equipment.
The operation principle of implementation method of the present invention and process are: pcie EBI connects pcie bus apparatus first, this
In pcie as the main equipment of cpci bus, for receiving order or the data of higher level's bus, be converted in pi7c9x110
Cpci bus can accept data and order, is so achieved that the conversion of the cpci bus of standard.Meanwhile, due to
9x110 be two-way bridging chip, simultaneously can achieve pci based on, pcie be from bus communication.
Above example is only the implementation method concrete application example to pcie general line system cpci bus of the present invention, not
Limit the application claim.In every claim technical scheme in the application, the modification carrying out and non-intrinsically safe are improved, all
Within the application claims.
The present invention does not address part and is applied to prior art.
Claims (2)
1. a kind of implementation method of pcie general line system cpci bus it is characterised in that implementation method circuit to include pcie total
Line interface, protocol conversion circuitry and cpci EBI；Described pcie EBI is connected with protocol conversion circuitry, described agreement
Change-over circuit is connected with cpci EBI.
2. the implementation method of pcie general line system cpci bus according to claim 1 is it is characterised in that protocol conversion is electric
Road completes pcie bus to the protocol conversion of cpci bus using pi7c9x110 chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610721804.XA CN106372014A (en) | 2016-08-25 | 2016-08-25 | Implementation method for converting PCIE (Peripheral Component Interface Express) bus into CPCI (Compact Peripheral Component Interconnect) bus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610721804.XA CN106372014A (en) | 2016-08-25 | 2016-08-25 | Implementation method for converting PCIE (Peripheral Component Interface Express) bus into CPCI (Compact Peripheral Component Interconnect) bus |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106372014A true CN106372014A (en) | 2017-02-01 |
Family
ID=57879101
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610721804.XA Pending CN106372014A (en) | 2016-08-25 | 2016-08-25 | Implementation method for converting PCIE (Peripheral Component Interface Express) bus into CPCI (Compact Peripheral Component Interconnect) bus |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106372014A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107294996A (en) * | 2017-07-07 | 2017-10-24 | 中车青岛四方车辆研究所有限公司 | Protocol converter and conversion method |
| CN110737624A (en) * | 2019-09-23 | 2020-01-31 | 天津市英贝特航天科技有限公司 | circuit for realizing PCIE bus switching peripheral mounting |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103034602A (en) * | 2012-12-06 | 2013-04-10 | 华为技术有限公司 | Content searching chip based on interconnecting bus of periphery part and system |
| US8756360B1 (en) * | 2011-09-26 | 2014-06-17 | Agilent Technologies, Inc. | PCI-E compatible chassis having multi-host capability |
| CN104077200A (en) * | 2014-06-27 | 2014-10-01 | 北京计算机技术及应用研究所 | Individual testing device for CPCI (Compact Peripheral Component Interconnect) module separated from main engine |
| CN204719627U (en) * | 2015-07-07 | 2015-10-21 | 济南腾越电子有限公司 | A kind of ruggedized computer mainboard |
| CN204856343U (en) * | 2015-08-31 | 2015-12-09 | 北京世纪晨数据技术有限责任公司 | CPCIPXI system board substitute means |
| CN105320631A (en) * | 2014-11-25 | 2016-02-10 | 天津市英贝特航天科技有限公司 | Converter for converting computer interface to CPCI (Compact Peripheral Component Interconnect) interface |
-
2016
- 2016-08-25 CN CN201610721804.XA patent/CN106372014A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8756360B1 (en) * | 2011-09-26 | 2014-06-17 | Agilent Technologies, Inc. | PCI-E compatible chassis having multi-host capability |
| CN103034602A (en) * | 2012-12-06 | 2013-04-10 | 华为技术有限公司 | Content searching chip based on interconnecting bus of periphery part and system |
| CN104077200A (en) * | 2014-06-27 | 2014-10-01 | 北京计算机技术及应用研究所 | Individual testing device for CPCI (Compact Peripheral Component Interconnect) module separated from main engine |
| CN105320631A (en) * | 2014-11-25 | 2016-02-10 | 天津市英贝特航天科技有限公司 | Converter for converting computer interface to CPCI (Compact Peripheral Component Interconnect) interface |
| CN204719627U (en) * | 2015-07-07 | 2015-10-21 | 济南腾越电子有限公司 | A kind of ruggedized computer mainboard |
| CN204856343U (en) * | 2015-08-31 | 2015-12-09 | 北京世纪晨数据技术有限责任公司 | CPCIPXI system board substitute means |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107294996A (en) * | 2017-07-07 | 2017-10-24 | 中车青岛四方车辆研究所有限公司 | Protocol converter and conversion method |
| CN110737624A (en) * | 2019-09-23 | 2020-01-31 | 天津市英贝特航天科技有限公司 | circuit for realizing PCIE bus switching peripheral mounting |
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| PB01 | Publication | ||
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| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
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Application publication date: 20170201 |