CN106354683B - Micro-control device and input/output system applied to micro-control device - Google Patents

Micro-control device and input/output system applied to micro-control device Download PDF

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CN106354683B
CN106354683B CN201610851985.8A CN201610851985A CN106354683B CN 106354683 B CN106354683 B CN 106354683B CN 201610851985 A CN201610851985 A CN 201610851985A CN 106354683 B CN106354683 B CN 106354683B
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interface
data
input
output
programmable
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CN106354683A (en
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汪泳江
喻学艺
刘速
韩伟
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Xuanzhi Electronic Technology Shanghai Co ltd
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Xuanzhi Electronic Technology Shanghai Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0016Inter-integrated circuit (I2C)

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Abstract

The invention provides a micro control device and an input/output system applied to the micro control device, wherein the input/output system comprises an input/output interface and an interface management controller, and the interface management controller is coupled with a main processor and the input/output interface; the interface management controller is configured to convert the data transmission request into a customized interface controller corresponding to a specific interface protocol according to the data transmission request under the specific interface protocol so as to control the input/output interface to perform corresponding data transmission.

Description

Micro-control device and input/output system applied to micro-control device
Technical Field
The present invention relates to the field of integrated circuit technology, and more particularly, to a micro control device and an input/output system applied to the micro control device.
Background
An MCU (Micro Control Unit), also called SCM (Single Chip Microcomputer) or a Single Chip Microcomputer, integrates a CPU (Central Processing Unit), a RAM (Random Access Memory), a ROM (Read-Only Memory), a timer counter, and various I/O (Input/Output interface) of a computer on a Chip to form a Chip-level Micro Control device. On the basis of the hardware circuit, data to be processed, a calculation method, steps and operation commands are compiled into programs and stored in an MCU internal or external memory, and an MCU chip can be automatically and continuously taken out of the memory and executed during running.
With the advent and development of large scale integrated circuits, current MCU chips are built using advanced technology and powerful processor cores, and tend to integrate more and more functions than previous generations, as compared to more and more complex tasks that can be performed. Therefore, the number of I/O interfaces for data transmission from the main processor to the outside is larger and more crowded, the types become more diverse and complicated, the complexity and difficulty of chip design are increased, and the expectation of the user is often not completely satisfied, and additional functions other than the designed functions cannot be provided for the user.
Please refer to fig. 1, which is a schematic diagram of a conventional MCU chip in the prior art. As shown in fig. 1, the MCU chip includes: a substrate, a host processor 11 located on the substrate, an input/output Interface 13 located on the periphery of the substrate, and an Interface function module 12 located between the host processor 11 and the input/output Interface 13 and surrounding the host processor 11, wherein the Interface function module 12 has various types, such as a UART (Universal Asynchronous Receiver/Transmitter) Interface function module, an I2C (Inter-Integrated Circuit) Interface function module, an SPI (Serial Peripheral Interface) Interface function module, a QEP (quantum Encoder Pulse) Interface function module, an ECAP Interface function module, and the like, and the number of the Interface function modules is different (one or more may be used, and the plurality of the Interface function modules may be arranged differently according to actual requirements). The interface function module 12 is coupled to an external input/output interface 13 through an interface multiplexer or a crossbar structure 14, so as to implement an interface function corresponding to the interface function module 12. In the prior art, the coupling relationship between the interface function module 12 and the input/output interface 13 is realized by the interface multiplexer or the crossbar 14, which increases the complexity of the circuit and the difficulty of chip design, and due to the process technology (e.g. chip size and integration process) and market considerations (e.g. cost or customer group), the coupling relationship between the interface function module 12 and the input/output interface 13 is fixed, and the input/output interface 13 is limited by the function designed by the interface function module 12 coupled thereto, i.e. the input/output interface 13 can only provide the function of the interface function module 12 coupled thereto with a specific function, and cannot make other changes.
In one situation, the targeted user may only need some functional input/output interfaces in the MCU chip and may not all need all functional input/output interfaces in the MCU chip, which leads to idle waste of some functional input/output interfaces and increases the manufacturing cost of the MCU chip; in another case, the formed MCU chip is not easily expandable, i.e. it is not possible to add a new functional interface module 12 or to change the interface multiplexer or cross-bar switch matrix structure 14 to establish a coupling relationship between the new interface module 12 and the input/output interface 13.
Disclosure of Invention
The invention provides a micro control device and an input/output system applied to the micro control device, which are used for solving the problems that the circuit structure in the MCU chip structure is complex, the functions of input/output interfaces are solidified and cannot be adjusted and the like in the prior art.
To achieve the above and other objects, the present invention provides an input/output system applied to a micro control device including a main processor, the input/output system including:
an input/output interface; and
an interface management controller coupled to the main processor and the input/output interface; the interface management controller is configured to convert the data transmission request into a customized interface controller corresponding to a specific interface protocol according to the data transmission request under the specific interface protocol so as to control the input/output interface to perform corresponding data transmission.
In some embodiments, the interface management controller is configured to convert, according to a data transmission request under a specific interface protocol, into a customized interface controller corresponding to the specific interface protocol to control the input/output interface to perform a corresponding data transmission, including:
the interface management controller is configured to convert the data output request under a specific interface protocol initiated by the main processor into a customized interface controller corresponding to the specific interface protocol so as to control the input/output interface to output the data in the data output request; or
The interface management controller is configured to be converted into a customized interface controller corresponding to a specific interface protocol according to an external data input request under the specific interface protocol so as to control the input/output interface to receive data corresponding to the external data input request.
In some embodiments, the interface management controller comprises: a data input register unit coupled to the input/output interface and configured to store data input information of the input/output interface; a data output register unit coupled to the input/output interface and configured to store data output information of the input/output interface.
In some embodiments, the interface management controller further comprises: a programmable interface engine coupled to the host processor, the data input registration unit, and the data output registration unit; the programmable interface engine is configured to execute interface programming information corresponding to a data output request initiated by the main processor according to the data output request under a specific interface protocol so as to be programmed into a customized interface engine; or, the programmable interface engine is configured to execute interface programming information corresponding to the external data input request according to the external data input request through the input register unit and to be programmed into a customized interface engine.
In some embodiments, the interface management controller further comprises:
a data control unit coupled to the programmable interface engine and the data input and output register units;
the data control unit is configured to receive a data input control instruction of the programmable interface engine to control the data input register unit to input data through the coupled input/output interface; or, the data control unit is configured to receive a data output control instruction of the programmable interface engine to control the data output register unit to output data through the coupled input/output interface.
In some embodiments, the interface management controller further comprises: a trigger logic unit located between and coupled to the data input register unit and the programmable interface engine; the trigger logic unit is configured to detect a data receiving action of the input/output interface coupled to the data input register unit through the data input register unit, and output a data trigger message to the programmable interface engine when detecting that the data receiving action exists at the input/output interface.
In some embodiments, the interface management controller further comprises: a storage unit coupled to the programmable interface engine and configured to store interface programming information.
In some embodiments, the memory unit is an electrically erasable programmable read only memory or a flash memory.
In some embodiments, the programmable interface engine is a programmable logic chip, an embedded control chip, or a custom chip.
The application also provides a micro-control device, which comprises a main processor and an input/output system, wherein the input/output system comprises an input/output interface and an interface management controller; the interface management controller is coupled to the main processor and the input/output interface; the interface management controller is configured to be converted into a customized interface controller corresponding to a specific interface protocol according to a data transmission request under the specific interface protocol so as to control the input/output interface to perform corresponding data transmission.
In some embodiments, the interface management controller is configured to convert, according to a data transmission request under a specific interface protocol, into a customized interface controller corresponding to the specific interface protocol to control the input/output interface to perform a corresponding data transmission, including:
the interface management controller is configured to convert the data output request under a specific interface protocol initiated by the main processor into a customized interface controller corresponding to the specific interface protocol so as to control the input/output interface to output the data in the data output request; or
The interface management controller is configured to be converted into a customized interface controller corresponding to a specific interface protocol according to an external data input request under the specific interface protocol so as to control the input/output interface to receive data corresponding to the external data input request.
In some embodiments, the interface management controller comprises: a data input register unit coupled to the input/output interface and configured to store data input information of the input/output interface; a data output register unit coupled to the input/output interface and configured to store data output information of the input/output interface.
In some embodiments, the interface management controller further comprises:
a programmable interface engine coupled to the host processor, the data input registration unit, and the data output registration unit;
the programmable interface engine is configured to execute interface programming information corresponding to a data output request initiated by the main processor according to the data output request under a specific interface protocol so as to be programmed into a customized interface engine; or, the programmable interface engine is configured to execute interface programming information corresponding to the external data input request according to the external data input request through the input register unit and to be programmed into a customized interface engine.
In some embodiments, the interface management controller further comprises:
a data control unit coupled to the programmable interface engine and the data input and output register units;
the data control unit is configured to receive a data input control instruction of the programmable interface engine to control the data input register unit to input data through the coupled input/output interface; or, the data control unit is configured to receive a data output control instruction of the programmable interface engine to control the data output register unit to output data through the coupled input/output interface.
In some embodiments, the interface management controller further comprises: a trigger logic unit located between and coupled to the data input register unit and the programmable interface engine; the trigger logic unit is configured to detect a data receiving action of the input/output interface coupled to the data input register unit through the data input register unit, and output a data trigger message to the programmable interface engine when detecting that the data receiving action exists at the input/output interface.
In some embodiments, the interface management controller further comprises: a storage unit coupled to the programmable interface engine and configured to store interface programming information.
In some embodiments, the memory unit is an electrically erasable programmable read only memory or a flash memory.
In some embodiments, the programmable interface engine is a programmable logic chip, an embedded control chip, or a custom chip.
As described above, the micro-controller and the input/output system applied to the micro-controller of the present application are a variable input/output system, and have an input/output interface and an interface management controller, the interface management controller is coupled to the main processor and the input/output interface, and can adaptively convert to a specific interface controller according to a specific interface protocol in a data transmission request in actual application, so as to complete corresponding data input/output.
Drawings
Fig. 1 is a schematic diagram of a conventional MCU chip in the prior art.
Fig. 2 is a block diagram of a micro-controller according to the present invention.
Fig. 3 is a block diagram of an implementation of fig. 2 in an embodiment.
Fig. 4 is a block diagram of an implementation of fig. 2 in another embodiment.
Fig. 5 is a block diagram of an implementation of fig. 2 in yet another embodiment.
Fig. 6 is a block diagram of an implementation of fig. 2 in yet another embodiment.
Fig. 7 is a block diagram of an implementation of fig. 2 in yet another embodiment.
Detailed Description
The following description of the embodiments of the present application is provided by way of specific examples, and other advantages and effects of the present application will be readily apparent to those skilled in the art from the disclosure herein. The present application is capable of other and different embodiments and its several details are capable of modifications and/or changes in various respects, all without departing from the spirit of the present application.
It should be noted that the structures, ratios, sizes, and the like shown in the drawings attached to the present specification are only used for matching the disclosure of the specification, so as to be understood and read by those skilled in the art, and are not used to limit the conditions that the present application can be implemented, so that the present application has no technical essence, and any structural modification, ratio relationship change, or size adjustment should still fall within the scope of the disclosure of the present application without affecting the efficacy and the achievable purpose of the present application.
In addition, the terms "upper", "lower", "middle" and "one" used in the present specification are for clarity of description, and are not intended to limit the scope of the present application, and the relative relationship between the terms and the relative terms may be changed or adjusted without substantial technical change.
In view of the deficiency that the input/output interface function in the MCU chip of the prior art is fixed and cannot be changed, the present application mainly aims to provide a new variable input/output system and a micro control device configured with the same, through which the function types of the respective input/output interfaces do not need to be defined and fixed in advance, but can be adaptively converted into a specially-made input/output interface architecture matched with the data according to the actual state of the data input/output, thereby realizing real change from need to need.
Referring to fig. 2, a block diagram of a micro-controller according to an embodiment of the present invention is shown. In this embodiment, the Micro Control device is described by taking an MCU chip as an example, and an MCU (Micro Control Unit) integrates a CPU, a memory (RAM and/or rom), a timing counter, and various input/output interfaces I/O on one chip to form a chip-level Micro Control device, thereby implementing different controls for different application scenarios.
As shown in fig. 2, the micro control device of the present application includes: a main processor 20 and an input/output system 22.
The host processor 20 is located in the central region of the substrate. In practical applications, a main processor is a Central Processing Unit (CPU), and is generally an IP Core (Intellectual Property Core), and the IP Core is a reusable module provided by a certain party and in the form of a logic unit on a chip design. The CPU is an operation and control core in the MCU chip and can execute code programs and the like compiled by software, so that the aim of controlling each part in the MCU chip to run reasonably is fulfilled.
The input/output system 22 is a variable input/output system, coupled to the main processor 20, and capable of adaptively converting according to data transmission characteristics in a data input/output request in practical applications to implement an input/output function matching data to be transmitted, thereby performing data input/output.
In a specific implementation, the input/output system 22 further includes: an input/output interface 21 and an interface management controller 23.
The input/output ports 21 are numerous and arranged on the periphery of the substrate. In the present embodiment, the input/output characteristics of the input/output interface 21 are predefined but the transmission mode is undefined, and specifically, for any one of the input/output interfaces 21, the input/output interface 21 is bidirectional, and sometimes operates in an output state, sometimes operates in an input state, and sometimes operates in both the output state and the input state.
Interface management controller 23 is located between host processor 20 and input/output interface 21 and is coupled to host processor 20 and input/output interface 21. The interface management controller 23 can convert the data transmission request under the specific interface protocol into a customized interface controller corresponding to the specific interface protocol to control the input/output interface to perform corresponding data transmission.
In this embodiment, the interface management controller 23 is specifically configured to: 1. according to a data output request initiated by the main processor 20 under a specific interface protocol, converting the data into a customized interface controller to control the input/output interface 21 to output data corresponding to the data output request; 2. according to an external data input request under a specific interface protocol, converting the external data input request into a customized interface controller corresponding to the specific interface protocol so as to control the input/output interface to receive data corresponding to the external data input request. Due to the interface management controller 23, each input/output interface 21 can be converted into a flexible input/output interface supporting a specific interface protocol in the data transmission request to realize data transmission in a new data transmission mode.
The micro control device comprises a main processor and an input/output system, wherein the input/output system is a variable input/output system and is provided with an input/output interface and an interface management controller, and the interface management controller is coupled with the main processor and the input/output interface and can be converted into a customized interface controller according to a specific interface protocol in a data input/output request in practical application so as to complete corresponding data input/output.
Please refer to fig. 3, which is a block diagram of fig. 2 according to an embodiment.
As shown in fig. 3, the input/output system 22 includes: an input/output interface 21 and an interface management controller 23. Interface management controller 23 further includes a data input register unit 231 and a data output register unit 233.
The data input register unit 231 is coupled to the input/output interface 21 and configured to store data input information of the input/output interface 21. Specifically, the data input information of each input/output interface 21 is stored in the corresponding data input register unit 231.
Data output register unit 233 is coupled to input/output interface 21 and is configured to store data output information of input/output interface 21. Specifically, the data output information of each input/output interface 21 is stored in the corresponding data output register unit 233.
In the embodiment, the interface management controller 23 is converted into a customized interface controller according to a data output request initiated by the main processor 20 under a specific interface protocol to control the data output register unit 233 and the input/output interface 21 to output data corresponding to the data output request, and the interface management controller 23 is further converted into a customized interface controller according to an external data input request under a specific interface protocol to control the input/output interface 21 and the data input register unit 231 to receive data corresponding to the external data input request. By means of the interface management controller 23, each input/output interface 21 is converted into a flexible input/output interface supporting a specific interface protocol in the data transmission request, so as to realize data transmission in the new data transmission mode.
Please refer to fig. 4, which is a block diagram of fig. 2 according to another embodiment.
As shown in fig. 4, the input/output system 22 includes: an input/output interface 21 and an interface management controller 23. The interface management controller 23 further includes a data input register unit 231, a data output register unit 233, and a programmable interface engine 235.
The data input register unit 231 is coupled to the input/output interface 21 and configured to store data input information of the input/output interface 21. Specifically, the data input information of each input/output interface 21 is stored in the corresponding data input register unit 231.
Data output register unit 233 is coupled to input/output interface 21 and is configured to store data output information of input/output interface 21. Specifically, the data output information of each input/output interface 21 is stored in the corresponding data output register unit 233.
Programmable interface engine 235 is coupled to host processor 20, data input register unit 231, and data output register unit 233. The programmable interface engine 235 is configured to execute interface programming information corresponding to a data output request initiated by the host processor 20 according to the data output request in a particular interface protocol to be programmed into a customized interface engine. The programmable interface engine 235 is further configured to perform interface programming information corresponding to an external data input request via the input register unit 231 to be programmed into a customized interface engine according to the external data input request. In practical applications, the programmable interface engine 235 may preferably be a programmable logic chip (e.g., an FPGA chip), an embedded control chip, or a custom chip.
In this embodiment, when the micro-controller is to send data to the external device, the main processor 20 sends a data output request, the programmable interface engine 235 obtains the data output request from the main processor 20, and executes the interface protocol code in the interface programming information corresponding to the data output request according to the data output request, so as to program the interface code into a customized interface engine matching the interface protocol, thereby controlling the data output register unit 233 and the input/output interface 21 to output data. When the micro-control device is to receive data transmitted from an external device, the programmable interface engine 235 executes the interface protocol code in the interface programming information corresponding to the data input request according to the data receiving action of the input/output interface 21 and the data input register unit 231 (i.e. the data receiving action of the input/output interface 21 is determined to be the external data input request), so as to program the interface engine into a customized interface engine matched with the interface protocol, thereby controlling the data input register unit 231 and the input/output interface 21 to input data.
In the embodiment, the programmable interface engine 235 in the interface management controller 23 is converted into a customized interface engine according to the data output request of the host processor 20 to control the data output register unit 233 and the input/output interface 21 to output the data corresponding to the data output request, and the programmable interface engine 235 in the interface management controller 23 is further converted into a customized interface engine according to the external data input request to control the input/output interface 21 and the data input register unit 231 to receive the data corresponding to the external data input request.
Please refer to fig. 5, which is a block diagram of fig. 2 according to another embodiment.
As shown in fig. 5, the input/output system 22 includes: an input/output interface 21 and an interface management controller 23. The interface management controller 23 further includes a data input register unit 231, a data output register unit 233, a programmable interface engine 235, and a data control unit 236.
The data input register unit 231 is coupled to the input/output interface 21 and configured to store data input information of the input/output interface 21. Specifically, the data input information of each input/output interface 21 is stored in the corresponding data input register unit 231.
Data output register unit 233 is coupled to input/output interface 21 and is configured to store data output information of input/output interface 21. Specifically, the data output information of each input/output interface 21 is stored in the corresponding data output register unit 233.
Programmable interface engine 235 is coupled to host processor 20, data input register unit 231, and data output register unit 233. The programmable interface engine 235 is configured to execute interface programming information corresponding to a data output request initiated by the host processor 20 according to the data output request in a particular interface protocol to be programmed into a customized interface engine. The programmable interface engine 235 is further configured to perform interface programming information corresponding to an external data input request via the input register unit 231 to be programmed into a customized interface engine according to the external data input request. In practical applications, the programmable interface engine 235 may preferably be a programmable logic chip (e.g., an FPGA chip), an embedded control chip, or a custom chip.
In this embodiment, when the micro-control device is to transmit data to an external device, the main processor 20 issues a data output request, the programmable interface engine 235 acquires the data output request from the main processor 20, executes an interface protocol code in interface programming information corresponding to the data output request according to the data output request, thereby programming the interface engine into a customized interface engine matching the interface protocol, and controls the data output register unit 233 and the input/output interface 21 to output data by outputting a data output control command to the data control unit 236. When the micro-control device is to receive data transmitted from an external device, the programmable interface engine 235 executes an interface protocol code in the interface programming information corresponding to the data input request according to a data receiving action of the input/output interface 21 and the data input register unit 231 (that is, the input/output interface 21 recognizes that an external data input request exists due to the data receiving action), so as to program the interface engine into a customized interface engine matching the interface protocol, and controls the data input register unit 231 and the input/output interface 21 to input data by outputting a data input control command to the data control unit 236.
Data control unit 236 is coupled to programmable interface engine 235 and to data input register unit 231 and data output register unit 233. In the present embodiment, the data control unit 236 is configured to receive a data input control instruction of the programmable interface engine 235 (at this time, the programmable interface engine 235 is converted into a customized interface engine) to control the data input register unit 231 to perform data input through the coupled input/output interface 21, or receive a data output control instruction of the programmable interface engine 235 (at this time, the programmable interface engine 235 is converted into a customized interface engine) to control the data output register unit 233 to perform data output through the coupled input/output interface 21.
In this embodiment, the programmable interface engine 235 in the interface management controller 23 is converted into a customized interface engine according to the data output request of the host processor 20, and outputs a data output control command to the data control unit 236 to control the data output register unit 233 and the input/output interface 21 to output the data corresponding to the data output request, and the programmable interface engine 235 in the interface management controller 23 is further converted into a customized interface engine according to an external data input request to control the data input register unit 231 and the input/output interface 21 to input the data corresponding to the data output request by outputting a data input control command to the data control unit 236.
Please refer to fig. 6, which is a block diagram illustrating an implementation of fig. 2 in another embodiment.
As shown in fig. 6, the input/output system 22 includes: an input/output interface 21 and an interface management controller 23. The interface management controller 23 further includes a data input register unit 231, a trigger logic unit 232, a data output register unit 233, a programmable interface engine 235, and a data control unit 236.
The data input register unit 231 is coupled to the input/output interface 21 and configured to store data input information of the input/output interface 21. Specifically, the data input information of each input/output interface 21 is stored in the corresponding data input register unit 231.
The trigger logic unit 232 is coupled to the data input register unit 231 and the programmable interface engine 235, and configured to detect a data receiving action of the input/output interface 21 coupled to the data input register unit 231 through the data input register unit 231, and generate a data trigger message and send the data trigger message to the programmable interface engine 235 when detecting that the data receiving action exists at the input/output interface 21 (i.e., the data receiving action exists at the input/output interface 21, which is determined to be an external data input request). In practical applications, the trigger logic unit 232 may be designed as an edge trigger (e.g., an upper edge trigger, a lower edge trigger, or both), but not limited thereto, and the trigger logic unit 232 may also be another type of trigger, such as a level trigger (e.g., a low level trigger, a high level trigger, or both).
Data output register unit 233 is coupled to input/output interface 21 and is configured to store data output information of input/output interface 21. Specifically, the data output information of each input/output interface 21 is stored in the corresponding data output register unit 233.
Programmable interface engine 235 is coupled to host processor 20, trigger logic unit 232, and data control unit 236. The programmable interface engine 235 is configured to execute interface programming information corresponding to a data output request initiated by the host processor 20 according to the data output request in a particular interface protocol to be programmed into a customized interface engine. The programmable interface engine 235 is further configured to execute the interface programming information corresponding to the external data input request according to the data trigger information (i.e. the data trigger information indicates that the external data input request exists) sent by the trigger logic unit 232, and to be programmed into a customized interface engine. In practical applications, the programmable interface engine 235 may preferably be a programmable logic chip (e.g., an FPGA chip), an embedded control chip, or a custom chip.
In this embodiment, when the micro-control device is to transmit data to an external device, the main processor 20 issues a data output request, the programmable interface engine 235 acquires the data output request from the main processor 20, executes an interface protocol code in interface programming information corresponding to the data output request according to the data output request, thereby programming the interface engine into a customized interface engine matching the interface protocol, and controls the data output register unit 233 and the input/output interface 21 to output data by outputting a data output control command to the data control unit 236. When the micro-control device is to receive data transmitted from an external device, the trigger logic unit 232 detects that there is a data receiving action on the input/output interface 21 (i.e. the data receiving action on the input/output interface 21 is determined to be an external data input request), generates a data trigger message and transmits the data trigger message to the programmable interface engine 235, and the programmable interface engine 235 executes an interface protocol code in the interface programming message corresponding to the data input request according to the data trigger message, so as to program the interface code into a customized interface engine matching the interface protocol, and controls the data input register unit 231 and the input/output interface 21 to input data by outputting a data input control command to the data control unit 236.
Data control unit 236 is coupled to programmable interface engine 235 and to data input register unit 231 and data output register unit 233. In the present embodiment, the data control unit 236 is configured to receive a data input control instruction of the programmable interface engine 235 (at this time, the programmable interface engine 235 is converted into a customized interface engine) to control the data input register unit 231 to perform data input through the coupled input/output interface 21, or receive a data output control instruction of the programmable interface engine 235 (at this time, the programmable interface engine 235 is converted into a customized interface engine) to control the data output register unit 233 to perform data output through the coupled input/output interface 21.
In this embodiment, the programmable interface engine 235 in the interface management controller 23 is converted into a customized interface engine according to the data output request of the host processor 20, and outputs a data output control command to the data control unit 236 to control the data output register unit 233 and the input/output interface 21 to output the data corresponding to the data output request, and the programmable interface engine 235 in the interface management controller 23 is further converted into a customized interface engine according to the data trigger information (the data trigger information indicates that there is an external data input request) generated by the trigger logic unit 232, and outputs a data input control command to the data control unit 236 to control the data input register unit 231 and the input/output interface 21 to input the data corresponding to the data output request.
Please refer to fig. 7, which is a block diagram illustrating an implementation of fig. 2 in yet another embodiment.
As shown in fig. 7, the interface management controller 23 further includes: data input register unit 231, trigger logic unit 232, data output register unit 233, storage unit 234, programmable interface engine 235, and data control unit 236.
The data input register unit 231 is coupled to the input/output interface 21 and configured to store data input information of the input/output interface 21. Specifically, the data input information of each input/output interface 21 is stored in the corresponding data input register unit 231.
The trigger logic unit 232 is coupled to the data input register unit 231 and the programmable interface engine 235, and configured to detect a data receiving action of the input/output interface 21 coupled to the data input register unit 231 through the data input register unit 231, and generate a data trigger message and send the data trigger message to the programmable interface engine 235 when detecting that the data receiving action exists at the input/output interface 21 (i.e., the data receiving action exists at the input/output interface 21, which is determined to be an external data input request). In practical applications, the trigger logic unit 232 may be designed as an edge trigger (e.g., an upper edge trigger, a lower edge trigger, or both), but not limited thereto, and the trigger logic unit 232 may also be another type of trigger, such as a level trigger (e.g., a low level trigger, a high level trigger, or both).
Data output register unit 233 is coupled to input/output interface 21 and is configured to store data output information of input/output interface 21. Specifically, the data output information of each input/output interface 21 is stored in the corresponding data output register unit 233.
The storage unit 234 is configured to store related information. In the present embodiment, the storage unit 234 is mainly used for storing two types of information: one type is parameter definition information, which is a basic parameter for defining each functional unit in the interface management controller 23. These parameter definition information may include, for example: the attribute of each input/output interface, i.e. the definition of whether a certain input/output interface is an input interface or an output interface; the trigger definition of the trigger logic 232, i.e., whether a certain trigger logic 232 is an edge trigger (upper edge trigger, lower edge trigger, or both) or a level trigger (low level trigger, high level trigger, or both), etc. Another type is interface protocol code. The micro-controller needs to support a certain interface protocol to complete data transmission.
For example: in one case, when the micro-controller is connected to different external devices and needs to perform data transmission, assuming that the external device a supports the interface protocol a and the external device B supports the interface protocol B, during data transmission, the input/output interface of the micro-controller connected to the external device a needs to support the interface protocol a to realize data transmission between the micro-controller and the external device a, and the input/output interface of the micro-controller connected to the external device B needs to support the interface protocol B to realize data transmission between the micro-controller and the external device B.
For example: in another case, the micro-controller is connected to an external device but needs to handle different types of data transmission, and if the C-type data in the external device supports the interface protocol C and the D-type data supports the interface protocol D, the micro-controller and the external device perform data transmission of the C-type data by using the input/output interface of the micro-controller supporting the interface protocol C, and perform data transmission of the D-type data with the external device by using the input/output interface of the micro-controller supporting the interface protocol D. Therefore, it is required that the micro-control apparatus be equipped with an interface protocol for supporting different external devices or different types of data, so as to support the external devices and the types of data.
In practical applications, the storage unit 234 is a Programmable Memory, such as an electrically Erasable Programmable Read Only Memory (EPROM) or a Flash Memory, so that the user can program the storage unit 234 as required, that is: the parameter definition information and/or the interface protocol to be applied can be written as needed, or the written parameter definition information and/or the written interface protocol can be erased and rewritten, and the like.
As previously described, the storage unit 234 stores interface protocol codes. In practical applications, for a typical micro-control device, the micro-control device will be configured with an input/output interface 21 supporting the corresponding interface protocol. In practical applications, to cover a wider range of data transmission, each interface protocol commonly available in the market is generally stored in the storage unit 234. Specifically, the interface protocol may include, for example, a UART interface protocol, an I2C interface protocol, an SPI interface protocol, an I2S interface protocol, an ECAP interface protocol, a QEP interface protocol, and the like. The UART is one of asynchronous serial communication protocols, and is used for asynchronous communication. In general, UART is used for communication between host and auxiliary devices, and converts data transmission between serial communication and parallel communication (parallel input serial output), and works by transmitting each character of the transmitted data bit by bit. The host adopts parallel data inside, can not directly send the data to the serial equipment, must carry out asynchronous transmission through UART arrangement, and its process is: the MCU or CPU in the host puts the data to be written into the serial device into the UART First, and then transmits the data to the serial device through a FIFO (First Input First Output). I2C is a two-wire serial bus developed by PHILIPS for connecting microcontrollers and their peripherals. The I2C bus means "specification or protocol for completing information exchange between integrated circuits or functional units", is a bus standard widely used in the field of microelectronic communication control, is a special form of synchronous communication, and has the advantages of few interface lines, simple control mode, small device packaging form, high communication rate, and the like. SPI is a communication protocol proposed by Motorola. The SPI is a synchronous serial peripheral interface, which supports synchronous serial data transmission between a host (including a CPU or an MCU) and various peripheral low-speed devices, under the shift pulse of the host, data is transmitted according to bits, the high bit is in front of the low bit, the low bit is behind the high bit, full duplex communication is realized, the data transmission speed is generally faster than that of an I2C bus, and the speed can reach several Mbps. I2S (Inter-IC Sound, audio bus built in IC) is a bus standard established by philips for audio data transmission between digital audio devices (e.g., CD players, digital Sound processors, digital television Sound systems). The bus is dedicated to data transmission among audio devices, and is widely applied to various multimedia systems. The design of transmitting the clock and the data signals along independent wires is adopted, and the data and the clock signals are separated, so that the distortion caused by time difference is avoided, and the cost for purchasing professional equipment for resisting audio jitter is saved for users. QEP (Quadrature Encoder Pulse) is a module in an event manager in a DSP of the texas instruments TI (texas instruments). The QEP circuits, which are typically used in the opto-electronic encoder interface of rotating machinery to obtain position and velocity information thereof, are enabled to decode and count the quadrature encoded pulse signals input on the pins CAP1/QEP1 and CAP2/QEP 2.
The programmable interface engine 235 is coupled to the main processor 20, the trigger logic unit 232, the data control unit 236, and the storage unit 234, and configured to access the storage unit 234 according to a data output request of the main processor 20 or data trigger information transmitted by the trigger logic unit 232 and acquire interface programming information corresponding to the data output request or the external data input request from the storage unit 234, and is programmed into a customized input/output interface engine by executing the acquired interface programming information. In practical applications, the programmable interface engine 235 may preferably be a programmable logic chip (e.g., an FPGA chip), an embedded control chip, or a custom chip.
In this embodiment, when the micro-control device is to send data to an external device, the main processor 20 issues a data output request, the programmable interface engine 235 acquires the data output request from the main processor 20, accesses the storage unit 234 according to the data output request and acquires interface programming information corresponding to the data output request from the storage unit 234, executes an interface protocol code in the interface programming information, thereby programming the interface programming information into a customized interface engine matching the interface protocol, and controls the data output register unit 233 and the input/output interface 21 to output data by outputting a data output control instruction to the data control unit 236; when the micro-control device is going to receive data from the external device, the trigger logic unit 232 detects that there is a data receiving action on the input/output interface 21 (i.e. the data receiving action on the input/output interface 21 is determined to be an external data input request) to generate a data trigger message and sends the data trigger message to the programmable interface engine 235, the programmable interface engine 235 accesses the storage unit 234 according to the data trigger information and acquires the interface programming information corresponding to the data input request from the storage unit 234, executes the interface protocol code in the interface programming information, thereby being programmed into a customized interface engine matched with the interface protocol, and controlling the data input register unit 231 and the input/output interface 21 to input data by outputting a data input control command to the data control unit 236.
Data control unit 236 is coupled to programmable interface engine 235 and to data input register unit 231 and data output register unit 233. In the present embodiment, the data control unit 236 is configured to receive a data input control instruction of the programmable interface engine 235 (at this time, the programmable interface engine 235 is converted into a customized interface engine) to control the data input register unit 231 to perform data input through the coupled input/output interface 21, or receive a data output control instruction of the programmable interface engine 235 (at this time, the programmable interface engine 235 is converted into a customized interface engine) to control the data output register unit 233 to perform data output through the coupled input/output interface 21.
In this embodiment, the programmable interface engine 235 in the interface management controller 23 accesses the storage unit 234 according to the data output request of the main processor 20 and acquires the interface programming information corresponding to the data output request from the storage unit 234, executes the interface protocol code in the interface programming information to convert into a customized interface engine, outputs a data output control command to the data control unit 236 to control the data output register unit 233 and the input/output interface 21 to output the data corresponding to the data output request, and the programmable interface engine 235 in the interface management controller 23 further accesses the storage unit 234 according to the data trigger information generated by the trigger logic unit 232 (the data trigger information indicates the presence of the external data input request) and acquires the interface programming information corresponding to the data input request from the storage unit 234, the interface protocol code in the interface programming information is executed, so that the interface programming information is programmed into a customized interface engine matched with the interface protocol, and the data input register unit 231 and the input/output interface 21 are controlled to input data by outputting a data input control instruction to the data control unit 236.
The following is a detailed description of an example of the application of the micro-control device.
Example one: UART interface
The UART is one of asynchronous serial communication protocols, and is used for asynchronous communication. In UART interface protocol, PinTXFor sending data out, PinRXFor receiving data from outside, Pin is utilizedTXAnd PinRXData transmission is performed at a fixed transmission rate. In the data transmission mode, the programmable interface engine acquires a data output request from the main processor, accesses the storage unit according to the data output request, acquires the UART TX code corresponding to the data output request from the storage unit, executes the UART TX code, and is programmed into a UART engine matched with the UART interface protocol, and the UART engine generates state information (such as start bit, data bit, stop bit, and the like) at the same time. The data control unit uses the state information to drive the data output register unit and the input/output interface, and uses PinTXAnd outputting the data. In a data receiving mode, the latch of the data input register unit is used for utilizing Pin through the input/output interfaceRXThe trigger logic unit outputs a data trigger message to the programmable interface engine after detecting the data receiving action of the corresponding input/output interface, the programmable interface engine accesses the storage unit according to the data trigger message and acquires the UART RX code corresponding to the data input request from the storage unit, and executes the UART RX code, so that the UART engine is programmed into the UART engine matched with the UART interface protocol, and the UART engine can simultaneously generate state information (such as start bit, data bit, stop bit and the like). The data control unit uses the state information to control the data input register unit to process data through the coupled input/output interface using Pin RXInputs data and transmits the data to the host processor.
Because the programmable interface engine in the input/output system is directly coupled with the data input register unit and the data output register unit, an interface multiplexer or a cross switch matrix structure is omitted, and the programmable interface engine monitors the data input register unit (coupled with each input/output interface) and the data output register unit (coupled with each input/output interface) at any time, so that the programmable interface engine can simultaneously deal with multi-data transmission actions.
Example two: I2C interface
I2C is a multi-master multi-slave serial bus developed by PHILIPS for connecting microcontrollers and their peripherals. The I2C bus uses a Serial Data line (SDA) plus a Serial Clock Line (SCL) to complete the transfer of Data and expansion of peripheral devices. In this example two, assume that the input/output system is a master I2C and that it will drive the serial clock.
In the data transmission mode, when the main processor needs to transmit data, the programmable interface engine obtains a data output request from the main processor, accesses the storage unit according to the data output request, acquires I2C codes corresponding to the data output request from the storage unit, executes the I2C codes, so as to program the programmable I2C engine matched with the I2C interface protocol, and the I2C engine generates state information (such as a starting state, an address state, a data state and the like) at the same time. The data control unit drives the data output register unit to output data and simultaneously monitors the data input register unit according to the state information.
In the data receiving mode, the trigger logic unit monitors the data input register unit, outputs data trigger information to the programmable interface engine after detecting that the corresponding input/output interface receives data receiving action from the I2C bus, the programmable interface engine accesses the storage unit according to the data trigger information and acquires an I2C code corresponding to the data input request from the storage unit, executes an I2C code, so that the programmable I2C engine is programmed into an I2C engine matched with the I2C interface protocol, and the I2C engine generates state information corresponding to the I2C interface protocol at the same time. The data control unit processes the input data through the data input register unit according to the state information and transmits the data to the main processor.
Because the programmable interface engine in the input/output system is directly coupled with the data input register unit and the data output register unit, an interface multiplexer or a cross switch matrix structure is omitted, and the programmable interface engine monitors the data input register unit (coupled with each input/output interface) and the data output register unit (coupled with each input/output interface) at any time, so that the programmable interface engine can simultaneously deal with multi-data transmission actions.
As described above, the micro-controller and the input/output system applied to the micro-controller according to the present application are a variable input/output system having an input/output interface and an interface management controller coupled to a main processor and the input/output interface, and capable of converting to a customized interface controller according to an interface protocol in a data input/output request in actual application, thereby performing corresponding data input/output.
Compared with the prior art, the micro-control device and the input/output system applied to the micro-control device have the advantages that an interface multiplexer or a cross switch matrix structure is omitted, the input/output interface design is simplified, meanwhile, the input/output system can be matched in a self-adaptive mode according to the data transmission characteristics in the current data input/output request, the input/output system can still be programmed after the micro-control device is manufactured, and the variability, the flexibility and the expandability of the input/output system are improved.
Meanwhile, the input/output system is a variable input/output system, so that a user does not need to master the exact definition of each input/output interface (the definition of the input/output interface is changed), the use threshold of the user is reduced, and the use of the user is facilitated. In addition, as mentioned above, the input/output system omits the interface multiplexer or the crossbar structure, and more importantly, because the interface management controller in the input/output system is software-based (it can be programmed into a customized interface controller by executing the written interface protocol code), it is not necessary to design the circuit hardware of a plurality of interface functional modules with different numbers and different functions during the manufacturing process, which saves the chip area and power consumption.
The above embodiments are merely illustrative of the principles and utilities of the present application and are not intended to limit the application. Any person skilled in the art can modify or change the above-described embodiments without departing from the spirit and scope of the present application. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical concepts disclosed in the present application shall be covered by the claims of the present application.

Claims (10)

1. An input/output system for a micro control device on a chip, said micro control device on a chip comprising a main processor, said input/output system comprising:
an input/output interface; and
an interface management controller;
wherein the interface management controller includes:
a data input register unit coupled to the input/output interface and configured to store data input information of the input/output interface;
a data output register unit coupled to the input/output interface and configured to store data output information of the input/output interface;
a programmable interface engine coupled to the host processor, the data input registration unit, and the data output registration unit;
A data control unit coupled to the programmable interface engine and the data input and output register units;
the programmable interface engine is configured to obtain an interface protocol code in interface programming information corresponding to a data output request according to the data output request initiated by the main processor under a predetermined interface protocol, execute the interface protocol code in the interface programming information corresponding to the data output request and program the interface protocol code into a customized interface engine, so that the customized interface engine generates state information, and the data control unit drives the data output register unit and the input/output interface to output data by using the state information; or, the programmable interface engine is configured to obtain an interface protocol code in interface programming information corresponding to the external data input request according to the external data input request via the input register unit, execute the interface protocol code in the interface programming information corresponding to the external data input request and program the interface protocol code into a customized interface engine, so that the customized interface engine generates status information, and the data control unit controls the data input register unit to transmit the status information to the host processor through a coupled input/output interface;
The data control unit is configured to receive a data input control instruction of the programmable interface engine to control the data input register unit to input data through the coupled input/output interface; or, the data control unit is configured to receive a data output control instruction of the programmable interface engine to control the data output register unit to output data through the coupled input/output interface.
2. The input/output system of claim 1, wherein the interface management controller further comprises:
a trigger logic unit located between and coupled to the data input register unit and the programmable interface engine; the trigger logic unit is configured to detect a data receiving action of the input/output interface coupled to the data input register unit through the data input register unit, and output a data trigger message to the programmable interface engine when detecting that the data receiving action exists at the input/output interface.
3. The input/output system of claim 1, wherein the interface management controller further comprises:
A storage unit coupled to the programmable interface engine and configured to store interface programming information.
4. The input/output system of claim 3, wherein the storage unit is an EEPROM or flash memory.
5. The input/output system of claim 1, wherein the programmable interface engine is a programmable logic chip, an embedded control chip, or a custom chip.
6. A chip-scale micro-control apparatus, comprising:
a main processor; and
an input/output system including an input/output interface and an interface management controller;
wherein the interface management controller includes:
a data input register unit coupled to the input/output interface and configured to store data input information of the input/output interface;
a data output register unit coupled to the input/output interface and configured to store data output information of the input/output interface;
a programmable interface engine coupled to the host processor, the data input registration unit, and the data output registration unit;
a data control unit coupled to the programmable interface engine and the data input and output register units;
The programmable interface engine is configured to obtain an interface protocol code in interface programming information corresponding to a data output request according to the data output request initiated by the main processor under a predetermined interface protocol, execute the interface protocol code in the interface programming information corresponding to the data output request and program the interface protocol code into a customized interface engine, so that the customized interface engine generates state information, and the data control unit drives the data output register unit and the input/output interface to output data by using the state information; or, the programmable interface engine is configured to obtain an interface protocol code in interface programming information corresponding to the external data input request according to the external data input request via the input register unit, execute the interface protocol code in the interface programming information corresponding to the external data input request and program the interface protocol code into a customized interface engine, so that the customized interface engine generates status information, and the data control unit controls the data input register unit to transmit the status information to the host processor through a coupled input/output interface;
The data control unit is configured to receive a data input control instruction of the programmable interface engine to control the data input register unit to input data through the coupled input/output interface; or, the data control unit is configured to receive a data output control instruction of the programmable interface engine to control the data output register unit to output data through the coupled input/output interface.
7. The chip-scale micro-controller of claim 6, wherein the interface management controller further comprises:
a trigger logic unit located between and coupled to the data input register unit and the programmable interface engine; the trigger logic unit is configured to detect a data receiving action of the input/output interface coupled to the data input register unit through the data input register unit, and output a data trigger message to the programmable interface engine when detecting that the data receiving action exists at the input/output interface.
8. The chip-scale micro-controller of claim 6, wherein the interface management controller further comprises:
A storage unit coupled to the programmable interface engine and configured to store interface programming information.
9. The chip-scale micro-control device according to claim 8, wherein the memory unit is an eeprom or a flash memory.
10. The chip-scale micro-controller of claim 6, wherein the programmable interface engine is a programmable logic chip, an embedded control chip, or a custom chip.
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