CN106253655A - DC DC changer adaptive dead zone based on zero voltage start-up produces circuit - Google Patents

DC DC changer adaptive dead zone based on zero voltage start-up produces circuit Download PDF

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Publication number
CN106253655A
CN106253655A CN201610679742.0A CN201610679742A CN106253655A CN 106253655 A CN106253655 A CN 106253655A CN 201610679742 A CN201610679742 A CN 201610679742A CN 106253655 A CN106253655 A CN 106253655A
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China
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input
circuit
termination
outfan
door
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CN201610679742.0A
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CN106253655B (en
Inventor
罗萍
黄龙
邱双杰
王康乐
刘泽浪
甄少伟
曾鹏灏
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Shenzhen Taide Semiconductor Co ltd
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University of Electronic Science and Technology of China
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/38—Means for preventing simultaneous conduction of switches
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention belongs to electronic circuit technology field, relate to DC DC changer adaptive dead zone based on zero voltage start-up and produce circuit.This adaptive dead zone is produced circuit and is sampled the load current of DC DC changer by current sampling circuit, and changes into information of voltage, obtains the sampled voltage input voltage as integrator circuit；The integration of integrator circuit is controlled by integral control circuit；Last waveform processing circuit obtains the power tube grid containing adaptive dead zone after processing the output waveform of integrator circuit and drives signal.Beneficial effects of the present invention is, effectively can provide optimum Dead Time for power tube adaptively according to the load situation of change of DC DC changer, it is ensured that the no-voltage of power tube is opened.Compared with this circuit fixes dead-zone circuit with tradition, the conduction loss of its switching tube is approximately zero, and output waveform is more stable under different loading conditions, can be effectively improved the efficiency of DC DC changer.

Description

DC-DC converter adaptive dead zone based on zero voltage start-up produces circuit
Technical field
The invention belongs to electronic circuit technology field, relate to DC-DC converter adaptive dead zone based on zero voltage start-up Produce circuit.
Background technology
In DC-DC converter, the conducting resistance of power tube is the least, if two power tubes are opened simultaneously, it may appear that electricity Source is to the low impedance path on ground, and the electric current flowing through power tube will be very big, and this electric current can reach ampere levels, makes the power consumption of chip It is greatly increased, power tube or even whole chip time serious, can be made seriously to damage.Therefore general by adding between two power tubes Enter Dead Time and work process simultaneously turns on arm height low side power tube preventing.Common practice is to use regular length Dead Time, its advantage is that design is convenient and simple, reliability is high, and its shortcoming is the most particularly evident: fixing Dead Time is lighter There will be high-low power pipe under load and simultaneously close off the situation of longer time, thus can be to the load voltage driven, current wave Shape produces impact, efficiency can be caused further low and the problem of poor stability.
Summary of the invention
To be solved by this invention, it is simply that for the problems referred to above, DC-DC converter based on zero voltage start-up is proposed adaptive Answer dead-zone generating circuit.
For achieving the above object, the present invention adopts the following technical scheme that
DC-DC converter adaptive dead zone based on zero voltage start-up produces circuit, including load current sample circuit, amasss Divide device circuit, integral control circuit and waveform processing circuit；The input of load current sample circuit terminates the defeated of DC-DC converter Go out voltage, the first input end of the output termination integrator circuit of load current sample circuit；Second input of integrator circuit The outfan of termination integral control circuit, the 3rd input termination PWM input signal of integrator circuit, the output of integrator circuit The first input end of termination waveform processing circuit and the first input end of integral control circuit；Second input of integral control circuit Termination PWM input signal；Second input termination PWM input signal of waveform processing circuit, the outfan of waveform processing circuit is defeated Go out the grid containing the adaptive dead zone time and drive signal.
The power tube gate control signal of Dead Time, waveform processing is not contained during wherein PWM input signal is DC-DC converter The output of circuit is the output signal of the present invention.
The technical scheme that the present invention is total, is sampled to the load current of DC-DC converter by current sampling circuit, and Changing into information of voltage, obtain the sampled voltage input voltage as integrator circuit, integral control circuit is to integrator circuit Integration be controlled, last waveform processing circuit obtains containing self adaptation after processing the output waveform of integrator circuit The power tube grid in dead band drive signal.
Described load current sample circuit is made up of the 3rd resistance RL, the 4th resistance Rsense and operational amplifier；The The outfan of the one termination DC-DC converter of three resistance RL, one end of another termination the 4th resistance Rsense of the 3rd resistance RL； The other end ground connection of the 4th resistance Rsense；Positive input termination the 3rd resistance RL's and the 4th resistance Rsense of operational amplifier Common port, its negative input end and outfan short circuit, the outfan of operational amplifier is the output of described load current sample circuit End；
Described waveform processing circuit by the 3rd comparator COMP3, the 4th comparator COMP4, two input with door AND2, two Input or door OR3 are constituted；The positive input termination biasing voltage signal Vref3 of the 3rd comparator COMP3, its negative input termination integration The outfan of device circuit, its output termination two input and first input end of door AND2；The positive input terminal of the 4th comparator COMP4 Connect the outfan of integrator circuit, its negative input termination biasing voltage signal Vref4, its output termination two input or door OR3 Second input；Two inputs and the second of door AND2 the input termination pwm signal, its outfan is the of described waveform processing circuit One outfan；The first input end of two inputs or door OR3 connects pwm signal, and its outfan is the second of described waveform processing circuit Outfan.
Further, described integrator circuit is by the first resistance R1, the second resistance R2, the first NMOS tube MN1, the 2nd NMOS Pipe MN2, the 3rd NMOS tube MN3, the first PMOS MP1, the second PMOS MP2, electric capacity C and operational amplifier are constituted；First electricity The outfan of the one termination load current detection circuit of resistance R1, its another terminate the drain terminal of the first NMOS tube MN1；Second resistance R2 One termination the second PMOS MP2 drain terminal, its other end ground connection；The grid of the first NMOS tube MN1 connects pwm signal, its source electrode Connect the drain terminal of the second NMOS tube MN2；The grid of the second NMOS tube MN2 meets the output Vc of integral control circuit, and its source electrode connects computing The negative input end of amplifier；The grid of the 3rd NMOS tube MN3 connects pwm signal, its source ground, and its drain electrode connects operational amplifier Positive input terminal；The grid of the first PMOS MP1 connects pwm signal, and its source electrode connects the outfan of load current detection circuit, its drain electrode Connect the positive input terminal of operational amplifier；The grid of the second PMOS MP2 connects pwm signal, and its source electrode connects the source of the first NMOS tube MN1 Pole, its grounded drain；Electric capacity C positive plate connects the negative input end of operational amplifier, and its negative plate connects the output of operational amplifier；Fortune Calculate the outfan that outfan is described integrator circuit of amplifier.
Further, described integral control circuit by the first comparator COMP1, the second comparator COMP2, phase inverter INV, First liang of input or door OR1, second liang of input or door OR2, two inputs and door AND1 composition；First comparator COMP1's is the most defeated Enter to terminate biasing voltage signal Vref1, its negative input termination integrator circuit outfan, its output termination first liang input or The first input end of door OR1；The outfan of the positive input termination integrator circuit of the second comparator COMP2；Its negative input terminates Biasing voltage signal Vref2, its second liang of input of output termination or second input of door OR2；The input termination of phase inverter INV Pwm signal, its second liang of input of output termination or first input end of door OR2；First liang of input or second input of door OR1 Connecing pwm signal, its output connects the first input end of two inputs and door AND1；It is defeated that the output of second liang of input or door OR2 terminates two Enter the second input with door AND1；Two inputs and the output Vc that outfan is described Integral Processing circuit of door AND1.
Further, described bias voltage Vref1, Vref2, Vref3 and Vref4 have following relation, Vref1 > Vref4 >Vref3>Vref2；And (Vref1-Vref2) > 2 | Vref3-Vref2 | and Vref1 Vref4=Vref3 Vref2；Vref1– The value of Vref4 with Vref3 Vref2 is big by the output voltage of DC-DC converter, SW point equivalent capacity and integrating capacitor C Little decision, is embodied in the Vref1-Vref4 product with integrating capacitor equal to SW point equivalent capacity and DC-DC converter output The product of voltage, the drain terminal current potential that wherein in the i.e. DC-DC converter of SW point current potential, two switching power tubes are common.
Beneficial effects of the present invention is, energy is effective is merit according to the load situation of change of DC-DC converter adaptively Rate pipe provides optimum Dead Time, it is ensured that the no-voltage of power tube is opened.Compared with this circuit fixes dead-zone circuit with tradition, it is opened The conduction loss closing pipe is approximately zero, and output waveform is more stable under different loading conditions, can be effectively improved DC-DC conversion The efficiency of device.
Accompanying drawing explanation
Fig. 1 is DC-DC converter adaptive dead zone based on the zero voltage start-up circuit structure block diagram of the present invention；
Fig. 2 is load current sample circuit schematic diagram；
Fig. 3 is integrator circuit schematic diagram；
Fig. 4 is integral control circuit schematic diagram；
Fig. 5 is waveform processing circuit schematic diagram；
Fig. 6 is the waveform diagram of DC-DC converter adaptive dead zone based on zero voltage start-up circuit.
Detailed description of the invention
Fig. 1 is DC-DC converter adaptive dead zone based on the zero voltage start-up circuit structure block diagram of the present invention, such as Fig. 1 Shown in, the load current of load current sampling circuit samples DC-DC converter and using the current signal of sampling as integrator electricity The input on road.Integrator circuit is using this electric current as the charging and discharging currents of integrating capacitor C, and it charges, discharges, stops discharge and recharge State is by pwm signal and Vc signal co-controlling, and wherein Vc signal is by integral control unit amassing by logical judgment integrator Produce after dividing state.Through above-mentioned steps, output trapeziodal voltage signal is input to waveform processing circuit by integrator module, and should The slope of trapeziodal voltage signal is determined therefore have adaptivity by the size of the load current of DC-DC converter.Last waveform Process circuit this trapeziodal voltage signal is processed, produce the lower power tube grid with adaptive dead zone and drive signal.This Invention devises mentioned load current sample circuit, integrator circuit, integral control circuit and waveform processing circuit.
Fig. 2 load current sample circuit schematic diagram, RL is the load of DC-DC converter, and Rsense is sampling resistor, resistance The resistance of Rsense is chosen and is much smaller than resistance RL.According to the principle that the empty short void of operational amplifier is disconnected, this current sampling circuit The voltage that output voltage Vsense is sampling resistor Rsense two ends, can be at load current sample circuit in subsequent conditioning circuit Outfan connect a resistance identical with Rsense resistance again, to obtain the electric current equivalent with DC-DC converter load current, I.e. complete the sampling to load current.
Fig. 3 and Fig. 4 is respectively the schematic diagram of integrator circuit and integral control circuit, if the initial value of Vc is high level, When PWM is high level, MN1, MN2 and MN3 pipe conducting in integrator circuit, the positive input terminal ground connection of amplifier, short according to void Empty disconnected principle, its negative input end is also 0 current potential.Voltage Vsense is by being converted into after resistance R1 and DC-DC converter load electricity Flowing equivalent electric current and be charged to electric capacity, now Vout starts electric discharge, when Vout is less than voltage Vref2, and integration control In circuit the second defeated COMP2 of comparator go out low level to second liang input or second input of door OR2, make second liang input or Door OR2 output low level, after eventually passing through two inputs and door AND1, Vc is set to low level, and MN2 pipe ends, and electric discharge stops.Now PWM remains as high level, and before its low level is arrived, electric capacity neither charges and do not discharges.When PWM is step-down level, integration First liang of control circuit input or door OR1 and second liang of input or door OR2 export high level, and now Vc is set to high electricity again Flat.MN2, MP1 and MP2 pipe conducting in integrator circuit, the positive input terminal of amplifier is received current potential Vsense, is broken according to empty short void Principle, its negative input end is also Vsense current potential, and negative input end voltage Vsense is converted into and DC-DC behind ground by resistance R2 Electric current that changer load current is equivalent also discharges to electric capacity, and now Vout starts electric discharge, when Vout is higher than voltage Vref1 Time, in integral control circuit, the first comparator COMP1 output low level to first liang input or first input end of door OR1, makes First liang of input or door OR1 output low level, eventually pass through two inputs and be set to low level with Vc behind the door, and MN2 pipe ends, and charging stops Only.Now PWM remains as low level, and before its high level arrives, electric capacity neither charges and do not discharges.When PWM becomes high level Time, first liang of integral control circuit input or door OR1 and second liang of input or door OR2 export high level, and now Vc is again It is set to high level, i.e. returns to original hypothesis value；Wherein biasing voltage signal Vref1 is more than biasing voltage signal Vref2, and (Vref1-Vref2)>2|Vref3-Vref2|.Thus, can be to integrated signal by integrator circuit and integral control circuit Forward integration, reverse integral, termination integration be controlled, and then obtain required specification trapezoidal wave, for next step ripple Shape processes and prepares.
Fig. 5 is waveform processing circuit schematic diagram, and Fig. 6 is DC-DC converter adaptive dead zone based on zero voltage start-up electricity The waveform diagram on road, the output of the input termination integrator circuit of waveform processing circuit, the integrated signal being in Fig. 6.As Shown in Fig. 6, integrated signal is handled as follows by waveform processing circuit: when pwm signal is high level and integrated signal magnitude of voltage During higher than bias voltage Vref3, the first outfan GH of waveform processing circuit exports high level, remaining situation output low level； When pwm signal is high level or integrated signal magnitude of voltage is higher than bias voltage Vref4, the second output of waveform processing circuit End GL exports high level, remaining situation output low level；Wherein biasing voltage signal Vref4 is more than biasing voltage signal Vref3, I.e. Vref1 > Vref4 > Vref3 > Vref2, and Vref1 Vref4=Vref3 Vref2.In order to the no-voltage of guaranteed output pipe is opened Opening, the value of Vref1 Vref4 and Vref3 Vref2 is by the output voltage of DC-DC converter, SW point equivalent capacity and integration The size of electric capacity C determines, is embodied in the Vref1-Vref4 product with integrating capacitor equal to SW point equivalent capacity and DC-DC The product of changer output voltage.By waveform processing circuit, create the power containing adaptive dead zone time tdr and tdf Pipe grid drive signal GH and GL, and according to the difference of loading condition, Dead Time tdr and tdf meeting adaptive change, in figure Load1 with load2 is two kinds of different loading conditions, owing to the input integral electric current of integrator circuit is to DC-DC converter The sample rate current of load current so that the slope of integration filtered output changes because of the change of loading condition.Thus, in load In the case of load1, a length of tdr1 and tdf1 in dead band of generation；In the case of load load2, the dead band of generation is a length of Tdr2 and tdf2.

Claims (4)

1. DC-DC converter adaptive dead zone based on zero voltage start-up produces circuit, including load current sample circuit, integration Device circuit, integral control circuit and waveform processing circuit；The output of the input termination DC-DC converter of load current sample circuit Voltage, the first input end of the output termination integrator circuit of load current sample circuit；Second input of integrator circuit Connect the outfan of integral control circuit, the 3rd input termination PWM input signal of integrator circuit, the outfan of integrator circuit Welding wave processes first input end and the first input end of integral control circuit of circuit；Second input of integral control circuit Connect PWM input signal；Second input termination PWM input signal of waveform processing circuit, the outfan output of waveform processing circuit Grid containing the adaptive dead zone time drive signal；
Described load current sample circuit is made up of the 3rd resistance RL, the 4th resistance Rsense and operational amplifier；3rd electricity The outfan of the one termination DC-DC converter of resistance RL, one end of another termination the 4th resistance Rsense of the 3rd resistance RL；4th The other end ground connection of resistance Rsense；Positive input termination the 3rd resistance RL's and the 4th resistance Rsense of operational amplifier is public End, its negative input end and outfan short circuit, the outfan of operational amplifier is the outfan of described load current sample circuit；
Described waveform processing circuit is by the 3rd comparator COMP3, the 4th comparator COMP4, two inputs and door AND2, two inputs Or door OR3 is constituted；The positive input termination biasing voltage signal Vref3 of the 3rd comparator COMP3, its negative input termination integrator electricity The outfan on road, its output termination two input and first input end of door AND2；The positive input termination of the 4th comparator COMP4 is long-pending Divide the outfan of device circuit, its negative input termination biasing voltage signal Vref4, its output termination two input or the second of door OR3 Input；Two inputs and the second of door AND2 the input termination pwm signal, its outfan is the first defeated of described waveform processing circuit Go out end；The first input end of two inputs or door OR3 connects pwm signal, and its outfan is the second output of described waveform processing circuit End.
DC-DC converter adaptive dead zone based on zero voltage start-up the most according to claim 1 produces circuit, its feature Be, described integrator circuit by the first resistance R1, the second resistance R2, the first NMOS tube MN1, the second NMOS tube MN2, the 3rd NMOS tube MN3, the first PMOS MP1, the second PMOS MP2, electric capacity C and operational amplifier are constituted；One end of first resistance R1 Connect the outfan of load current detection circuit, its another terminate the drain terminal of the first NMOS tube MN1；One termination the of the second resistance R2 The drain terminal of two PMOS MP2, its other end ground connection；The grid of the first NMOS tube MN1 connects pwm signal, and its source electrode meets the 2nd NMOS The drain terminal of pipe MN2；The grid of the second NMOS tube MN2 meets the output Vc of integral control circuit, and its source electrode connects the negative of operational amplifier Input；The grid of the 3rd NMOS tube MN3 connects pwm signal, its source ground, and its drain electrode connects the positive input terminal of operational amplifier； The grid of the first PMOS MP1 connects pwm signal, and its source electrode connects the outfan of load current detection circuit, and its drain electrode connects computing and puts The positive input terminal of big device；The grid of the second PMOS MP2 connects pwm signal, and its source electrode connects the source electrode of the first NMOS tube MN1, its leakage Pole ground connection；Electric capacity C positive plate connects the negative input end of operational amplifier, and its negative plate connects the output of operational amplifier；Operation amplifier The outfan of device is the outfan of described integrator circuit.
DC-DC converter adaptive dead zone based on zero voltage start-up the most according to claim 2 produces circuit, its feature Be, described integral control circuit by the first comparator COMP1, the second comparator COMP2, phase inverter INV, first liang input or Door OR1, second liang of input or door OR2, two inputs are constituted with door AND1；The positive input termination biased electrical of the first comparator COMP1 Pressure signal Vref1, the outfan of its negative input termination integrator circuit, its first liang of input of output termination or the first of door OR1 Input；The outfan of the positive input termination integrator circuit of the second comparator COMP2；Its negative input termination biasing voltage signal Vref2, its second liang of input of output termination or second input of door OR2；The input termination pwm signal of phase inverter INV, it is defeated Go out termination second liang input or the first input end of door OR2；First liang of input or the second input termination pwm signal of door OR1, its Output connects the first input end of two inputs and door AND1；Output termination two input of second liang of input or door OR2 is with door AND1's Second input；Two inputs and the output Vc that outfan is described Integral Processing circuit of door AND1.
DC-DC converter adaptive dead zone based on zero voltage start-up the most according to claim 3 produces circuit, its feature Being, described bias voltage Vref1, Vref2, Vref3 and Vref4 have following relation, Vref1 > Vref4 > Vref3 > Vref2；And (Vref1-Vref2) > 2 | Vref3-Vref2 | and Vref1 Vref4=Vref3 Vref2；Vref1 Vref4 with The value of Vref3 Vref2 is determined by the size of the output voltage of DC-DC converter, SW point equivalent capacity and integrating capacitor C, It is embodied in the Vref1-Vref4 product with integrating capacitor equal to SW point equivalent capacity and DC-DC converter output voltage Product.
CN201610679742.0A 2016-08-17 2016-08-17 DC-DC converter adaptive dead zone generation circuit based on zero voltage start-up Active CN106253655B (en)

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CN116846196A (en) * 2023-06-05 2023-10-03 广东工业大学 Control circuit applied to high-gain converter
CN116846196B (en) * 2023-06-05 2024-01-05 广东工业大学 Control circuit applied to high-gain converter

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