CN117458871A - Fault diagnosis and fault-tolerant operation control system for three-phase staggered parallel three-level converter - Google Patents
Fault diagnosis and fault-tolerant operation control system for three-phase staggered parallel three-level converter Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
- H02M3/1586—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel switched with a phase shift, i.e. interleaved
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
- H02M1/325—Means for protecting converters other than automatic disconnection with means for allowing continuous operation despite a fault, i.e. fault tolerant converters
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Abstract
The invention relates to a fault diagnosis and fault-tolerant operation control system of a three-phase staggered parallel three-level converter, which collects corresponding inductance current I at the peak moment of triangular carrier signals of 6 switching tube half-bridges of the converter Li If I of converter Li If all the output current sampling points are larger than 0, judging that the converter has no fault or operates in a fault transient state, and judging the position of an open circuit fault through the current slope between the output current sampling points and the falling edge of the driving signal of the main control switching tube; if any I of the converter Li If the voltage is less than 0, determining that the converter enters a fault steady state, and I Li The main control switching tube of the half bridge corresponding to less than 0 has open-circuit fault; after fault positioning, the driving signals of 4 switching tubes corresponding to the phase of the fault half-bridge are locked, the phase shift angle of the rest two-phase carrier signals is reconfigured to be 180 degrees, and the degradation is performed to the two-phase staggered parallel operation. The invention can rapidly locate the open-circuit fault of the converter and perform fault-tolerant operationLines to eliminate the effect of faults.
Description
Technical Field
The invention belongs to the technical field of power electronic converter fault diagnosis and fault tolerance, and particularly relates to a fault diagnosis and fault tolerance operation control system for a three-phase staggered parallel three-level converter.
Background
The energy interaction between the renewable energy power generation and the energy storage system in the direct current micro-grid is completed by a bidirectional DC-DC converter, and in the high-voltage high-power application scene, the multi-phase staggered parallel connection and multi-level technology is applied to the converter so as to improve the performance of electric energy transmission. The three-phase staggered parallel three-level DC-DC converter combines the staggered parallel and multi-level technology, realizes high-power electric energy transmission, ensures energy flow between the renewable energy power generation and the energy storage system, and improves the digestion capacity of the renewable energy power generation system.
Because the DC-DC converter in the energy storage micro-grid bears larger bus voltage and is switched between different operation states at high frequency, higher requirements are put on the switching performance of the power device, and the power switch tube is easier to break down in the high-frequency operation state. It has been found that about 46% of converter faults are caused by switching devices, and that switching device faults include short circuit faults and open circuit faults. The short circuit fault is commonly represented in a common single-inductor type DC-DC converter by rising of an inductor current, and can cause larger impact current in a short time to cause faults of other circuit components. Therefore, the diagnosis of the short-circuit fault is usually integrated in the power switch device module, and the switch tube is fused by the fuse in a high-current state by means of overcurrent detection, so that the branch where the power switch device is located is disconnected, and the short-circuit fault is developed into an open-circuit fault.
The existing open circuit fault diagnosis method for the DC-DC converter power switch device is mainly divided into 3 types: (1) a transducer mathematical model-based diagnostic method; (2) A voltage and current state quantity diagnostic method based on the converter; (3) a data processing method based on data driving. The voltage and current state quantity diagnosis method based on the converter has the advantages of high efficiency and low cost, and is more beneficial to being used in actual engineering, but in the method, the characteristic quantity capable of representing faults is required to be selected independently according to the topological structure of the converter. In a three-phase interleaved parallel three-level DC-DC converter, an open circuit failure of a single switching device does not cause the converter to stop operating, but causes an increase in output voltage ripple, and non-current sharing between phases. Therefore, the open-circuit fault of the switching tube of the three-phase staggered parallel three-level DC-DC converter has a certain concealment. If the open-circuit fault of the switching tube cannot be detected in time, the output power quality is affected by the change of the operation state caused by the open-circuit fault, and the open-circuit fault is unacceptable in an application scenario with high requirements on the output voltage ripple. In addition, due to the requirement of the power transmission continuity of the energy storage system, the research on the fault-tolerant operation method of the DC-DC converter under the fault of the device has important significance. The fault-tolerant operation method of the existing DC-DC converter is concentrated in two directions of fault isolation and redundancy reconstruction, and the three-phase staggered parallel three-level DC-DC converter has the natural advantage of fast fault isolation without adding hardware and can realize degradation operation due to a staggered parallel structure. No research on open-circuit fault detection and fault-tolerant operation methods of three-phase interleaved parallel three-level DC-DC converters is found in the prior literature.
Disclosure of Invention
In order to solve the problems, the invention provides a fault diagnosis and fault-tolerant operation control system of a three-phase staggered parallel three-level converter, which is used for positioning the position of a fault switching tube by sampling inductance current and output current, and providing a fault-tolerant operation scheme after fault diagnosis, so that the converter can still have steady-state operation capability after an open-circuit fault occurs. The method has the advantages of high detection speed, accurate positioning, simple diagnosis flow and the like.
On one hand, the invention provides a fault diagnosis and fault tolerance operation method of a three-phase staggered parallel three-level converter, wherein the converter comprises 6 switching tube half-bridges, and the method comprises the following steps of:
step 1, acquiring corresponding inductive current I at the peak moment of triangular carrier signals of 6 switching tube half-bridges of the converter Li I=1 to 6, and judging the current state of the circuit according to the positive and negative of the inductance current; if I of the converter Li If all the faults are larger than 0, judging that the converter has no faults or operates in a fault transient state; if it isAny one of the converters I Li If the voltage is smaller than 0, judging that the converter enters a fault steady state;
step 2, at the sampled inductor current I Li When all the output current values are larger than 0, judging the position of the open circuit fault through the current slope between the output current sampling points and the falling edge of the driving signal of the main control switching tube; at any inductor current I sampled Li If the number is less than 0, then determining I Li The main control switching tube of the half bridge corresponding to less than 0 has open-circuit fault;
and 3, after fault positioning is completed, locking the driving signals of 4 switching tubes of the corresponding phase of the fault half-bridge, and reconfiguring the phase shift angle of the residual two-phase carrier signals to be 180 degrees, so that the two-phase staggered parallel operation is degraded.
Still further, in said step 2:
at I Li When the current is larger than 0, a sampling PWM signal is constructed, and the output current i is opposite to the rising edge and the falling edge of the sampling PWM signal all Sampling and storing; calculating the output current slope l between two adjacent sampling intervals at the rising edge moment of the sampling PWM signal 1 、l 2 If l 1 ≠l 2 Indicating that the open-circuit fault of the main control switch tube is not detected; if l 1 ＝l 2 And the fault position is between two rising edge sampling moments, and the switching tube driving signal has a switching tube corresponding to high-low level conversion.
Still further, the sampled PWM signal is:
S sample ＝S A1 +S A4 +S B1 +S B4 +S C1 +S C4 -floor(6*D)
wherein S is A1 、S A4 、S B1 、S B4 、S C1 、S C4 The driving signals are respectively A, B, C phase upper and lower bridge arm main control switching tubes, the driving signals are 1 at high level and 0 at low level, D is output duty ratio, and floor function is the minimum integer less than or equal to the appointed expression.
Further, the output current slope l 1 、l 2 Expressed as:
wherein i is all_R (k) An output current sampling value i representing the rising edge time all_R (k-1) represents the output current sampling value at the previous rising edge time, i all_F (k) Representing the output current sample value at the falling edge time intermediate the two rising edge times, Δt 1 Representing the duration from the time of the previous rising edge to the time of the falling edge, Δt 2 Indicating the duration from the falling edge time to the rising edge time.
Further, the step 3 specifically includes:
if the main control switching tube of the upper half bridge arm or the lower half bridge arm of the A phase detects an open circuit fault, driving signals S of the main control switching tube of the upper half bridge arm and the lower half bridge arm of the A phase are generated A1 、S A4 The complementary control signals are set to 0, the phase of the carrier signals of the upper half bridge arm and the lower half bridge arm of the B phase are shifted by 120 degrees on the basis of the original signals, and the phase of the carrier signals of the upper half bridge arm and the lower half bridge arm of the C phase are shifted by 60 degrees on the basis of the original signals;
if the main control switching tube of the upper half bridge arm or the lower half bridge arm of the B phase detects an open circuit fault, driving signals S of the main control switching tube of the upper half bridge arm and the lower half bridge arm of the B phase are generated B1 、S B4 And the complementary control signals are set to 0, carrier signals of an upper half bridge arm and a lower half bridge arm of the A phase are unchanged, and carrier signals of an upper half bridge arm and a lower half bridge arm of the C phase are shifted by 60 degrees on the basis of original signals;
if the main control switching tube of the upper half bridge arm or the lower half bridge arm of the C phase detects an open circuit fault, driving signals S of the main control switching tube of the upper half bridge arm or the lower half bridge arm of the C phase are transmitted to the main control switching tube of the C phase C1 、S C4 And the complementary control signals are 0, the carrier signals of the upper half bridge arm and the lower half bridge arm of the A phase are unchanged, and the carrier signals of the upper half bridge arm and the lower half bridge arm of the B phase are shifted by 300 degrees on the basis of the original signals.
Further, in step 3, to ensure degradation to two-phase interleaved parallel connectionThe output ripple still meets the requirement during operation, and the inductance L of each phase 1 ～L 6 And output capacitance C o The following principles are followed for the selection of parameters:
L i ＝6L i_normal (i＝1～6)
C o ＝3C o_normal
wherein L is i_normal And C o_normal Respectively represent inductance and capacitance parameters which are designed according to the requirements of inductance current ripple and output voltage ripple when the three-phase alternating parallel three-level steady state operation is carried out, namely:
wherein V is in Input voltage f of three-phase staggered parallel three-level DC-DC converter s For switching frequency Δi all_max For maximum output current ripple, deltaV o_max Is the maximum output voltage ripple.
In another aspect, the present invention provides a fault diagnosis and fault tolerant operation control system for a three-phase interleaved parallel three-level converter, where the converter includes 6 switching tube half-bridges, and the system includes:
inductance current acquisition module: for collecting corresponding inductive current I at peak moment of triangular carrier signal of 6 switching tube half-bridges of the converter Li ，i＝1～6；
The current state judging module of the circuit: judging the current state of the circuit according to the positive and negative of the inductance current; if I of the converter Li If all the faults are larger than 0, judging that the converter has no faults or operates in a fault transient state; if any I of the converter Li If the voltage is smaller than 0, judging that the converter enters a fault steady state;
and a fault positioning module: at the sampled inductor current I Li When all the output currents are greater than 0, the current slope between the output current sampling points and the master control switch are used for controlling the output currentsJudging the position of an open circuit fault by the falling edge of the tube driving signal; at any inductor current I sampled Li If the number is less than 0, then determining I Li The main control switching tube of the half bridge corresponding to less than 0 has open-circuit fault;
fault tolerant operation control module: after fault positioning is completed, the driving signals of 4 switching tubes corresponding to the phase of the fault half-bridge are locked, the phase shift angle of the remaining two-phase carrier signals is reconfigured to be 180 degrees, and the two-phase staggered parallel operation is degraded.
Still further, in the fault location module:
at I Li When the current is larger than 0, a sampling PWM signal is constructed, and the output current i is opposite to the rising edge and the falling edge of the sampling PWM signal all Sampling and storing; calculating the output current slope l between two adjacent sampling intervals at the rising edge moment of the sampling PWM signal 1 、l 2 If l 1 ≠l 2 Indicating that the open-circuit fault of the main control switch tube is not detected; if l 1 ＝l 2 And the fault position is between two rising edge sampling moments, and the switching tube driving signal has a switching tube corresponding to high-low level conversion.
Still further, in the fault tolerant operation control module:
if the main control switching tube of the upper half bridge arm or the lower half bridge arm of the A phase detects an open circuit fault, driving signals S of the main control switching tube of the upper half bridge arm and the lower half bridge arm of the A phase are generated A1 、S A4 The complementary control signals are set to 0, the phase of the carrier signals of the upper half bridge arm and the lower half bridge arm of the B phase are shifted by 120 degrees on the basis of the original signals, and the phase of the carrier signals of the upper half bridge arm and the lower half bridge arm of the C phase are shifted by 60 degrees on the basis of the original signals;
if the main control switching tube of the upper half bridge arm or the lower half bridge arm of the B phase detects an open circuit fault, driving signals S of the main control switching tube of the upper half bridge arm and the lower half bridge arm of the B phase are generated B1 、S B4 And the complementary control signals are set to 0, carrier signals of an upper half bridge arm and a lower half bridge arm of the A phase are unchanged, and carrier signals of an upper half bridge arm and a lower half bridge arm of the C phase are shifted by 60 degrees on the basis of original signals;
the main control switch tube of the upper half bridge arm or the lower half bridge arm of the C phase detects an open circuitIf the fault occurs, the driving signal S of the main control switch tube of the upper bridge arm and the lower bridge arm of the C phase is used for C1 、S C4 And the complementary control signals are 0, the carrier signals of the upper half bridge arm and the lower half bridge arm of the A phase are unchanged, and the carrier signals of the upper half bridge arm and the lower half bridge arm of the B phase are shifted by 300 degrees on the basis of the original signals.
Still further, the sampled PWM signal is:
S sample ＝S A1 +S A4 +S B1 +S B4 +S C1 +S C4 -floor(6*D)
wherein S is A1 、S A4 、S B1 、S B4 、S C1 、S C4 The driving signals are respectively A, B, C phase upper and lower bridge arm main control switching tubes, the driving signals are 1 at high level and 0 at low level, D is the output duty ratio, and the floor function is the minimum integer less than or equal to the appointed expression;
The output current slope l 1 、l 2 Expressed as:
wherein i is all_R (k) An output current sampling value i representing the rising edge time all_R (k-1) represents the output current sampling value at the previous rising edge time, i all_F (k) Representing the output current sample value at the falling edge time intermediate the two rising edge times, Δt 1 Representing the duration from the time of the previous rising edge to the time of the falling edge, Δt 2 Indicating the duration from the falling edge time to the rising edge time.
The beneficial technical effects of the invention are as follows: the invention has the advantages that (1) whether the converter enters a fault steady state can be directly judged by detecting whether the average current of the inductance current corresponding to each main control switch tube when the switch tube is closed is smaller than 0; (2) By combining a fault steady-state diagnosis method and a fault transient diagnosis method, the accuracy and the rapidity of the open-circuit fault positioning of the main control switch tube are improved; (3) By locking all driving signals of one phase of the open-circuit fault switching tube and reconfiguring the phase shifting angle, the fault-tolerant running scheme that the three-phase staggered parallel three-level DC-DC converter is degraded into two-phase staggered parallel after the fault is solved.
Description of the drawings
FIG. 1 is a topology of a three-phase interleaved parallel three-level DC-DC converter in accordance with an embodiment of the present invention;
FIG. 2 is a flow chart of the open-circuit fault diagnosis and fault-tolerant operation method of the three-phase staggered parallel three-level DC-DC converter of the invention;
FIG. 3 is an equivalent circuit of a three-phase interleaved parallel three-level DC-DC converter in accordance with an embodiment of the present invention;
FIG. 4 is an equivalent circuit of the upper half three-phase full bridge of a three-phase interleaved parallel three-level DC-DC converter in an embodiment of the invention;
FIG. 5 is a common mode equivalent circuit and a differential mode equivalent circuit of a three-phase interleaved parallel three-level DC-DC converter in an embodiment of the invention;
FIG. 6 is a key waveform for fault-free steady-state operation over a full duty cycle range in an embodiment of the present invention;
FIG. 7 is a fault transient state critical waveform at a duty cycle of 4/6< D <5/6 in an embodiment of the invention;
FIG. 8 is a schematic diagram of a fault half-bridge inductor current loop during one cycle of a fault transient in an embodiment of the present invention;
FIG. 9 is a schematic diagram of a fault half-bridge inductor current loop during a period of a fault steady state condition in accordance with an embodiment of the present invention;
FIG. 10 is a waveform of output current during a fault transient state operation over a full duty cycle range in an embodiment of the present invention;
fig. 11 is a sample PWM signal in an embodiment of the present invention.
Detailed Description
The present invention will be described in detail with reference to the accompanying drawings.
Detailed reasoning analysis methods and exemplary analysis examples are disclosed below. However, the specific reasoning and analysis process details disclosed herein are for purposes of describing exemplary analysis examples only.
It should be understood, however, that the invention is not limited to the particular exemplary embodiments disclosed, but is to cover all modifications, equivalents, and alternatives falling within the scope of the disclosure. Like reference numerals refer to like elements throughout the description of the drawings.
Aiming at the problem that a power switch tube of a three-phase staggered parallel three-level DC-DC converter can still operate in a fault steady state after an open-circuit fault, and the fault switch tube is difficult to position, the invention provides an open-circuit fault diagnosis and fault-tolerant operation method of the three-phase staggered parallel three-level DC-DC converter based on combination of an inductance current sampling signal and an output current slope.
The topology structure of the three-phase staggered parallel three-level converter in the embodiment of the invention is shown in fig. 1, and mainly comprises a switching device S wA1 、S wA2 、S wA3 、S wA4 、S wB1 、S wB2 、S wB3 、S wB4 、S wC1 、S wC2 、S wC3 、S wC4 And its antiparallel diode D A1 、D A2 、D A3 、D A4 、D B1 、D B2 、D B3 、D B4 、D C1 、D C2 、D C3 、D C4 High-voltage side voltage dividing capacitor C b1 、C b2 Low-voltage side stabilizing capacitor C o Inductance L corresponding to 6 switching tube half-bridges 1 ～L 6 . The three-phase staggered parallel three-level DC-DC converter comprises two working modes, namely Buck and Boost, and the embodiment of the invention takes the Buck mode as an example, and the description is that the converter aimed at in the invention works in a high-voltage high-power occasion and works in a current continuous state through reasonable selection of inductance parameters.
The invention is implemented by sampling I at the peak time of carrier Li Judging whether the circuit enters fault steady-state operation or not, and proposing a method for positioning an open-circuit fault switching tube through an output current slope in a fault transient state, wherein the rapidity of the fault transient state diagnosis method and the fault are combinedAccuracy of the steady state diagnostic method. Firstly, the corresponding inductive current I is acquired at the peak moment of the triangular carrier signals of 6 half-bridges of the converter Li (i=1 to 6). If I Li All are greater than 0, the converter is in a fault-free or fault transient state, and the output current slope l between two adjacent sampling intervals calculated by comparing the rising edge moments of the sampling PWM signals 1 、l 2 And judging whether the open circuit faults occur or not, and positioning the fault position through the falling edge of the driving signals of the master control switch tubes. If there is I Li Less than 0, then indicates that the converter has entered a fault steady state, and I Li And the half-bridge master control switching tube corresponding to less than 0 is the open-circuit fault switching tube. After the open fault location is located, the drive signals of all switching tubes of the fault phase are blocked, and the carrier phase shift angles of the remaining two phases are reconfigured, so that the converter is degraded into two-phase staggered parallel operation.
The flow of the method is shown in fig. 2, and comprises the following steps:
step 1: corresponding inductive current I is collected at peak moment of triangular carrier signals of 6 half-bridges of three-phase staggered parallel three-level DC-DC converter Li (i=1 to 6), judging the current state of the circuit according to the positive and negative of the inductance current;
the running state of the circuit can be obtained by collecting the corresponding inductive current I at the peak moment of the triangular carrier signal of the half bridge Li According to the inductance current characteristics of the circuit before and after the fault, defining 3 circuit operation states: and (3) performing fault-free steady-state operation, main control switch tube open-circuit fault transient state operation and main control switch tube open-circuit fault steady-state operation.
1) Fault-free steady state operation:
the same phase of the three-phase staggered parallel three-level DC-DC converter comprises an upper half bridge, a lower half bridge and corresponding inductors, and a controlled voltage source V is adopted for simplifying analysis A1 、V A4 、V B1 、V B4 、V C1 、V C4 A half-bridge of switching tubes is shown, the equivalent circuit of which is shown in fig. 3. According to the circuit operation principle, the controlled voltage is V when the corresponding master control switch tube is opened in And/2, the switch tube is 0 when being turned off,V in is the input voltage. To facilitate analysis of a single inductor current waveform, a virtual voltage source is introduced instead of half of a three-phase full bridge, here with virtual voltage source V GO Instead of the lower half three-phase full bridge, the inductance L is analyzed 1 The equivalent circuit is shown in fig. 4. According to the principle that the current flowing into the output capacitor is equal to the current flowing out, V can be obtained GO Is represented by the expression:
thus inductance L 1 Voltage at two ends U L1 Is V (V) A1 -V GO -U o 2, wherein U o For outputting voltage, the three-phase staggered parallel three-level DC-DC converter works in steady state with U o ＝DV in . To simplify the total output current i all Solving for V A1 、V B1 、V C1 Is decomposed into common-mode voltage source V cm Sum and difference mode voltage source V dm In combination, the equivalent circuit is shown in FIG. 5, in which the common mode voltage V cm ＝(V A1 +V B1 +V C1 ) 3, and output current i all Related, differential mode voltage V dm Only with respect to the circulating current between the inductances, and does not affect the output current. According to FIG. 5, the common mode voltage experienced across a single inductor is V cm -V GO -U o /2, total output current i all Common mode component i for a single inductor current Lcm Three times i all ＝3i Lcm 。
According to the operation characteristics of the three-phase staggered parallel three-level converter, the converter switching tube S wA1 、S wA4 、S wB1 、S wB4 、S wC1 、S wC4 The duty ratio D of (C) is divided into 0-1/6, 1/6-2/6, 2/6-3/6, 3/6-4/6, 4/6-5/6 and 5/6-1 in 0-1, and key waveforms under each duty ratio range are independently analyzed, and are shown in figure 6. From FIG. 6, L can be calculated 1 Is of the inductance current i of (2) L1 And output current i all The expression in one switching period is as follows, wherein I 0 And I all Respectively representing the inductor current i at the beginning of a cycle L1 And output current i all Is set to be a constant value.
a)0<D<1/6
b)1/6<D<2/6
c)2/6<D<3/6
d)3/6<D<4/6
/>
e)4/6<D<5/6
/>
f)5/6<D<1
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According to the inductor current output current waveforms in different duty cycle ranges, the following characteristics can be summarized: in one switching cycle, the inductor current i L1 The characteristics of single frequency multiplication fluctuation are presented; due to V GO Is present in a single switching period i L1 The waveform is divided into 12 sections, and the current rising peak value corresponds to the switch tube S WA1 Switching from the on state to the off state. In one switching cycle, the current i is output all Exhibiting 6 times frequency fluctuation characteristics; i within a single switching period all The waveform is also divided into 12 segments, but can be described in more detail as 2-segment fluctuations within 1/6 period.
According to the principle of generating duty ratio by triangular carrier, the peak time of A-phase carrier is correspondent to switch tube S WA1 The intermediate moment between the falling edge of the driving signal and the next rising edge, i.e. the inductor current i L1 Current I falling from peak value to initial time 0 Is a medium time of the time frame. Thus, it can be approximately considered that at the a-phase carrier peak time i L1 Is the inductance current i L1 Mean value I of (2) L1 . The invention aims at a high-power three-phase staggered parallel three-level DC-DC converter which works in an inductance current continuous conduction state, so that I is provided L1 >I 0 >0. According to the principle that three-phase interleaving parallel three-level converters are interleaved with each other, B, C inductance current i of two phases at carrier peak time L2 、i L3 The sampling values are all current mean value I L2 、I L3 And are all greater than 0 in steady state operating conditions.
2) Main control switch tube open-circuit fault transient operation:
defining corresponding inductance current i after open-circuit fault of main control switching tube of three-phase staggered parallel three-level DC-DC converter Li The period of time that begins to fall but does not fall to a negative value is the converter open fault transient operating state.
The rationality of defining the open-circuit fault transient state operation state of the master switch tube is analyzed in detail as follows:
combining V in different duty cycle ranges in the non-faulty steady state operation of FIG. 6 GO Waveform, virtual voltage source V can be obtained GO In a switching period T s Periodic average of (a):
in the above-mentioned method, the step of,is the period average value of the variable, t 0 At the beginning of a cycle, due to V in normal steady state operation GO With and without V at full range duty cycle in /12 and-V in Two voltage classes, T 1 And T 2 Respectively represent V in /12 and-V in And/12 for a period of time in one cycle. As can be seen from FIG. 6, T 1 ＝T 2 Thus->Furthermore, it is apparent that a controlled voltage source V is available A1 、V A4 、V B1 、V B4 、V C1 、V C4 The cycle average of (a) is as follows:
Thus the upper half three-phase full bridge inductance current i L1 、i L2 、i L3 And lower half three-phase full-bridge inductance current i L4 、i L5 、i L6 Current increment Δi in one switching cycle L1 ～Δi L6 The method comprises the following steps of:
Δi L2 ＝Δi L3 ＝0
Δi L5 ＝Δi L6 ＝0
according to the above formula, all inductor current increment in one switching period is 0, which accords with the inductor volt-second balance principle in steady state operation. If an open-circuit fault occurs in the upper half three-phase full bridge, the original circuit balance is broken, and the current increment of each inductance current in one period is no longer 0. At a duty cycle of 2/3<D<5/6, master control switch tube S WA1 For example, the open circuit fault occurs, the characteristics under the transient fault are analyzed, and the key waveforms are shown in fig. 7.
According to FIG. 7S WA1 After an open circuit fault, the voltage source V is controlled A1 Equivalent to remaining at 0 for one switching period, the remaining controlled voltage source waveform remains unchanged, so its period average is as follows:
virtual voltage source V in fault condition GO_fault In a switching period T s The period average value of (a) is:
according to the above, the inductance current increment delta i of the upper half and the lower half three-phase full bridge in one period under the fault transient state can be obtained L1_fault 、Δi L2_fault 、Δi L3_fault 、Δi L4_fault 、Δi L5_fault 、Δi L6_fault ：
According to the increment Deltai of the inductance current Li_fault The expression (i=1-6) shows that after the open circuit fault of the main control switching tube of the upper half bridge arm of the phase A, the corresponding inductive current starts to decrease, and the inductive current of the other two phases of the upper half three-phase full bridge increases in the same increment; while the three-phase inductor current increment of the lower half three-phase full bridge is reduced by the same increment, but due to delta i L1_fault ＝5Δi L4_fault Therefore, the speed of the reduction of the inductance current of the lower half part is far smaller than that of the inductance current of the A phase of the upper half bridge arm, and the rest inductance currents are all larger than 0 when the inductance current of the A phase of the fault half bridge is reduced to 0.
The characteristics are not limited to the duty ratio in a certain specific range, and the characteristics are generalized to be applicable in any range of 0-1 when the output duty ratio D is applied, and the inductance current characteristics summarizing fault transient states are as follows: after a half bridge has open-circuit fault of a main control switching tube, the main control switching tube corresponds to the inductive current i Li Rapidly decreasing, the inductance current of the other two phases of the full bridge which is in the same three-phase full bridge is increased, and the inductance current of the other half three-phase full bridge corresponding to the fault half bridge is decreased, but the decreasing speed is smaller than the fault inductance current i Li At i Li When the current is reduced to 0 time, the other inductance currents can be ensured to be larger than 0.
FIG. 8 gives S from the point of view of the equivalent circuit WA1 Circuit operating conditions in the event of a fault transient. S is S WA1 An open circuit failure occurs, corresponding to the absence of S in one switching cycle WA1 conduction-L by power supply 1 Charging, inductor current i L1 In the rising phase, the inductor current i in one switching period after the fault L1 All through anti-parallel diode D A2 Discharging, inductance current i L1 Continuously decreasing. Due to the inductance L before failure 1 Store energy in the charge and discharge process, at S WA1 Inductance L for a period of time after failure 1 Are all in a discharge state until i L1 Reduce to 0, inductance L 1 And after the stored energy is released, ending the fault transient stage.
According to the operation characteristics of fault transient state of the three-phase staggered parallel three-level DC-DC converter, sampling corresponding inductive current i at carrier peak values of 6 half-bridges Li All i can still be guaranteed Li Greater than 0.
3) Main control switch tube open-circuit fault steady-state operation:
still with S WA1 And analyzing the circuit state of the open-circuit fault steady-state operation of the main control switch tube by taking the open-circuit fault as an example. The state of the inductive current of the circuit is as follows after the transient operation stage of the open-circuit fault of the main control switch tube:
in the next cycle of operation of the fault transient (in S WA1 The rising edge of the driving signal is the starting time), at S WA1 When the driving signal of (2) is high level, S WA1 Open circuit, inductance L 1 After the release of the stored energy, the current i L1 Kept at 0; at S WA1 When the driving signal of (2) is low, another switching tube S of the fault half-bridge WA2 The driving signal of (1) is high level, and the inductance L 1 Voltage at two ends of 0,S WA2 Is subjected to load U o 2 and virtual voltage source V GO The forward voltage meets the on condition. Therefore S WA1 When the driving signal of (1) is low level, inductance L 1 Inductance V with load, virtual voltage source GO Form a loop, inductance L 1 Is charged reversely, i L1 Decreasing from 0 to a negative peak. Inductance L 1 The voltage applied across the terminals at this stage is-V GO -U o 2, S in steady state operation without failure WA1 At both ends when turned offVoltage is uniform, so i L1 In a fault steady state, i L1 At S WA1 The waveform change trend when the driving signal is at low level is consistent with the normal state, and is different from i in the fault steady state L1 From 0, and from the peak inductor current in the normal state.
When S is WA1 After the driving signal of (1) is changed from low level to high level, S WA2 Closing, inductor current i L1 Is not mutated in the direction by S WA1 Is directed to the input capacitance C b1 . Inductance L 1 The voltage applied at this stage is V in /2-V GO -U o 2, S in steady state operation without failure WA1 The voltages at the two ends are consistent when the switch is turned on, so i L1 In a fault steady state, i L1 At S WA1 The waveform change trend when the driving signal is at high level is consistent with the normal state, and is different from i in the fault steady state L1 Increase from negative peak value, from inductance current start value I in normal state all And starts to increase. The circuit state in the fault steady state is shown in fig. 9.
From the above analysis, the inductance L in the fault steady state 1 The voltage applied to the two ends is consistent with that in the fault-free state, so i L1 The waveform shape of (2) is the same as that in the no-fault state, except i in the fault steady state L1 Decreasing from 0 to a negative peak and gradually increasing to 0. Due to L 1 The voltage born by the two ends is consistent with the voltage in the fault-free state, and the voltage of the other inductors in the fault state is necessarily consistent with the voltage in the fault-free state, so i Li The waveform of (2) also corresponds to the fault-free state, the difference being the periodic initial current I all Changes according to i in the fault transient analysis L1 The remaining inductor current i when falling to 0 Li (i=2-6) is larger than 0, and can ensure i under fault steady state Li (i=2 to 6) is also greater than 0.
Therefore, the peak time of the A-phase carrier corresponds to the inductance current i L1 The intermediate moment from 0 to negative peak value can be approximately considered as the peak value moment i of A-phase carrier wave in fault steady state L1 Is the inductance current i L1 Is reversed in the direction of (2)Mean value I L1_N <0. While the remaining half-bridge carrier signal peak time i Li The sampled values of (i=2 to 6) are still the current average I Li (i=2 to 6), and has I Li Greater than 0.
In summary, in the fault steady state, the corresponding inductor current i is performed at the peak time of each half-bridge carrier signal Li (i=1-6) sampling, and only half-bridge inductance current i in the steady state operation of main control switch tube open circuit fault Li The sample value is negative and the remaining sample values are positive.
It should be noted that, from the end of the fault transient to the complete entry into the fault steady state, a state is experienced in which there is a distortion in the fault inductor current waveform due to the process of dropping the output voltage to recover after the fault, which still satisfies i Li The carrier peak time samples a negative characteristic, thus dividing this phase into a fault steady-state phase as well.
Combining the analysis of the three states of the non-fault steady-state operation, the main control switch tube open-circuit fault transient operation and the main control switch tube open-circuit fault steady-state operation, and sampling the inductance current I at the peak time of the half-bridge carrier wave Li (i=1-6) is greater than 0 in the fault-free steady state operation and the open fault transient state operation state of the main control switch tube, and the fault half bridge corresponds to I in the open fault steady state operation of the main control switch tube Li Less than 0, the rest of sampling values I Li Greater than 0.
Step 2: for sampled inductor current I Li If the current slopes between the output current sampling points and the falling edge of the driving signal of the main control switching tube are all larger than 0, judging the position of the open circuit fault; for any inductor current I sampled Li If the number is smaller than 0, determining I Li And the main control switching tube of the half bridge corresponding to less than 0 has open-circuit fault.
1) For sampled inductor current I Li All greater than 0
At I Li When all the faults are larger than 0, the three-phase staggered parallel three-level DC-DC converter is in fault-free steady state operation or in fault transient state operation, so that an open circuit fault diagnosis method is designed according to the fault steady state operation, and the open circuit fault diagnosis method is characterized in that Li When greater than 0 comesWhether the circuit has an open circuit fault or not is distinguished, the circuit can be prevented from developing into a fault steady state, and the fault diagnosis speed is improved.
The characteristic quantity used for distinguishing between fault-free steady-state operation and fault transient operation is the output current i all FIG. 6 shows the output current i in fault-free steady state operation all In S WA1 For example, when an open circuit fault occurs, the output current i in each duty cycle range in the fault transient state all_fault And other key waveforms are shown in fig. 10. From FIG. 10, the output current i can be calculated all_fault The expression in one switching period is as follows, wherein I all_fault Output current i at the beginning of a cycle all_fault Is set to be a constant value.
a)0<D<1/6
b)1/6<D<2/6
c)2/6<D<3/6
d)3/6<D<4/6
e)4/6<D<5/6
f)5/6<D<1
As can be seen by comparing the waveforms of the output currents in fig. 6 and 10, the output current i in one switching cycle in the no fault state all The waveform is divided into 12 segments, which can be described in more detail as 2 segments of fluctuations in 1/6 period; in one period of fault transient, output current i all_fault The waveform is divided into 11 segments, and can be described as monotonically decreasing without ripple in 1/6 period of the transition of the fault switch tube driving signal from high level to low level, and 2 segments of ripple in the remaining 1/6 period.
Output current i in 1/6 period of switching from high level to low level according to fault switch tube driving signal in fault transient state all_fault The method has the characteristics of no fluctuation, namely unchanged slope, and can position the switching tube with open-circuit fault only by detecting the slope of the output current in each 1/6 period time and combining whether the driving signals of the main control switching tube are changed in the starting and ending states of the 1/6 period. In order to simplify the slope detection procedure, only the output current i at the start time, the peak time and the end time of 1/6 period is recorded all The slopes of the two ends in 1/6 period can be calculated respectively.
Thus, in particular, at I Li When the current is larger than 0, a sampling PWM signal is constructed, and the output current i is measured on the rising edge and the falling edge of the sampling PWM signal all Sampling and storing;
the sampled PWM signal is as follows:
S sample ＝S A1 +S A4 +S B1 +S B4 +S C1 +S C4 -floor(6*D)
wherein S is A1 、S A4 、S B1 、S B4 、S C1 、S C4 A, B, C upper and lower bridge arm master control switch tube S wA1 、S wA4 、S wB1 、S wB4 、S wC1 、S wC4 Is 1 at a high level, is 0 at a low level, d is an output duty ratio, and the floor function is a minimum integer less than or equal to a specified expression.
Due to S in the full duty cycle range A1 And S is A4 、S B1 And S is B4 S and S C1 And S is C4 Rising edge interval T of (2) s 2, S A1 、S B1 、S C1 Rising edge interval T of (2) s And 3, on the premise of not counting the sequence, equally dividing one switching period into 6 sections, wherein the starting moment of each section necessarily corresponds to the rising edge of one driving signal. Similarly, every T s Inside/6 there must be a falling edge of a certain drive signal, which corresponds exactly to the moment in 1/6 period when the slope of the output current changes. Taking into account S A1 、S A4 、S B1 、S B4 、S C1 、S C4 Is characterized by S A1 +S A4 +S B1 +S B4 +S C1 +S C4 Floor (6*D) can be constructed as a single piece at T s A rising edge occurs at the start time and a sampling PWM signal occurs at the falling edge time when the slope of the output current changes, as shown in fig. 11. At sampling PWM signal S sample Sampling the output current i when a rising edge occurs all_R (k) And is stored in the sampling PWM signal S sample Sampling the output current i when a falling edge occurs all_F (k) And stored.
Calculating the output current slope l between two adjacent sampling intervals at the rising edge moment of the sampling PWM signal 1 、l 2 ：
Wherein i is all_R (k) An output current sampling value i representing the rising edge time all_R (k-1) represents the output current sampling value at the previous rising edge time, i all_F (k) Representing the output current sample value at the falling edge time intermediate the two rising edge times, Δt 1 Representing the duration from the time of the previous rising edge to the time of the falling edge, Δt 2 Indicating the duration from the falling edge time to the rising edge time.
The process of calculating the slope is triggered at the rising edge of each sampled PWM signal by the inductor current sample i at this time all_R (k) Output current sampling value i at the previous rising edge time all_R (k-1) and the output current sampling value i at the time of the falling edge all_F (k) Calculating slope l 1 ，l 2 Through l 1 ，l 2 Judging whether the output currents i are equal all At the T s Whether there is a surge in the/6 section.
If l 1 ≠l 2 Indicating that the open-circuit fault of the main control switch tube is not detected; if l 1 ＝l 2 And the fault position is between two rising edge sampling moments, and the switching tube corresponding to the high-low level conversion of the switching tube driving signal is in the open circuit fault.
At each sampling PWM signal S sample Is triggered to detect S at the same time as rising edge of (A) A1 、S A4 、S B1 、S B4 、S C1 、S C4 At the T s And/6, detecting S sample The driving signal is at low level at the rising edge time and the last sampling value is at high level, so that the corresponding switching tube driving signal is converted at high and low levels; if meeting l 1 ＝l 2 On the premise of the above, the switching tube is a switching tube with open-circuit fault if the driving signal of the switching tube is converted into high and low levels.
2) For any inductor current I sampled Li Less than 0
After the main control switching tube of the three-phase staggered parallel three-level DC-DC converter has an open-circuit fault, the duration of the fault transient is related to the energy storage energy of the inductor in a fault-free state, when the inductance parameter is large, the energy release time of the inductor corresponding to the fault half-bridge is long, the corresponding fault transient time is correspondingly long, and the fault switching tube can be positioned before entering a fault steady state through the step 2. However, in practical use, the inductance parameter selection must consider multiple factors, so that the inductance discharge time may be short, and the fault transient diagnosis method cannot position the fault switching tube within the effective fault transient time. Therefore, after the fault steady state is entered, a simpler and more reliable method is adopted to position the fault switching tube.
From the above analysis, I Li The occurrence of a negative value indicates the entry into a fault steady state condition in which the corresponding inductor current i is carried out at the moment of peak of the carrier signal of each half-bridge Li (i=1-6) sampling half-bridge inductor current i with and without master switch tube open fault Li The sample value is negative and the rest of the sample values are positive, thus I Li And the half-bridge master control switching tube corresponding to less than 0 has open-circuit fault.
Step 3; and (3) after fault positioning is completed according to the step (2), locking driving signals of 4 switching tubes of the corresponding phase of the fault half-bridge, and reconfiguring the phase shift angle of the residual two-phase carrier signals to be 180 degrees, so that the two-phase staggered parallel operation is degraded.
If the main control switching tube of the upper half bridge arm or the lower half bridge arm of the A phase detects an open circuit fault, S is set as A1 、S A4 The complementary control signals are set to 0, the phase of the carrier signals of the upper half bridge arm and the lower half bridge arm of the B phase are shifted by 120 degrees on the basis of the original signals, and the phase of the carrier signals of the upper half bridge arm and the lower half bridge arm of the C phase are shifted by 60 degrees on the basis of the original signals;
if the main control switching tube of the upper half bridge arm or the lower half bridge arm of the B phase detects an open circuit fault, S is set as B1 、S B4 And the complementary control signals are set to 0, carrier signals of an upper half bridge arm and a lower half bridge arm of the A phase are unchanged, and carrier signals of an upper half bridge arm and a lower half bridge arm of the C phase are shifted by 60 degrees on the basis of original signals;
if the main control switching tube of the upper half bridge arm or the lower half bridge arm of the C phase detects an open circuit fault, S is carried out C1 、S C4 And the complementary control signals are 0, the carrier signals of the upper half bridge arm and the lower half bridge arm of the A phase are unchanged, and the carrier signals of the upper half bridge arm and the lower half bridge arm of the B phase are shifted by 300 degrees on the basis of the original signals.
The three signal phase shifting schemes can ensure that after the open circuit fault of the switching tube occurs in any one phase, the rest two phases are degenerated into two-phase staggered parallel operation, but consider the output lines of the two-phase staggered parallel operation and the three-phase staggered parallel operation Wave differences, inductance (L) 1 ～L 6 ) And output capacitance C o Is a parameter selection problem. The following is a design of how the parameters of the inductance and the output capacitance are selected.
The output current ripple of the three-phase staggered parallel three-level DC-DC converter is as follows:
wherein V is in Input voltage f of three-phase staggered parallel three-level DC-DC converter s Is the switching frequency. According to the above, the maximum output current ripple is:
in order to meet the ripple condition of the output current, the inductor L is used for steady operation of three levels in three-phase staggered parallel connection i_normal The design principle of (2) is as follows:
wherein Δi all_max Is the maximum output current ripple.
Assuming that the load current is constant at I o Then output the capacitance current i c The expression of (2) is:
i c ＝i all -I o
when the total input current i all Greater than I o The output capacitor is charged when the total output current i all Less than I o At this time, the output capacitance discharges. Due to the output current i all Frequency multiplication fluctuation is 6 in one switching period, and the charging and discharging time of the capacitor is T s The same in/6, i.e. both charging and discharging processes are T s /12. Therefore, the output voltage peak-to-peak value is:
the output voltage ripple can be obtained by substituting the output current ripple expression into the output current ripple expression:
according to the above, the maximum output voltage ripple is:
To meet the output voltage ripple condition, the three-phase staggered parallel three-level steady-state operation inductor C o_normal The design principle of (2) is as follows:
wherein DeltaV o_max Is the maximum output voltage ripple.
The output current ripple of the two-phase staggered parallel three-level DC-DC converter is analyzed by the same method, and the maximum output current ripple and the maximum output voltage ripple under the condition of two-phase staggered parallel connection can be obtained:
under the condition that the inductance is the same, the maximum output current ripple under the working condition of two-phase staggered parallel operation is 6 times of that of three-phase staggered parallel operation; under the condition that the capacitance is the same, the maximum output voltage ripple under the working condition of two-phase staggered parallel operation is 18 times of that of three-phase staggered parallel operation. Thus without changing the switching frequency f s On the premise of the three-phase staggered parallel steady-state running, the inductance L is designed according to the current ripple requirement inormal And output capacitance C o_normal At the same time, in order to meet the ripple requirement of the two-phase staggered parallel connection, the inductance (L 1 ～L 6 ) And output capacitance C o The following principles are followed for the selection of parameters:
L i ＝6L i_normal (i＝1～6)
C o ＝3C o_normal
the open-circuit fault diagnosis and fault-tolerant operation method for the three-phase staggered parallel three-level DC-DC converter has the main advantages that whether a circuit enters a fault steady state or not is judged by positive and negative of an inductance current sampling value at a specific moment, and a fault detection flow is simple and reliable; distinguishing a fault-free state and a fault transient state of the circuit through an output current slope, and positioning a fault switch tube in a fault transient period by combining a falling edge of a switch tube driving signal; the fault diagnosis method combines the current characteristics of fault transient state and fault steady state, and combines the rapidity and the accuracy; and after the fault switching tube is positioned, degrading the three-phase staggered parallel three-level DC-DC converter into two-phase staggered parallel connection, and realizing fault-tolerant operation.
In another embodiment of the present invention, for the above method, an open-circuit fault diagnosis and fault-tolerant operation control system for a three-phase interleaved parallel three-level DC-DC converter is provided, including:
inductance current acquisition module: for collecting corresponding inductive current I at peak moment of triangular carrier signal of 6 switching tube half-bridges of converter Li ，i＝1～6；
The current state judging module of the circuit: judging the current state of the circuit according to the positive and negative of the inductance current; if I of converter Li If all the faults are larger than 0, judging that the converter has no fault or operates in a fault transient state; if any I of the converter Li If the voltage is smaller than 0, judging that the converter enters a fault steady state;
and a fault positioning module: at the sampled inductor current I Li When all the output current values are larger than 0, judging the position of the open circuit fault through the current slope between the output current sampling points and the falling edge of the driving signal of the main control switching tube; at any inductor current I sampled Li If the number is less than 0, then determining I Li The main control switching tube of the half bridge corresponding to less than 0 has open-circuit fault;
fault tolerant operation control module: after fault positioning is completed, the driving signals of 4 switching tubes corresponding to the phase of the fault half-bridge are locked, the phase shift angle of the remaining two-phase carrier signals is reconfigured to be 180 degrees, and the two-phase staggered parallel operation is degraded.
The control system according to the embodiment of the invention can implement any step of the above method.
It should be noted that the above-mentioned embodiments are only preferred embodiments of the present invention, and should not be construed as limiting the scope of the present invention, and any minor changes and modifications made to the present invention without departing from the spirit of the present invention are all within the scope of the present invention.
Claims (10)
1. The fault diagnosis and fault tolerance operation method of the three-phase staggered parallel three-level converter is characterized by comprising the following steps of:
step 1, acquiring corresponding inductive current I at the peak moment of triangular carrier signals of 6 switching tube half-bridges of the converter Li I=1 to 6, and judging the current state of the circuit according to the positive and negative of the inductance current; if I of the converter Li If all the faults are larger than 0, judging that the converter has no faults or operates in a fault transient state; if any I of the converter Li If the voltage is smaller than 0, judging that the converter enters a fault steady state;
step 2, at the sampled inductor current I Li When all the output current values are larger than 0, judging the position of the open circuit fault through the current slope between the output current sampling points and the falling edge of the driving signal of the main control switching tube; at any inductor current I sampled Li If the number is less than 0, then determining I Li The main control switching tube of the half bridge corresponding to less than 0 has open-circuit fault;
and 3, after fault positioning is completed, locking the driving signals of 4 switching tubes of the corresponding phase of the fault half-bridge, and reconfiguring the phase shift angle of the residual two-phase carrier signals to be 180 degrees, so that the two-phase staggered parallel operation is degraded.
2. The fault diagnosis and fault tolerant operation method of a three-phase interleaved parallel three-level converter according to claim 1 wherein in said step 2:
at I Li When the current is larger than 0, a sampling PWM signal is constructed, and the output current i is opposite to the rising edge and the falling edge of the sampling PWM signal all Sampling and storing; calculating the output current slope l between two adjacent sampling intervals at the rising edge moment of the sampling PWM signal 1 、l 2 If l 1 ≠l 2 Indicating that the open-circuit fault of the main control switch tube is not detected; if l 1 ＝l 2 And the fault position is between two rising edge sampling moments, and the switching tube driving signal has a switching tube corresponding to high-low level conversion.
3. The fault diagnosis and fault tolerant operation method of a three-phase interleaved parallel three-level converter according to claim 2 wherein the sampled PWM signal is:
S sample ＝S A1 +S A4 +S B1 +S B4 +S C1 +S C4 -floor(6*D)
Wherein S is A1 、S A4 、S B1 、S B4 、S C1 、S C4 The driving signals are respectively A, B, C phase upper and lower bridge arm main control switching tubes, the driving signals are 1 at high level and 0 at low level, D is output duty ratio, and floor function is the minimum integer less than or equal to the appointed expression.
4. The method for fault diagnosis and fault tolerant operation of a three-phase interleaved parallel three-level converter according to claim 2 wherein the output current slope l 1 、l 2 Expressed as:
wherein i is all_R (k) An output current sampling value i representing the rising edge time all_R (k-1) represents the output current sampling value at the previous rising edge time, i all_F (k) Representing the output current sample value at the falling edge time intermediate the two rising edge times, Δt 1 Representing the duration from the time of the previous rising edge to the time of the falling edge, Δt 2 Indicating the duration from the falling edge time to the rising edge time.
5. The fault diagnosis and fault tolerant operation method of a three-phase interleaved parallel three-level converter according to any one of claims 1 to 4, wherein the step 3 specifically comprises:
if the main control switching tube of the upper half bridge arm or the lower half bridge arm of the A phase detects an open circuit fault, driving signals S of the main control switching tube of the upper half bridge arm and the lower half bridge arm of the A phase are generated A1 、S A4 The complementary control signals are set to 0, the phase of the carrier signals of the upper half bridge arm and the lower half bridge arm of the B phase are shifted by 120 degrees on the basis of the original signals, and the phase of the carrier signals of the upper half bridge arm and the lower half bridge arm of the C phase are shifted by 60 degrees on the basis of the original signals;
If the main control switching tube of the upper half bridge arm or the lower half bridge arm of the B phase detects an open circuit fault, driving signals S of the main control switching tube of the upper half bridge arm and the lower half bridge arm of the B phase are generated B1 、S B4 And the complementary control signals are set to 0, carrier signals of an upper half bridge arm and a lower half bridge arm of the A phase are unchanged, and carrier signals of an upper half bridge arm and a lower half bridge arm of the C phase are shifted by 60 degrees on the basis of original signals;
if the main control switching tube of the upper half bridge arm or the lower half bridge arm of the C phase detects an open circuit fault, driving signals S of the main control switching tube of the upper half bridge arm or the lower half bridge arm of the C phase are transmitted to the main control switching tube of the C phase C1 、S C4 And the complementary control signals are 0, the carrier signals of the upper half bridge arm and the lower half bridge arm of the A phase are unchanged, and the carrier signals of the upper half bridge arm and the lower half bridge arm of the B phase are shifted by 300 degrees on the basis of the original signals.
6. Fault diagnosis of three-phase interleaved parallel three-level converter according to claim 1The fault-tolerant operation method is characterized in that in the step 3, in order to ensure that the output ripple still meets the requirement when the degradation is two-phase staggered parallel operation, the inductance L of each phase 1 ～L 6 And output capacitance C o The following principles are followed for the selection of parameters:
L i ＝6L i_normal (i＝1～6)
C o ＝3C o_normal
wherein L is i_normal And C o_normal Respectively represent inductance and capacitance parameters which are designed according to the requirements of inductance current ripple and output voltage ripple when the three-phase alternating parallel three-level steady state operation is carried out, namely:
Wherein V is in Input voltage f of three-phase staggered parallel three-level DC-DC converter s For switching frequency Δi all_max For maximum output current ripple, deltaV o_max Is the maximum output voltage ripple.
7. A fault diagnosis and fault tolerant operation control system for a three-phase interleaved parallel three-level converter, comprising:
inductance current acquisition module: for collecting corresponding inductive current I at peak moment of triangular carrier signal of 6 switching tube half-bridges of the converter Li ，i＝1～6；
The current state judging module of the circuit: judging the current state of the circuit according to the positive and negative of the inductance current; if I of the converter Li If all the faults are larger than 0, judging that the converter has no faults or operates in a fault transient state; if any I of the converter Li If the voltage is smaller than 0, judging that the converter enters a fault steady state;
and a fault positioning module: at the sampled inductor current I Li When all the output current values are larger than 0, judging the position of the open circuit fault through the current slope between the output current sampling points and the falling edge of the driving signal of the main control switching tube; at any inductor current I sampled Li If the number is less than 0, then determining I Li The main control switching tube of the half bridge corresponding to less than 0 has open-circuit fault;
fault tolerant operation control module: after fault positioning is completed, the driving signals of 4 switching tubes corresponding to the phase of the fault half-bridge are locked, the phase shift angle of the remaining two-phase carrier signals is reconfigured to be 180 degrees, and the two-phase staggered parallel operation is degraded.
8. The fault diagnosis and fault tolerant operation control system of a three-phase interleaved parallel three-level converter according to claim 7 wherein in said fault locating module:
at I Li When the current is larger than 0, a sampling PWM signal is constructed, and the output current i is opposite to the rising edge and the falling edge of the sampling PWM signal all Sampling and storing; calculating the output current slope l between two adjacent sampling intervals at the rising edge moment of the sampling PWM signal 1 、l 2 If l 1 ≠l 2 Indicating that the open-circuit fault of the main control switch tube is not detected; if l 1 ＝l 2 And the fault position is between two rising edge sampling moments, and the switching tube driving signal has a switching tube corresponding to high-low level conversion.
9. The fault diagnosis and fault tolerant operation control system for a three-phase interleaved parallel three-level converter according to claim 7 wherein in said fault tolerant operation control module:
if the main control switching tube of the upper half bridge arm or the lower half bridge arm of the A phase detects an open circuit fault, driving signals S of the main control switching tube of the upper half bridge arm and the lower half bridge arm of the A phase are generated A1 、S A4 The complementary control signals are set to 0, the carrier signals of the upper half bridge arm and the lower half bridge arm of the B phase are shifted by 120 DEG on the basis of the original signals, and the carrier signals of the upper half bridge arm and the lower half bridge arm of the C phase are set to the original signals Shifting the phase by 60 degrees on the basis;
if the main control switching tube of the upper half bridge arm or the lower half bridge arm of the B phase detects an open circuit fault, driving signals S of the main control switching tube of the upper half bridge arm and the lower half bridge arm of the B phase are generated B1 、S B4 And the complementary control signals are set to 0, carrier signals of an upper half bridge arm and a lower half bridge arm of the A phase are unchanged, and carrier signals of an upper half bridge arm and a lower half bridge arm of the C phase are shifted by 60 degrees on the basis of original signals;
if the main control switching tube of the upper half bridge arm or the lower half bridge arm of the C phase detects an open circuit fault, driving signals S of the main control switching tube of the upper half bridge arm or the lower half bridge arm of the C phase are transmitted to the main control switching tube of the C phase C1 、S C4 And the complementary control signals are 0, the carrier signals of the upper half bridge arm and the lower half bridge arm of the A phase are unchanged, and the carrier signals of the upper half bridge arm and the lower half bridge arm of the B phase are shifted by 300 degrees on the basis of the original signals.
10. The fault diagnosis and fault tolerant operation control system of claim 8, wherein said sampled PWM signal is:
S sample ＝S A1 +S A4 +S B1 +S B4 +S C1 +S C4 -floor(6*D)
wherein S is A1 、S A4 、S B1 、S B4 、S C1 、S C4 The driving signals are respectively A, B, C phase upper and lower bridge arm main control switching tubes, the driving signals are 1 at high level and 0 at low level, D is the output duty ratio, and the floor function is the minimum integer less than or equal to the appointed expression;
the output current slope l 1 、l 2 Expressed as:
wherein i is all_R (k) Indicating the rise Sampling value of output current along time, i all_R (k-1) represents the output current sampling value at the previous rising edge time, i all_F (k) Representing the output current sample value at the falling edge time intermediate the two rising edge times, Δt 1 Representing the duration from the time of the previous rising edge to the time of the falling edge, Δt 2 Indicating the duration from the falling edge time to the rising edge time.
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| CN117783929B (en) * | 2024-02-26 | 2024-05-03 | 西北工业大学 | Switching tube fault diagnosis method of direct current converter |
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