CN106229399A - A kind of III nitride semiconductor photogenerator patterned substrate and preparation method thereof - Google Patents
A kind of III nitride semiconductor photogenerator patterned substrate and preparation method thereof Download PDFInfo
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- CN106229399A CN106229399A CN201610673503.4A CN201610673503A CN106229399A CN 106229399 A CN106229399 A CN 106229399A CN 201610673503 A CN201610673503 A CN 201610673503A CN 106229399 A CN106229399 A CN 106229399A
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- litho pattern
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
Abstract
The invention belongs to technical field of semiconductor, specifically a kind of III nitride semiconductor photogenerator patterned substrate and preparation method thereof, substrate surface etches convex pattern as much as possible, figure can be gengon, the sidewall of gengon forms notch cuttype, and notch cuttype sidewall has side wall surface as much as possible.The preparation method of described III nitride semiconductor photogenerator patterned substrate, the convex pattern of substrate surface is made through repeatedly photoetching and etching technics, specifically includes the first stage forming litho pattern for the first time on substrate；Formed on the substrate of the first litho pattern, the second stage of the second litho pattern of formation and the first litho pattern partial stack；The phase III of the substrate etch molding of the first litho pattern and the second litho pattern will be formed.The present invention forms notch cuttype sidewall to improve substrate surface sidewall density, guarantees gradient to greatest extent；Use repeatedly photoetching and lithographic technique, with improve patterned surface anaclasis and scattering finally improve external quantum efficiency.
Description
Technical field
The invention belongs to technical field of semiconductor, specifically a kind of III-nitride semiconductor photogenerator is graphical
Substrate and manufacture method thereof.
Background technology
(Al is referred in order to solve III-nitride semiconductor photogeneratorxGayln1-x-yN, wherein 0≤x≤1,0≤y≤1, x
+ y≤1) problem that patterned substrate light extraction efficiency is low, existing III-nitride semiconductor photogenerator substrate manufacture method uses
As it is shown in figure 1, first substrate 10 surface is etched, formed and protrude from the hexagon prism on surface, cylinder or other convex pattern A；Exist again
The luminescence that its surface crystalline growth cushion 11 in order, N-type III-nitride film layer 12, III-nitride quantum well are constituted
Layer 13, p-type III-nitride film layer 14；On p-type III-nitride film layer 14, form transparent electrode layer 15 subsequently, then enter
Row mesa etch, removes p-type III-nitride film layer 14 and luminescent layer 13, exposes N-type III-nitride film layer 12, and
N-type metal electrode layer 16 is formed on surface；After forming welding electrode 17 on transparent electrode layer 15, then it is whole to form passivation layer covering
Face (but welding electrode to be exposed 17 and metal electrode layer 16), forms light transmission protecting film 18.Wherein substrate 10 generally uses indigo plant
Gem substrate or sic substrate.
Fig. 2 is patterned substrate mask schematic diagram described in Fig. 1, and substrate 10 surface forms convex pattern A, wherein convex pattern
A is hexagon prism, cylinder or other convex pattern, but these situation effects are essentially identical.Above-mentioned convex pattern A may utilize optical graving
Journey makes size W1=1-5 μm and the graphic mask of spacing W2=0.1-1 μm.Then, ICP (Induction coupled is utilized
Plasma) dry etching method such as etching or RIE (Reactive Ion Etching) makes degree of depth 0.1-5 μm convex pattern.
Fig. 3 a and 3b is to illustrate light extraction efficiency is improved design sketch when whether forming figure A by substrate 10 surface, such as Fig. 3 a institute
Show, if the light that luminescent layer 13 is out spreads out of to air (refractive index=1.0) along light path 1, p-type III-nitride film layer
14 if GaN (refractive index=2.5) angle of incidence need to be critical angle less than 23.6 °, and the incidence that critical angle is more than more than 23.6 °
The light at angle then will cannot be expelled to outside along light path 2 reverse reflected inside；Same phenomenon is at N-type III-nitride film 12 and lining
Also can occur between the end 10.Substrate 10 if Sapphire Substrate (refractive index=1.8), critical angle be 46.1 ° relatively big, but still have into
The firing angle light beam more than 46.1 ° is reflected back bottom N-type III-nitride film layer 12 along light path 3.So the most a small amount of light
Injection is to outside, and residue light will close in inside, repeat above procedure and consume rapidly.
But if substrate 10 surface forms the situation of Fig. 3 b of convex pattern A, the light beam that originally cannot penetrate outside will
Along light path 2, because figure inclined plane S changes light path injection to outside.
In Fig. 3 b, if to form density the highest for convex pattern A, convex pattern A inclined plane is the most, anaclasis and scattering
Probability increases, thus improves external quantum efficiency.As can be seen here, the increase of external quantum efficiency is by improving convex pattern A
The area that the inclined plane formed exists at substrate surface realizes with density, only because photoetching process exists the pole of resolution
Limit, therefore improve convex pattern A density and there is the limit.
Summary of the invention
It is an object of the invention to for the deficiencies in the prior art, it is provided that a kind of change substrate surface convex pattern accounting is close
Degree, to increase figure inclined plane, forms more notch cuttype sidewall, by repeatedly photoetching, lithographic technique, to improve patterned surface
Anaclasis and scattering finally improve light emitting semiconductor device patterned substrate and the manufacture method thereof of external quantum efficiency.
The present invention realizes by the following technical solutions:
A kind of III-nitride semiconductor photogenerator patterned substrate, including substrate, cushion, N-type III-nitride
The luminescent layer of thin layer, III-nitride quantum well composition, p-type III-nitride film layer, transparent electrode layer, N-type metal electricity
Pole layer, welding electrode, light transmission protecting film, it is characterised in that: described substrate surface is etched with as much as possible difform
Convex pattern.
Above-mentioned convex pattern can be gengon, and the sidewall of gengon forms notch cuttype, and notch cuttype sidewall is formed as far as possible
Many side wall surfaces.
Above-mentioned convex pattern can also be cylinder.
The preparation method of above-mentioned III-nitride semiconductor photogenerator patterned substrate, it is characterised in that: substrate surface
Convex pattern make through repeatedly photoetching and etching technics.
It is furthermore preferred that the preparation method of above-mentioned III-nitride semiconductor photogenerator patterned substrate, it is included in figure
Change and carry out epitaxial growth on substrate, utilize electronics luminous with hole-recombination, the light emitting semiconductor device of formation, specifically include substrate
The upper first stage forming litho pattern for the first time；Formed on the substrate of the first litho pattern, formed and the first smooth needle drawing
The second stage of the second litho pattern of shape superposition；The first litho pattern and the substrate etch of the second litho pattern will be formed
The phase III of molding.
Second litho pattern and the first litho pattern partial stack of above-mentioned second stage but all superpositions, not overlapping portion
Dividing substrate to be etched, overlapping portion substrate is not etched by, and forms patterned substrate.
Above-mentioned substrate etch molding uses dry etching method.
The present invention in second stage, the second litho pattern and the first litho pattern can also all superpositions, formed graphical
Substrate.
Luminescent layer of the present invention at least comprises the substrate graph side that the compound semiconductor of Ga (gallium) and N (nitrogen) is characterized
Method.
Area that the inclined plane that the present invention is formed by improving convex pattern exists at substrate surface and density, thus formed
Notch cuttype sidewall, to improve substrate surface sidewall density, guarantees gradient to greatest extent；Use repeatedly photoetching and lithographic technique, with
Improve patterned surface anaclasis and scattering finally improves external quantum efficiency.
Accompanying drawing explanation
Fig. 1 is existing tradition III nitride semiconductor luminescent device substrate schematic diagram.
Fig. 2 is the patterned substrate mask top view of Fig. 1.
Fig. 3 a and 3b is substrate surface light extraction efficiency figure when whether forming convex pattern A.Wherein Fig. 3 a is group III-nitride
Light extraction efficiency is improved design sketch when not forming convex pattern A by light emitting semiconductor device；Fig. 3 b goes out light when being and form convex pattern A
Improved efficiency design sketch.
Fig. 4 is the III nitride semiconductor luminescent device substrate schematic diagram of the present invention.
Fig. 5 a and 5b is the schematic diagram of patterned substrate quantum efficiency, and wherein Fig. 5 a is the signal of prior art quantum efficiency
Figure, Fig. 5 b is quantum efficiency schematic diagram of the present invention.
Fig. 6 is the light emission rate curve chart that the present invention etches that number of times is different.
Fig. 7 is etched figure schematic diagram of the present invention.
Fig. 8 is the electric current-light emission rate performance diagram of the III-nitride semiconductor photogenerator of the present invention.
Fig. 9 a～9d is the embodiment method schematic diagram that the present invention forms substrate stepped sidewalls.
Figure 10 a～10c is the another kind of embodiment method schematic diagram that substrate graph of the present invention is formed.
Figure 11 is another embodiment method schematic diagram that substrate graph of the present invention is formed.
Detailed description of the invention
Following example are in order to improve the understanding of the present invention degree and to provide, and the personage knowing this domain knowledge can be at this
Make various deformation in the technological thought of invention, therefore embodiment of the present invention is not only limited in the example ranges provided.
Embodiment one
As shown in Figure 4, III-nitride semiconductor photogenerator of the present invention includes substrate 10, cushion 11, N-type III-nitrogen
The luminescent layer 13 of thin film layer 12, III-nitride quantum well composition, p-type III-nitride film layer 14, transparent electrode layer
15, N-type metal electrode layer 16, welding electrode 17, light transmission protecting film 18, with tradition III-nitride semiconductor photogenerator not
Same is that described substrate 10 surface forms notch cuttype sidewall B, and the area of notch cuttype sidewall B inclined plane H reaches to maximize, substrate 10
Scattering efficiency improve, thus external quantum efficiency also increases.
It is situated between described p-type III-nitride film layer 14 and transparent electrode layer 15 and partly leads in n+ type or p+ type III-nitride
Body layer, or N-shaped or p-type III-nitride semiconductor thin film layer.Transparent electrode layer 15 by nickel, gold, silver, platinum, chromium, titanium, aluminum,
The plural combination selected in a kind of or nickel, gold, silver, platinum, chromium, titanium, aluminum, rhodium and the palladium that select in rhodium and palladium is constituted,
And because light transmittance thickness is formed in 0.0001 and 10 μm intervals.P-type III-nitride film layer 14 thickness can be in 0.01～2 μm districts
Between deposit.
Fig. 5 a and 5b is that prior art contrasts schematic diagram with quantum efficiency of the present invention.
Fig. 5 a is prior art quantum efficiency figure, it is seen that outside the scattering of the light generation all angles arriving at figure corner improves
Portion's quantum efficiency；Fig. 5 b is quantum efficiency figure of the present invention, along with the increase of pattern density not only increases scattering and refraction probability, on
The light that corner, side scatters arrives at corner, lower section and causes rescattering, compares Fig. 5 a without ladder section difference and can discharge more light.
Fig. 6 is as etching the light emission rate curve chart of number of times, (only forms pattern side wall without rank with when the most once etching
Trapezoidal one-tenth) to compare, the figure (it is poor that pattern side wall forms ladder section) carrying out second etch can discharge more light, and can be seen that erosion
Carve number of times and start light emission rate increase for more than three times slowly.
Fig. 7 etched figure B surface schematic diagram, in figure B1 Yu B2 diagram be planar graph be parallelogram, but etching
Figure B1 Yu B2 can be circular, oval, four angle-style, triangle, parallelogram, triangle, the trapezoidal arbitrary graphic that waits, and
Etched figure can also be striated；Etched figure B1, B2 size in 0.1～10 μm, B1, B2 pattern pitch 0.1～10 μm, deeply
Degree 0.001～10 μm are suitable.
Ladder skew wall H is the most outward-dipping is optimal, and figure B's is upper wide and lower wide optimal in 0.1～10 μm.
The degree of depth of figure B is the deepest, and inclined plane H area is the widest, and external quantum efficiency increases, if but crossing deep lower contacts layer
To be difficult to obtain smooth surface, and the raw quality that rises of extension forming N-type III-nitride film layer 12 also will decline, figure B
The degree of depth optimal in 0.001～10 μm.
When use regular hexagon figure is given birth to and risen by GaN on a sapphire substrate, set pattern pitch (W2) 1～4 μm, figure
Size (W1) is in 2～5 μm, graphics depth 0.5～3 μm, and under figure, wide 0.1～3 micron is optimal.
When substrate 10 uses ICP, can be at chamber pressure 1.5mtorr, power (source) 700W, bias 200W, Cl2=
20sccm, BCL3=7sccm condition etches.
Fig. 8 illustrates the electric current-light emission rate characteristic curve of the III-nitride semiconductor photogenerator of the present invention, traditional graph
Change technology can improve the light emission rate of 15%, and the present invention compares conventional art can improve 20%, compares planar substrate and can improve 40%
Light emission rate.This light emission rate is by along with the size of figure B, the degree of depth and cycle difference.
Fig. 9 a～9d illustrates embodiment one (Fig. 4) forming method case.
The preparation method of the present invention a kind of light emitting semiconductor device patterned substrate, specifically includes: form the on substrate 10
The first stage of litho pattern 51；Formed on the substrate 10 of the first litho pattern, formed and the first litho pattern portion
Divide 51 superpositions but the second stage of the second litho pattern 52 of whole superposition；The first litho pattern and the second light will be formed
The phase III of the substrate etch molding of needle drawing shape, above-mentioned first litho pattern and the second litho pattern not lap substrate quilt
Etching；First litho pattern and the second litho pattern overlapping portion substrate are not etched by, and form patterned substrate.
Embodiment two
Figure 10 a～10c is another example schematic of the present invention, in this example by realizing dry etching twice
Mask., obtain notch cuttype figure B by a dry etching.
Utilize photolithography plate such as Figure 10 a diagram to form large scale litho pattern mask 61, then illustrate such as Figure 10 b above it,
Form small size litho pattern mask 62.Small size litho pattern mask 62 is formed above large scale litho pattern mask 61
Technique and the technique forming large scale litho pattern mask 61, except the photolithography plate size used is different, other techniques are the most identical.
Embodiment three
Figure 11 is another kind example schematic of the present invention.The mechanical formation of same light the is used unlike Figure 10 a, 10b
One litho pattern mask 63 and the second litho pattern mask 64, and interlaced.Now the first litho pattern mask 63 figure with
The technical process of the second litho pattern mask 64 visuals superposition, by photolithography plate position adjustment to making figure fold during except exposing
Beyond the position added, other techniques with
The technique of substrate (10) upper formation the first litho pattern mask 63 is identical.
Embodiment two is different with embodiment one from embodiment three, carries out a dry etching engineering and forms figure B.Concrete erosion
Carving method is further described below:
When using Figure 10 b type litho pattern, obtain the notch cuttype figure of the present invention to only carry out etch process
B, the small size litho pattern mask 62 not covered by large scale litho pattern mask 61 is by dry etching, and not by large scale light
Carve the substrate 10 of the small size litho pattern mask lithography figure formation that graphic mask 61 covers by dry etching.The most once lose
Carve all for removal small size litho pattern masks 62, the advantage that there is technique without follow-up removal litho pattern.
When using Figure 11 type litho pattern, for the notch cuttype grid B by a dry etching formation present invention, the
The part that one litho pattern mask 63 does not superposes mutually with the second litho pattern mask 64 is by dry etching, and the first litho pattern is covered
The substrate 10 that the part that film 63 does not superposes mutually with the second litho pattern mask 64 is formed is by dry etching.Dry etching can be by
The field that first litho pattern mask 63 superposes with the second litho pattern mask 64 is all removed, and exists without follow-up removal first
The advantage of the technique in the field that litho pattern mask 63 superposes with the second litho pattern mask 64.
Litho pattern mask is different from the composition material etching speed of substrate 10, therefore to design light needle drawing according to substance characteristics
Shape mask thicknesses.Citing, if the etching speed of Sapphire Substrate 10 is 1 μm per minute, the etching speed of litho pattern nickel is
0.1 micron per minute, in order to etch Sapphire Substrate 10 degree of depth 1 μm, the nickel needing 0.1 μm is thick, now sets large scale photoetching
Graphic mask 61 thickness 0.05 μm, small size litho pattern mask 62 thickness 0.05 μm, dry etching thickness can get Figure 10 c ladder
Type figure B.
Dry etching mask can use resistance to chlorine (CL2) chromium that resistance is stronger, nickel, a kind of monolayer or make in Pt, Ir
By the multi-ply construction metal class of two or more compositions, or silicon oxide, silicon nitride, aluminium oxide, aluminium nitride, photoresist etc..
Claims (9)
1. an III-nitride semiconductor photogenerator patterned substrate is thin including substrate, cushion, N-type III-nitride
The luminescent layer of film layer, III-nitride quantum well composition, p-type III-nitride film layer, transparent electrode layer, N-type metal electrode
Layer, welding electrode, light transmission protecting film, it is characterised in that: described substrate surface is etched with as much as possible difform convex
Shape figure.
A kind of III-nitride semiconductor photogenerator patterned substrate the most according to claim 1, it is characterised in that: convex
Shape figure is gengon, and the sidewall of gengon forms notch cuttype, and notch cuttype sidewall has side wall surface as much as possible.
A kind of III-nitride semiconductor photogenerator patterned substrate the most according to claim 1, it is characterised in that: convex
Shape figure is cylinder.
4. the preparation method of an III-nitride semiconductor photogenerator patterned substrate, it is characterised in that: substrate surface
Convex pattern is made through repeatedly photoetching and etching technics.
5. according to the preparation method of a kind of III-nitride semiconductor photogenerator patterned substrate described in claims 4,
It is characterized in that: be included in patterned substrate and carry out epitaxial growth, utilize electronics luminous with hole-recombination, the quasiconductor of formation
Luminescent device, specifically includes the first stage forming litho pattern for the first time on substrate；Form the lining of the first litho pattern
, the second stage of the second litho pattern superposed with the first litho pattern is formed at the end；By formed the first litho pattern with
The phase III of the substrate etch molding of the second litho pattern.
The preparation method of a kind of III-nitride semiconductor photogenerator patterned substrate the most according to claim 5, its
It is characterised by: the second litho pattern and the first litho pattern partial stack of described second stage but all superpositions, the most overlapping
Section substrate is etched, and overlapping portion substrate is not etched by, and forms patterned substrate.
The preparation method of a kind of III-nitride semiconductor photogenerator patterned substrate the most according to claim 5, its
It is characterised by: the second litho pattern of described second stage and the whole superposition of the first litho pattern.
The preparation method of a kind of III-nitride semiconductor photogenerator patterned substrate the most according to claim 5, its
It is characterised by: the etching of described phase III uses dry etching.
A kind of III-nitride semiconductor photogenerator the most according to claim 5 is graphical
The preparation method of substrate, it is characterised in that: substrate is Sapphire Substrate.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109791962A (en) * | 2017-08-24 | 2019-05-21 | 创光科学株式会社 | The manufacturing method and nitride-based semiconductor ultraviolet ray emitting element of nitride-based semiconductor ultraviolet ray emitting element |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102259831A (en) * | 2010-05-27 | 2011-11-30 | 清华大学 | Three-dimensional nano structure array |
| CN103137815A (en) * | 2013-02-28 | 2013-06-05 | 合肥彩虹蓝光科技有限公司 | Novel pattern sapphire substrate (PSS) structure and manufacturing method |
| CN104300063A (en) * | 2014-10-17 | 2015-01-21 | 西安神光安瑞光电科技有限公司 | Alignment method for improving evenness of crown form patterned substrate |
| CN105226144A (en) * | 2015-11-16 | 2016-01-06 | 河北工业大学 | There is the manufacture method of the LED patterned substrate of double-deck micro-nano array structure |
| CN105336824A (en) * | 2015-10-26 | 2016-02-17 | 华灿光电(苏州）有限公司 | Patterned substrate manufacturing method and patterned substrate |
-
2016
- 2016-08-16 CN CN201610673503.4A patent/CN106229399A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102259831A (en) * | 2010-05-27 | 2011-11-30 | 清华大学 | Three-dimensional nano structure array |
| CN103137815A (en) * | 2013-02-28 | 2013-06-05 | 合肥彩虹蓝光科技有限公司 | Novel pattern sapphire substrate (PSS) structure and manufacturing method |
| CN104300063A (en) * | 2014-10-17 | 2015-01-21 | 西安神光安瑞光电科技有限公司 | Alignment method for improving evenness of crown form patterned substrate |
| CN105336824A (en) * | 2015-10-26 | 2016-02-17 | 华灿光电(苏州）有限公司 | Patterned substrate manufacturing method and patterned substrate |
| CN105226144A (en) * | 2015-11-16 | 2016-01-06 | 河北工业大学 | There is the manufacture method of the LED patterned substrate of double-deck micro-nano array structure |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109791962A (en) * | 2017-08-24 | 2019-05-21 | 创光科学株式会社 | The manufacturing method and nitride-based semiconductor ultraviolet ray emitting element of nitride-based semiconductor ultraviolet ray emitting element |
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