CN105390375A - Patterned sapphire substrate and light-emitting diode making method - Google Patents
Patterned sapphire substrate and light-emitting diode making method Download PDFInfo
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- CN105390375A CN105390375A CN201510735329.7A CN201510735329A CN105390375A CN 105390375 A CN105390375 A CN 105390375A CN 201510735329 A CN201510735329 A CN 201510735329A CN 105390375 A CN105390375 A CN 105390375A
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- 239000000758 substrate Substances 0.000 title claims abstract description 98
- 229910052594 sapphire Inorganic materials 0.000 title claims abstract description 92
- 239000010980 sapphire Substances 0.000 title claims abstract description 92
- 238000000034 method Methods 0.000 title claims abstract description 41
- 238000001039 wet etching Methods 0.000 claims abstract description 14
- 230000000994 depressogenic effect Effects 0.000 claims description 24
- 238000004519 manufacturing process Methods 0.000 claims description 21
- 239000004065 semiconductor Substances 0.000 claims description 12
- 230000000737 periodic effect Effects 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 9
- 239000000428 dust Substances 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 238000005530 etching Methods 0.000 abstract description 14
- 229910017083 AlN Inorganic materials 0.000 description 8
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 8
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 6
- 238000000605 extraction Methods 0.000 description 5
- 229910002601 GaN Inorganic materials 0.000 description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- QAOWNCQODCNURD-UHFFFAOYSA-N sulfuric acid Substances OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 238000002310 reflectometry Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000009776 industrial production Methods 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 239000011777 magnesium Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000011017 operating method Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02019—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Chemical Kinetics & Catalysis (AREA)
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Abstract
The invention discloses a patterned sapphire substrate making method. The method comprises steps: S1, a sapphire flat substrate which is provided with a first surface and an opposite second surface is provided, a mask layer is formed on the first surface, the mask layer is provided with periodically-arranged mask patterns, each mask pattern is provided with at least one outwardly-extending sag, and the sag is corresponding to the lattice direction of the sapphire substrate; and S2, wet etching is carried out on the first surface of the sapphire flat substrate to form a plurality of periodically-arranged patterns at intervals mutually, the patterned sapphire substrate is formed, and the etching speed at the sag of the mask pattern is quick. The surface of the pattern of the patterned sapphire substrate formed by the method is provided with a plurality of sags, the reflection area of the pattern is increased, and the light emitting efficiency of the substrate is improved.
Description
Technical field
The invention belongs to semiconductor applications, particularly relate to a kind of graphical sapphire substrate and preparation method thereof, and adopt the light-emitting diode of this graphical sapphire substrate.
Background technology
PSS(PatternedSapphireSubstrate, graphical sapphire substrate) be utilize the technique such as photoetching, etching on a sapphire substrate, form the Sapphire Substrate with patterned surface.Patterned substrate effectively can reduce the dislocation density of epitaxial structure layer on the one hand, improve crystal mass and the uniformity of epitaxial material, and then the interior quantum luminous efficiency of light-emitting diode can be improved, on the other hand, because graphic structure adds the scattering of light, change the optowire of light-emitting diode, and then improve bright dipping probability.
Summary of the invention
The present invention proposes a kind of graphical sapphire substrate and adopts the manufacture method of light-emitting diode of this substrate, its graphical sapphire substrate made and the light-emitting diode on it, by increasing the reflective area of the patterned surfaces of patterned substrate, the reflection of substrate to light can be improved, thus promote the light extraction efficiency of light-emitting diode.
Concrete technical scheme of the present invention is: the preparation method of graphical sapphire substrate, comprise the steps, S1, provide a sapphire plain film substrate, there is relative first surface and second surface, form mask layer on the first surface, have the mask pattern of periodic arrangement, described mask pattern has at least one outward extending depression, and described depression corresponds to the lattice direction of described Sapphire Substrate; The first surface of sapphire plain film substrate described in S2, employing wet etching, form the spaced pattern of several periodic arrangement, form graphical sapphire substrate, the recess etch rate of wherein said mask pattern is very fast.
Preferably, the pattern that described step S2 is formed has a plurality of side and at least one is folded in depressed area between described adjacent side, and the degree of depth of described depressed area and width reduce to bottom gradually from the top of described pattern.
Preferably, described pattern also comprises an end face and a bottom surface, and described depressed area is folded between described adjacent side and end face.
Preferably, the mask pattern formed in described step S1 also has a plurality of outward extending projection, and described projection corresponds between the lattice direction of described Sapphire Substrate.
Preferably, described projection and depression are alternately arranged, and the number of described projection and depression is 3.
Preferably, the angular range between described adjacent protrusion is 90 ° ~ 150 °.
Preferably, the distance range of the margin and center of the mask pattern formed in described step S1 is 0.25 μm ~ 10 μm, and the height of described mask pattern is 1 μm ~ 10 μm, and the spacing between adjacent mask pattern is 0.5 μm ~ 10 μm.
Preferably, the material of the mask layer formed in described step S1 is photoresistance, oxide or metal.
Preferably, in described step S2, wet etching adopts the concentrated sulfuric acid and phosphoric acid mixed liquor etching Sapphire Substrate first surface to form patterning Sapphire Substrate, and etch period is 500s ~ 3500s, and etching temperature is 150 DEG C ~ 300 DEG C.
Present invention also offers the manufacture method of light-emitting diode, comprise the steps:
S1, provide a sapphire plain film substrate, there is relative first surface and second surface, form mask layer on the first surface, there is the mask pattern of periodic arrangement, described mask pattern has at least one outward extending depression, and described depression corresponds to the lattice direction of described Sapphire Substrate; The first surface of sapphire plain film substrate described in S2, employing wet etching, form the spaced pattern of several periodic arrangement, form graphical sapphire substrate, wherein the recess etch rate of mask pattern is very fast; S3, PVD method is adopted to form an AlN layer on described graphical sapphire substrate surface; S4, at described AlN layer Epitaxial growth light emitting epitaxial layer, it at least comprises n type semiconductor layer, luminescent layer and p type semiconductor layer.
Preferably, the pattern that described step S2 is formed has a plurality of side and at least one is folded in depressed area between described adjacent side, and the degree of depth of described depressed area and width reduce to bottom gradually from the top of described pattern
Preferably, described pattern also comprises an end face and a bottom surface, and described depressed area is folded between described adjacent side and end face.
Preferably, the mask pattern formed in described step S1 also has a plurality of outward extending projection, and it corresponds between the lattice direction of described Sapphire Substrate.
Preferably, described projection and depression are alternately arranged, and the number of described projection and depression is 3.
Preferably, in described step S3, the thickness of AlN layer is 10 dust ~ 200 dusts.
Other features and advantages of the present invention will be set forth in the following description, and, partly become apparent from specification, or understand by implementing the present invention.Object of the present invention and other advantage realize by structure specifically noted in specification, claims and accompanying drawing and obtain.
Accompanying drawing explanation
Accompanying drawing is used to provide a further understanding of the present invention, and forms a part for specification, together with embodiments of the present invention for explaining the present invention, is not construed as limiting the invention.In addition, accompanying drawing data describe summary, is not draw in proportion.
Fig. 1 is sapphire lattice structure schematic top plan view.
Fig. 2 ~ Fig. 3 is the SEM end view of the pattern of graphical sapphire substrate in prior art.
Fig. 4 is according to a kind of schematic flow sheet for making graphical sapphire substrate of the invention process.
Fig. 5 is according to a kind of mask layer pattern for making graphical sapphire substrate of the invention process.
Fig. 6 is the enlarged drawing of the pattern of mask layer shown in Fig. 5.
Fig. 7 ~ Fig. 9 shows and schemes according to the SEM of a kind of graphical sapphire substrate of the invention process.Wherein, Fig. 7 is the overall perspective view of graphical sapphire substrate, and Fig. 8 is the side-looking structural representation of the single pattern of graphical sapphire substrate, and Fig. 9 is the plan structure schematic diagram of the single pattern of graphical sapphire substrate.
Figure 10 is according to a kind of schematic flow sheet for making light-emitting diode of the invention process.
Figure 11 is according to a kind of light emitting diode construction schematic diagram of the invention process.
Number in the figure represents: 10. graphical sapphire substrate; 20. graphical sapphire substrates; The pattern of 21. substrates; 210. end face; The bulge-structure of 2101. end faces; The sunk structure of 2102. end faces; 211. bottom surface; 212. side; 2121. the first side; 2122. the second side; 213. depressed area; 2130. inclined plane; 30. mask patterns; The depression of 31. mask patterns; The projection of 32. mask patterns.
Embodiment
Below in conjunction with embodiment and accompanying drawing, specific embodiment of the invention is elaborated.
PSS generally adopts dry etching or wet etching preparation.Dry etching mainly using plasma (ICP) bombards substrate surface and prepares pattern, there is isotropic feature, the figure morphology controllable prepared, but easily produce physical damnification, surface reflectivity is poor simultaneously, is unfavorable for improving LED light extraction efficiency further.Wet etching mainly adopts chemical solution to corrode substrate to prepare pattern, have that equipment cost is low, operating procedure is simple, substrate surface reflectivity comparatively advantages of higher, be suitable for large-scale industrial production and use.
Fig. 1 shows the schematic top plan view of sapphire lattice structure, is specially hexagonal lattice structure, and the tangent plane be wherein often employed has A face, C face and R face.Because the lattice constant mismatch rate between sapphire C face and III-V and II-VI race's deposit film is less, C face is usually used to carry out epitaxial growth.When adopting wet etching Sapphire Substrate, due to the characteristic of sapphire lattice structure, etching solution only can corrode along sapphire lattice direction, usually forms triangular pyramid type pattern.Fig. 2 ~ 3 show the patterned sapphire substrate 10 that in prior art, wet etching obtains, and its technique is generally form such as columniform mask pattern on the C face of Sapphire Substrate, then carries out wet etching.In aforementioned etching process, etching solution, etch period, etching temperature are three major parameters, and in etching solution and etching temperature one timing, etch period is longer, and the underlay pattern bottom width obtained is larger, but the spacing of adjacent substrate pattern can reduce.
For solving above-mentioned shortcoming, the present invention combines the manufacture method that embodiment below discloses a kind of graphical sapphire substrate, the graphical sapphire substrate made by the method is when keeping the spacing of underlay pattern constant, increase the bottom width of pattern, increase the reflecting surface of patterned surfaces reflection ray.
Referring to Fig. 4 ~ 6, below embodiment disclose a kind of manufacture method of graphical sapphire substrate, specifically comprise the steps:
S1, provide a sapphire plain film substrate, there is relative first surface and second surface, as illustrated in Figures 5 and 6, form mask layer on the first surface, there is the mask pattern 30 of periodic arrangement, it has at least one outward extending depression 31, and depression 31 corresponds to the lattice direction of Sapphire Substrate.Preferably, this mask pattern 30 also has a plurality of outward extending protruding 32, and it corresponds between the lattice direction of Sapphire Substrate.In the present embodiment, depression 31 and projection 32 are alternately arranged, consistent with sapphire lattice direction number, and protruding 31 are 3 with the number of depression 32, and in other variant embodiment, protruding 31 also can be set to 1 or 2 with the number of depression 32.Angle theta value between adjacent protrusion 32 can identical also can be different, scope is 90 ° ~ 150 °.The distance range of the margin and center of mask pattern 30 is 0.25 μm ~ 10 μm, particularly, the distance R1 scope of 31 margin and centers that cave in 0.25 μm ~ 2.5 μm, the scope of the distance R2 of protruding 32 margin and centers is 0.75 ~ 10 μm; The altitude range of mask pattern 30 is 1 μm ~ 10 μm, and spacing is 0.5 μm ~ 10 μm, and adjacent 3 mask patterns 30 are arranged in triangle; The material of mask layer is photoresistance, oxide or metal.
Described in S2, employing wet etching, the first surface of sapphire plain film substrate, forms the spaced pattern 21(of several periodic arrangement as shown in Figure 7), form graphical sapphire substrate, wherein the depression 31 place etch rate of mask pattern 30 is very fast.Wet etching adopts the concentrated sulfuric acid and phosphoric acid mixed liquor etching Sapphire Substrate first surface to form patterning Sapphire Substrate 20, and the volume ratio of the concentrated sulfuric acid and phosphoric acid is 1:1 ~ 10:1, and etch period is 500s ~ 3500s, and etching temperature is 150 DEG C ~ 300 DEG C.
Referring to Fig. 7, in the one embodiment of the graphical sapphire substrate 20 that above-mentioned manufacture method makes, graphical sapphire substrate 20, has relative first surface and second surface, and wherein first surface is arranged by a series of spaced pattern 21 and forms.The altitude range of pattern 21 is 0.8 μm ~ 3 μm, and the spacing range of its periodic arrangement is 0.1 μm ~ 10 μm, and adjacent 3 patterns 21 are arranged in triangle.
Referring to Fig. 8 ~ 9, the depressed area 213 that pattern 21 has end face 210, bottom surface 211, a plurality of side 212 and is folded between adjacent side 212 and end face 210, the degree of depth of depressed area 213 and width reduce to bottom gradually from the top of pattern 21.Graphics top face 210 is for having the polygon plane of three bulge-structures 2101, parallel with the first surface of substrate 20, and is the C face of substrate.Concrete, graphics top face 210 part corresponding to side 212 forms bulge-structure 2101, and part corresponding to depressed area 213 forms the sunk structure 2102 between adjacent protrusion.Side 212 is different and lay respectively at the first side 2121 of pattern 21 upper and lower and the second side 2122 forms by gradient, and the gradient of the first side 2121 is less than the gradient of the second side 2122, and the second side 2122 is in arcuation.The bottom surface 211 of pattern 21 has three corner α, and the line of corner α is arcuation, and make three the second sides 2122 in arcuation, corner α size is 105 ° ~ 115 °, and bottom width d is 4 μm ~ 20 μm.Depressed area 213 is formed by connecting by two inclined planes 2130, better, and its projection in patterned underside 211 is triangular in shape, two inclined planes 2130 are arranged axisymmetricly, its angular range is 90 ~ 150 °, and in other variant embodiment, the size on two inclined planes 2130 also can be arranged as required.Depressed area 213 is mainly used in the area increasing pattern 21 surface reflection light, and its number can be designed to 1 ~ 3 as required, arranges 3 depressed areas 213 in the present embodiment.
The number of the depressed area 213 of the sapphire substrate surface pattern 21 shown in Fig. 8 is corresponding with the number of the depression 31 of mask pattern in Fig. 6 30, and the size of angle between two inclined planes 2130 of depressed area 213 is corresponding with the angle theta size in pattern 30 between two adjacent protrusion 32.
Compared with the pattern 11 of the existing graphical sapphire substrate 10 shown in Fig. 3, in the present embodiment, the pattern 21 of graphical sapphire substrate 20 is by arranging 3 depressed areas 213 on its surface, increase the area of its reflection ray, in addition, the bottom surface 211 corner α of pattern 21 increases about 10 ° than crank degree corresponding in underlay pattern 11 of the prior art, make the bottom width d of pattern 21 along with increase, to increase the area of pattern 21 surface reflection light, thus realize the effect improving graphical sapphire substrate light extraction efficiency.
In the present embodiment, the mask pattern 30 that step S1 is formed is for forming the key of pattern 21 shown in Fig. 8.The pattern 30 of mask layer is roughly in " windmill " shape, it at least has one and stretches out and the depression 31 corresponding to the lattice direction of Sapphire Substrate, preferably, this mask pattern 30 also have a plurality of stretch out and correspond to Sapphire Substrate lattice direction between projection 32, so, in the wet etching process of step S2, the chemical corrosion solution of etching is very fast along depression 31 place's etch rates, and it is slower along protruding 32 place's etch rates, the pattern 21 making etching terminate the graphical sapphire substrate 20 of rear formation has the depressed area 213 of three reflection rays, and the bottom width d of pattern 21 increases, improve the reflective area of pattern 21, improve the light extraction efficiency of graphical sapphire substrate 20.
Figure 10 shows according to a kind of flow chart making light-emitting diode of the invention process, comprise step S1 ~ S4, wherein step S1 ~ S2 forms graphical sapphire substrate, step S3 forms AlN layer for adopting PVD method on graphical sapphire substrate 20, and step S4 is at AlN layer epitaxially grown light emitting epitaxial layer.Be briefly described each step below, wherein step S1 ~ S2 illustrates with reference to aforementioned.
S3, adopt PVD method to be formed in the method for step S1 ~ S2 graphical sapphire substrate 20 surface on formation one AlN layer; The thickness of this layer is 10 dust ~ 200 dusts.
S4, employing epitaxial growth regime, successively grown buffer layer, n type semiconductor layer, luminescent layer and p type semiconductor layer, wherein resilient coating is the material based on III group-III nitride, preferably adopts gallium nitride, can also adopt aluminium nitride material or Al-Ga-N material; N type semiconductor layer is preferably gallium nitride, also can adopt Al-Ga-N material, and silicon doping preferred concentration is 1 × 10
19cm
-3; Luminescent layer for preferably there is at least one quantum well structure, preferably for having 5 ~ 50 pairs of quantum well constitutions; P layer semiconductor layer is preferably gallium nitride, and adopt magnesium doping, doping content is 1 × 10
19~ 5 × 10
21cm
-3, preferably p type semiconductor layer is sandwich construction, comprises P-type electron barrier layer, P-type conduction layer and P type contact layer, wherein P type electronic blocking is close to luminescent layer, enter P-type layer and hole-recombination for block electrons, preferably adopt Al-Ga-N material, thickness can be 50nm ~ 200nm.
Figure 11 shows and adopts the light-emitting diode that shown in Figure 10, manufacture method is formed, and its structure comprises: graphical sapphire substrate 20, AlN layer 40, resilient coating 50, n type semiconductor layer 60, luminescent layer 70 and p type semiconductor layer 80.In this light-emitting diode, 3 depressed areas 213 are set up on the surface of each pattern 21 of the graphical sapphire substrate 20 adopted, and its bottom width increases, to increase pattern 21 surface reflection light area, thus improve the light extraction efficiency of graphical sapphire substrate 20.
Should be understood that, above-mentioned specific embodiments is the preferred embodiments of the present invention, and scope of the present invention is not limited to this embodiment, all any changes done according to the present invention, all belongs within protection scope of the present invention.
Claims (14)
1. the manufacture method of graphical sapphire substrate, comprises the steps:
S1, provide a sapphire plain film substrate, there is relative first surface and second surface, form mask layer on the first surface, there is the mask pattern of periodic arrangement, described mask pattern has at least one outward extending depression, and described depression corresponds to the lattice direction of described Sapphire Substrate;
The first surface of sapphire plain film substrate described in S2, employing wet etching, form the spaced pattern of several periodic arrangement, form graphical sapphire substrate, the recess etch rate of wherein said mask pattern is very fast.
2. the manufacture method of graphical sapphire substrate according to claim 1, it is characterized in that: the pattern that described step S2 is formed has a plurality of side and at least one is folded in depressed area between described adjacent side, and the degree of depth of described depressed area and width reduce to bottom gradually from the top of described pattern.
3. the manufacture method of graphical sapphire substrate according to claim 2, is characterized in that: described pattern also comprises an end face and a bottom surface, and described depressed area is folded between described adjacent side and end face.
4. the manufacture method of graphical sapphire substrate according to claim 1, is characterized in that: the mask pattern formed in described step S1 also has a plurality of outward extending projection, and described projection corresponds between the lattice direction of described Sapphire Substrate.
5. the manufacture method of graphical sapphire substrate according to claim 4, is characterized in that: described projection and depression are alternately arranged, and the number of described projection and depression is 3.
6. the manufacture method of graphical sapphire substrate according to claim 4, is characterized in that: the angular range between described adjacent protrusion is 90 ° ~ 150 °.
7. the manufacture method of graphical sapphire substrate according to claim 4, it is characterized in that: the distance of the margin and center of the mask pattern formed in described step S1 is 0.25 μm ~ 10 μm, the height of described mask pattern is 1 μm ~ 10 μm, and the spacing between adjacent mask pattern is 0.5 μm ~ 10 μm.
8. the manufacture method of graphical sapphire substrate according to claim 1, is characterized in that: the material of the mask layer formed in described step S1 is photoresistance, oxide or metal.
9. the manufacture method of light-emitting diode, comprises the steps:
S1, provide a sapphire plain film substrate, there is relative first surface and second surface, form mask layer on the first surface, there is the mask pattern of periodic arrangement, described mask pattern has at least one outward extending depression, and described depression corresponds to the lattice direction of described Sapphire Substrate;
The first surface of Sapphire Substrate described in S2, employing wet etching, form the spaced pattern of several periodic arrangement, form graphical sapphire substrate, wherein the recess etch rate of mask pattern is very fast;
S3, PVD method is adopted to form an AlN layer at described graphical sapphire substrate first surface;
S4, at described AlN layer Epitaxial growth light emitting epitaxial layer, it at least comprises n type semiconductor layer, luminescent layer and p type semiconductor layer.
10. the manufacture method of light-emitting diode according to claim 9, it is characterized in that: the pattern that described step S2 is formed has a plurality of side and at least one is folded in depressed area between described adjacent side, and the degree of depth of described depressed area and width reduce to bottom gradually from the top of described pattern.
The manufacture method of 11. light-emitting diodes according to claim 9, is characterized in that: described pattern also comprises an end face and a bottom surface, and described depressed area is folded between described adjacent side and end face.
The manufacture method of 12. light-emitting diodes according to claim 9, is characterized in that: the mask pattern formed in described step S1 also has a plurality of outward extending projection, and it corresponds between the lattice direction of described Sapphire Substrate.
The manufacture method of 13. light-emitting diodes according to claim 12, is characterized in that: described projection and depression are alternately arranged, and the number of described projection and depression is 3.
The manufacture method of 14. light-emitting diodes according to claim 9, is characterized in that: in described step S3, the thickness of AlN layer is 10 dust ~ 200 dusts.
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CN201510735329.7A CN105390375A (en) | 2015-11-03 | 2015-11-03 | Patterned sapphire substrate and light-emitting diode making method |
PCT/CN2016/097867 WO2017076119A1 (en) | 2015-11-03 | 2016-09-20 | Patterned sapphire substrate, light emitting diode, and manufacturing methods therefor |
US15/723,248 US10312409B2 (en) | 2015-11-03 | 2017-10-03 | Patterned sapphire substrate, light emitting diode and fabrication method thereof |
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WO2017076119A1 (en) * | 2015-11-03 | 2017-05-11 | 厦门市三安光电科技有限公司 | Patterned sapphire substrate, light emitting diode, and manufacturing methods therefor |
CN108417681A (en) * | 2018-04-08 | 2018-08-17 | 宜特(上海)检测技术有限公司 | The confirmation method of TEM Sapphire Substrate LED sample lattice directions |
CN109873058A (en) * | 2019-01-29 | 2019-06-11 | 华灿光电(浙江)有限公司 | The manufacturing method of patterned substrate and patterned substrate and LED epitaxial slice |
WO2019127422A1 (en) * | 2017-12-29 | 2019-07-04 | 深圳前海小有技术有限公司 | Led structure and preparation method therefor |
CN110797442A (en) * | 2018-08-02 | 2020-02-14 | 东莞市中图半导体科技有限公司 | Patterned substrate, LED epitaxial wafer and patterned substrate preparation method |
CN111509095A (en) * | 2019-01-31 | 2020-08-07 | 财团法人工业技术研究院 | Composite substrate and manufacturing method thereof |
CN112992653A (en) * | 2021-02-04 | 2021-06-18 | 南京信息工程大学 | III-nitride composite substrate with asymmetric periodic structure and processing method thereof |
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