CN106206547A - 一种集成电路封装结构及其制造方法 - Google Patents

一种集成电路封装结构及其制造方法 Download PDF

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CN106206547A
CN106206547A CN201610558807.6A CN201610558807A CN106206547A CN 106206547 A CN106206547 A CN 106206547A CN 201610558807 A CN201610558807 A CN 201610558807A CN 106206547 A CN106206547 A CN 106206547A
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王培培
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Nantong Hualong Microelectronics Ltd By Share Ltd
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Abstract

本发明提供了一种集成电路封装结构，其电磁芯片通过固定胶固定于凹槽的底部，凹槽的深度和宽度分别大于电磁芯片的高度和宽度，环形屏蔽层环绕电磁芯片并位于凹槽底部，封装层密封电磁芯片和环形屏蔽层，电磁芯片并通过导电通孔电连接至焊盘，其他多个集成芯片电连接至线路层和焊盘，所述线路层和焊盘均位于基板和封装层的上表面。本发明利用环形屏蔽层和金属基板的双层屏蔽，减小电磁干扰，减小了封装体积，增强了封装的灵活性。

Description

一种集成电路封装结构及其制造方法
技术领域
本发明涉及集成电路封装领域，具体涉及一种集成电路封装结构及其制造方法。
背景技术
在集成电路封装中，由于本身电子器件的电磁辐射或外界的电磁辐射，往往会导致集成电路的信号不稳定，电路失效，现有技术中，是将容易受电磁干扰或发出电磁波的半导体元件封装在特定的集成电路中，在将该封装体予以电子屏蔽，其屏蔽的构件往往是一个金属罩体，这样的封装体体积较大且封装极为不灵便。
发明内容
基于解决上述封装中的问题，本发明提供了一种集成电路封装结构的制造方法，其包括以下步骤：
（1）提供一带有凹槽的金属基板，将电磁元件固定于凹槽底部，所述凹槽的深度和宽度分别大于所述电磁芯片的高度和宽度；
（2）形成环绕所述电磁芯片的环形屏蔽层；
（3）用封装胶填充满所述凹槽，完全覆盖电磁芯片和环形屏蔽层，固化后形成封装层；
（4）形成连接电磁芯片的导电通孔，所述导电通孔的材质为非金属；
（5）形成在金属基板上的线路层和连接导电通孔的焊盘，并利用线路层和焊盘耦合其他集成芯片。
其中，形成环形屏蔽层的具体步骤为：在凹槽内沉积光刻胶，其中所述光刻胶的高度低于凹槽的深度并完全覆盖电磁芯片；利用干法光刻技术光刻光刻胶，在围绕电磁芯片4的周圈形成环形的屏蔽凹槽，屏蔽凹槽的底部暴露固定胶；利用电磁屏蔽材料填充所述屏蔽凹槽形成环形屏蔽层，去除光刻胶。
其中，所述电磁屏蔽材料为金属。
本发明还提供了一种集成电路封装结构，其包括带有凹槽的金属基板、固定胶、电磁芯片、环形屏蔽层、封装层、导电通孔、线路层、焊盘和其他多个集成芯片，所述电磁芯片通过固定胶固定于凹槽的底部，所述凹槽的深度和宽度分别大于待封装电磁芯片的高度和宽度，环形屏蔽层环绕所述电磁芯片并位于凹槽底部，封装层密封所述电磁芯片和环形屏蔽层，电磁芯片并通过导电通孔电连接至焊盘，其他多个集成芯片电连接至线路层和焊盘，所述线路层和焊盘均位于基板和封装层的上表面。
其中，所述固定胶包括压敏固化胶、热固化胶、光固化胶、硅脂、环氧树脂等。
其中，所述环形屏蔽层的宽度大于或等于1mm。
其中，所述其他多个集成芯片包括控制器、MOS晶体管、电阻等。
本发明的优点如下：
（1）利用环形屏蔽层和金属基板的双层屏蔽，减小电磁干扰；
（2）利用基板的凹槽进行电磁导向；
（3）形成电子屏蔽较好的封装体，在后续集成电路封装中无需再增加电磁屏蔽罩等构件，减小了封装体积，增强了封装的灵活性。
附图说明
图1-10为本发明的集成电路封装结构的制造方法的过程示意图。
具体实施方式
参见图1-10，本发明首先提供了一种集成电路的封装方法，具体步骤将在如下进行描述，描述中所出现的上下、左右、侧面等位置名词均相对于示意图中的位置关系。
参见图1，提供一金属基板1，在金属基板1顶面挖槽形成安装凹槽2，所述凹槽2的深度和宽度分别大于待封装电磁芯片4的高度和宽度，所述金属基板接地以防止电磁波的干扰或通过。将电磁元件4固定于凹槽2的底部，该电磁元件是容易受电磁干扰或发出电磁波的半导体元件，例如RF元件、光电探测器、传感器、光电接收器等，其固定方式可通过固定胶3固定，该固定胶3包括压敏固化胶、热固化胶、光固化胶、硅脂、环氧树脂等。
参见图2，在凹槽2内沉积光刻胶5，其中所述光刻胶5的高度低于凹槽2的深度并完全覆盖电磁芯片4。
参见图3，利用干法光刻技术光刻光刻胶5，在围绕电磁芯片4的周圈形成环形的屏蔽凹槽6，屏蔽凹槽6的底部暴露固定胶3，该环形的屏蔽凹槽6的宽度为大于或等于1mm，以获得足够的厚度进行电磁屏蔽。
参见图4，利用电磁屏蔽材料填充所述屏蔽凹槽6形成环形屏蔽层7，其宽度同样的大于或等于1mm，高度略高于电磁芯片4单小于凹槽2的深度，其中电磁屏蔽材料优选为金属。
参见图5，去除光刻胶5。
参见图6，用封装胶填充满所述凹槽2，完全覆盖电磁芯片4和环形屏蔽层7，固化后形成封装层8。
参见图7，在对应电磁芯片4的电极位置开槽形成通孔9，所述通孔9的孔径小于屏蔽凹槽6的宽度。
参见图8，填充导电物质形成导电通孔10，所述导电物质为非金属，优选为多晶硅、ITO、AZO等，以防止正面电磁发射或接收的干扰。
参见图9，在基板2的上表面和封装层8上形成线路层11和电连接导电通孔10的焊盘12，所述线路层包括用于电隔离线路层11和金属基板1的绝缘层（未示出）。
参考图10，利用线路层11和焊盘12耦合其他多个电子元件13，所述其他多个电子元件13包括控制器、MOS晶体管、电阻等，所述其他多个电子元件13尺寸可以不同，但是都叠置在电磁芯片4上，并与电磁芯片4部分重叠，形成用于电磁发射或接收的开口。
本发明通过上述封装方法形成了一种集成电路封装结构，其包括带有凹槽2的金属基板1、固定胶3、电磁芯片4、环形屏蔽层7、封装层8、导电通孔10、线路层11、焊盘12和其他多个集成芯片13，所述电磁芯片4通过固定胶3固定于凹槽2的底部，所述凹槽2的深度和宽度分别大于待封装电磁芯片4的高度和宽度，环形屏蔽层7环绕所述电磁芯片4并位于凹槽底部，封装层密封所述电磁芯片4和环形屏蔽层7，电磁芯片4并通过导电通孔10电连接至焊盘12，其他多个集成芯片电连接至线路层11和焊盘12，所述线路层11和焊盘12均位于基板2和封装层8的上表面。
最后应说明的是：显然，上述实施例仅仅是为清楚地说明本发明所作的举例，而并非对实施方式的限定。对于所属领域的普通技术人员来说，在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。而由此所引申出的显而易见的变化或变动仍处于本发明的保护范围之中。

Claims (7)

1.一种集成电路封装结构的制造方法，其包括以下步骤：
（1）提供一带有凹槽的金属基板，将电磁元件固定于凹槽底部，所述凹槽的深度和宽度分别大于所述电磁芯片的高度和宽度；
（2）形成环绕所述电磁芯片的环形屏蔽层；
（3）用封装胶填充满所述凹槽，完全覆盖电磁芯片和环形屏蔽层，固化后形成封装层；
（4）形成连接电磁芯片的导电通孔，所述导电通孔的材质为非金属；
（5）形成在金属基板上的线路层和连接导电通孔的焊盘，并利用线路层和焊盘耦合其他集成芯片。
2.根据权利要求1所述的集成电路封装结构的制造方法，其特征在于：形成环形屏蔽层的具体步骤为：在凹槽内沉积光刻胶，其中所述光刻胶的高度低于凹槽的深度并完全覆盖电磁芯片；利用干法光刻技术光刻光刻胶，在围绕电磁芯片4的周圈形成环形的屏蔽凹槽，屏蔽凹槽的底部暴露固定胶；利用电磁屏蔽材料填充所述屏蔽凹槽形成环形屏蔽层，去除光刻胶。
3.根据权利要求2所述的集成电路封装结构的制造方法，其特征在于：所述电磁屏蔽材料为金属。
4.一种集成电路封装结构，其包括带有凹槽的金属基板、固定胶、电磁芯片、环形屏蔽层、封装层、导电通孔、线路层、焊盘和其他多个集成芯片，所述电磁芯片通过固定胶固定于凹槽的底部，所述凹槽的深度和宽度分别大于待封装电磁芯片的高度和宽度，环形屏蔽层环绕所述电磁芯片并位于凹槽底部，封装层密封所述电磁芯片和环形屏蔽层，电磁芯片并通过导电通孔电连接至焊盘，其他多个集成芯片电连接至线路层和焊盘，所述线路层和焊盘均位于基板和封装层的上表面。
5.根据权利要求4所述的集成电路封装结构，其特征在于：所述固定胶包括压敏固化胶、热固化胶、光固化胶、硅脂、环氧树脂等。
6.根据权利要求4所述的集成电路封装结构，其特征在于：所述环形屏蔽层的宽度大于或等于1mm。
7.根据权利要求4所述的集成电路封装结构，其特征在于：所述其他多个集成芯片包括控制器、MOS晶体管、电阻等。
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