CN106102352A - A kind of method solving non-symmetrical line slab warping - Google Patents
A kind of method solving non-symmetrical line slab warping Download PDFInfo
- Publication number
- CN106102352A CN106102352A CN201610524779.6A CN201610524779A CN106102352A CN 106102352 A CN106102352 A CN 106102352A CN 201610524779 A CN201610524779 A CN 201610524779A CN 106102352 A CN106102352 A CN 106102352A
- Authority
- CN
- China
- Prior art keywords
- copper foil
- foil layer
- blind hole
- daughter board
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/107—Using laser light
Abstract
The invention discloses a kind of method solving non-symmetrical line slab warping, make for n-layer wiring board (n >=3), comprise the steps: A, introduce pseudobed L1 ': L1 copper foil layer is divided into the first copper foil layer and the second copper foil layer, and the second copper foil layer is pseudobed L1 ';B, making blind hole daughter board: L1 '~Ln 1 copper foil layer correspondence is carried out pressing and makes blind hole daughter board;Blind hole daughter board upper surface after pressing is holed along L1 ' copper foil layer to Ln 1 copper foil layer;C, the first copper foil layer and Ln copper foil layer are pressed on respectively the two sides of blind hole daughter board;First copper foil layer is holed by D, use laser so that the first copper foil layer electrically conducts with L1 ' copper foil layer;By introducing pseudobed L1 ' so that the first copper foil layer and Ln copper foil layer are symmetrical set, the stress produced during pressing blind hole daughter board with Ln copper foil layer is symmetrical, and wiring board will not occur warpage.
Description
Technical field
The present invention relates to wiring board and manufacture field, particularly relate to a kind of method solving non-symmetrical line slab warping.
Background technology
Multilayer circuit board usually has mechanical blind hole design requirement, and mechanical blind hole refers to wiring board internal layer cabling and wiring board table
The via type that layer cabling is connected, it does not penetrates through whole wiring board.
As a example by n-layer wiring board, the design requirement of its mechanical blind hole is: as it is shown in figure 1, L1~Ln-1 is via layer, L1
~Ln layer is blind hole layer, in prior art, the substantially Making programme of this n-layer wiring board is: first enter L1~Ln-1 copper foil layer correspondence
Blind hole daughter board is made in row pressing, and then the blind hole daughter board upper surface after pressing is holed along L1 copper foil layer to Ln-1 copper foil layer, and
This boring penetrates Ln-1 copper foil layer, and blind hole daughter board and Ln copper foil layer pressing are finally made the multilayer circuit board with blind hole 10.
The defect using aforesaid way is: owing to blind hole daughter board is different from the thickness of Ln copper foil layer and thermal expansion speed,
And the physical parameter of blind hole daughter board and Ln copper foil layer there are differences, cause blind hole daughter board asymmetric with Ln copper foil layer, thus lead
The stress causing to produce during pressing blind hole daughter board with Ln copper foil layer is asymmetric so that wiring board is pole during pressing
Easily there is warpage, and the angularity of wiring board exceeded IPC 0.75% requirement, and in SMT and PCB production technology, line
Slab warping degree in road can cause the location of components and parts inaccurate more than 0.75%, and plate is curved when SMT, THT, and components and parts pin can not
Neatly, bring extreme difficulties to assembling and installment work, thus the use affecting monoblock wiring board even directly results in and scraps.
Cause wiring board generation warpage to overcome blind hole daughter board and Ln copper foil layer asymmetric, in prior art also by
In the following manner make wiring board, idiographic flow substantially: first L2~Ln-1 copper foil layer is carried out pressing and makes blind hole daughter board, then
Blind hole daughter board upper surface after pressing is holed along L2 copper foil layer to Ln-1 copper foil layer, and this boring penetrates Ln-1 copper foil layer, shape
Become via layer, next L1 copper foil layer and Ln copper foil layer are pressed on respectively the two sides of blind hole daughter board, finally use laser to L1
Copper foil layer carries out boring connection L1 copper foil layer and L2 copper foil layer, reaches the design requirement of mechanical blind hole with this, but this mode
Use laser L1 copper foil layer is holed time, due to design time, the thickness of dielectric layers > 0.1mm of L1 copper foil layer bottom,
Use laser to be difficult to drill L1 copper foil layer, therefore, be still difficult to reach the design requirement of mechanical blind hole.
Summary of the invention
In order to overcome the deficiencies in the prior art, it is an object of the invention to provide and a kind of solve non-symmetrical line slab warping
Method, solves blind hole daughter board in prior art asymmetric with Ln copper foil layer thus cause wiring board to stick up during pressing
Bent problem.
The purpose of the present invention realizes by the following technical solutions:
A kind of method solving non-symmetrical line slab warping, makes for n-layer wiring board (n >=3), it is characterised in that bag
Include following steps:
A, introducing pseudobed L1 ': L1 copper foil layer is divided into the first copper foil layer and the second copper foil layer, and the second copper foil layer is pseudobed
L1 ', the first copper foil layer is configured to the thickness drilled by laser;
B, making blind hole daughter board: L1 '~Ln-1 copper foil layer correspondence are carried out pressing and makes blind hole daughter board;Blind after pressing
Confucius's plate upper surface is holed along L1 ' copper foil layer to Ln-1 copper foil layer, and this boring penetrates Ln-1 copper foil layer and forms through hole;
C, the first copper foil layer and Ln copper foil layer are pressed on respectively the two sides of blind hole daughter board;
First copper foil layer is holed by D, use laser so that the first copper foil layer electrically conducts with L1 ' copper foil layer.
Preferably, between step A and step B, carry out sawing sheet, for the first time internal layer dry film, for the first time DES, AOI inspection successively
Survey.
Preferably, step B also includes:
By prepreg, L1 '~Ln-1 copper foil layer correspondence are carried out pressing and make blind hole daughter board, and carry out milling limit.
Preferably, after completing step B, through hole is carried out successively deburring, heavy copper, plate plating, plated hole dry film, plated hole, resin
Consent, again blind hole daughter board is carried out successively nog plate, for the second time internal layer dry film, for the second time DES.
Preferably, in step second time internal layer dry film and second time DES, pseudobed L1 ' is removed.
Preferably, the mode removing pseudobed L1 ' is: carrying out photosensitive process with dry film, L1 ' copper foil layer sets in the position of through hole
Counting the pad bigger than through-hole diameter, L1 ' copper foil layer remainder in addition to pad is all etched to base material in second time DES.
Preferably, the diameter of pad 4-10mil bigger than the diameter of through hole.
Preferably, step C also includes:
L1 ' copper foil layer and first copper foil layer of blind hole daughter board carry out pressing by prepreg, the Ln-1 copper of blind hole daughter board
Layers of foil and Ln copper foil layer carry out pressing by prepreg, carry out brown process after pressing.
Compared to existing technology, the beneficial effects of the present invention is: by introducing pseudobed L1 ' so that the first copper foil layer and Ln
Copper foil layer is symmetrical set, and the stress produced during pressing blind hole daughter board with Ln copper foil layer is symmetrical, and wiring board will not occur
Warpage, pseudobed L1 ' is that L1 copper foil layer is split to form simultaneously so that the thickness of dielectric layers≤0.1mm of the first copper foil layer bottom, first
Copper foil layer is easy to be drilled by laser, therefore, by above-mentioned steps, in the case of not changing mechanical blind hole design requirement, makes
Wiring board can not occur warpage during processing and manufacturing.
Accompanying drawing explanation
Fig. 1 is the sectional view of wiring board in prior art;
Fig. 2 is that a kind of method solving non-symmetrical line slab warping of the present invention introduces L1 '~Ln-1 copper foil layer after pseudobed L1 '
Sectional view;
Fig. 3 is a kind of method solving non-symmetrical line slab warping of present invention circuit when not holing the first copper foil layer
The sectional view of plate;
Fig. 4 is that a kind of method solving non-symmetrical line slab warping of the present invention carries out rear board of holing to the first copper foil layer
Sectional view.
Detailed description of the invention
Below, in conjunction with accompanying drawing and detailed description of the invention, the present invention is described further:
As in Figure 2-4, a kind of method solving non-symmetrical line slab warping, make for n-layer wiring board (n >=3), bag
Include:
See Fig. 2 Fig. 3, step A, introducing pseudobed L1 ': L1 copper foil layer correspondence up and down is divided into the first copper foil layer 11 and second
Copper foil layer, the second copper foil layer is pseudobed L1 ', and the first copper foil layer 11 is configured to the thickness drilled by laser;
As shown in Figures 2 and 3, step B, making blind hole daughter board: L1 '~Ln-1 copper foil layer correspondence are carried out pressing and makes blind
Confucius's plate;Blind hole daughter board upper surface after pressing is holed along L1 ' copper foil layer to Ln-1 copper foil layer, and this boring penetrates Ln-1 copper
Layers of foil forms through hole 40;
As it is shown on figure 3, step C, the first copper foil layer 11 and Ln copper foil layer is pressed on respectively the two sides of blind hole daughter board;
As shown in Figure 4, the first copper foil layer 11 is holed by step D, use laser so that the first copper foil layer 11 and L1 '
Copper foil layer electrically conducts and forms mechanical blind hole 50.
Thereby, by introducing pseudobed L1 ' so that the first copper foil layer and Ln copper foil layer are symmetrical set, at pressing blind hole
The stress produced during plate and Ln copper foil layer is symmetrical, and wiring board will not occur warpage, and pseudobed L1 ' is the segmentation of L1 copper foil layer simultaneously
Forming so that the thickness of dielectric layers≤0.1mm of bottom, the first copper foil layer is easy to be drilled by laser, therefore, by above-mentioned step
Suddenly, in the case of not changing mechanical blind hole design requirement, make wiring board that warpage can not occur during processing and manufacturing.
Sawing sheet, for the first time internal layer dry film, for the first time DES, AOI detection is carried out successively between step step A B.
As in figure 2 it is shown, in order to L1 '~Ln-1 copper foil layer being carried out pressing more closely, by prepreg 30 by L1 '
~Ln-1 copper foil layer correspondence carries out pressing and makes blind hole daughter board, and carry out milling limit, it is preferable that L1 ' copper foil layer leads to L2 copper foil layer
Crossing a prepreg 30 and carry out pressing, between L2~Ln copper foil layer, correspondence carries out pressing by 2 cured sheets 30 respectively.
After completing step B, through hole 40 is carried out deburring, heavy copper, plate plating, plated hole dry film, plated hole, filling holes with resin, more right
Blind hole daughter board carries out nog plate, for the second time internal layer dry film, for the second time DES successively.
In order to more conform to mechanical blind hole design requirement, remove in above-mentioned steps second time internal layer dry film and second time DES
Removing pseudobed L ', the mode removing pseudobed L ' is: carry out photosensitive process with dry film, and L1 ' copper foil layer is logical at the Position Design ratio of through hole
The pad 20 that hole 40 diameter is big, pad 20 can be photosensitive, and L1 ' copper foil layer remainder in addition to pad 20 will not be photosensitive, in DES
All it is etched to base material, it is preferable that the diameter 4-10mil bigger than the diameter of through hole of pad 20, the effect of pad 20 is electrically
Turn on the first copper foil layer and L2 copper foil layer.
Further, the L1 ' copper foil layer of blind hole daughter board and the first copper foil layer carry out pressing, preferably by prepreg 30
Ground, the L1 ' copper foil layer of blind hole daughter board and the first copper foil layer carry out pressing by a prepreg 30, the Ln-1 copper of blind hole daughter board
Layers of foil carries out pressing with Ln copper foil layer by prepreg 30, carries out brown process after pressing.
It will be apparent to those skilled in the art that can technical scheme as described above and design, make other various
Corresponding change and deformation, and all these change and deformation all should belong to the protection domain of the claims in the present invention
Within.
Claims (8)
1. the method solving non-symmetrical line slab warping, makes for n-layer wiring board (n >=3), it is characterised in that include
Following steps:
A, introducing pseudobed L1 ': L1 copper foil layer is divided into the first copper foil layer and the second copper foil layer, and the second copper foil layer is pseudobed L1 ', the
One copper foil layer is configured to the thickness drilled by laser;
B, making blind hole daughter board: L1 '~Ln-1 copper foil layer correspondence are carried out pressing and makes blind hole daughter board;Blind hole after pressing
Plate upper surface is holed along L1 ' copper foil layer to Ln-1 copper foil layer, and this boring penetrates Ln-1 copper foil layer and forms through hole;
C, the first copper foil layer and Ln copper foil layer are pressed on respectively the two sides of blind hole daughter board;
First copper foil layer is holed by D, use laser so that the first copper foil layer electrically conducts with L1 ' copper foil layer.
A kind of method solving non-symmetrical line slab warping the most according to claim 1, it is characterised in that including:
Sawing sheet, for the first time internal layer dry film, for the first time DES, AOI detection is carried out successively between step A and step B.
A kind of method solving non-symmetrical line slab warping the most according to claim 1, it is characterised in that step B is also wrapped
Include:
By prepreg, L1 '~Ln-1 copper foil layer correspondence are carried out pressing and make blind hole daughter board, and carry out milling limit.
A kind of method solving non-symmetrical line slab warping the most according to claim 1, it is characterised in that
After completing step B, through hole is carried out successively deburring, heavy copper, plate plating, plated hole dry film, plated hole, filling holes with resin, then to blind
Confucius's plate carries out nog plate, for the second time internal layer dry film, for the second time DES successively.
A kind of method solving non-symmetrical line slab warping the most according to claim 4, it is characterised in that
Pseudobed L1 ' is removed in step second time internal layer dry film and second time DES.
A kind of method solving non-symmetrical line slab warping the most according to claim 5, it is characterised in that remove pseudobed
The mode of L1 ' is: carry out photosensitive process with dry film, L1 ' copper foil layer at the Position Design of the through hole pad bigger than through-hole diameter,
L1 ' copper foil layer remainder in addition to pad is all etched to base material in second time DES.
A kind of method solving non-symmetrical line slab warping the most according to claim 6, it is characterised in that
The diameter 4-10mil bigger than the diameter of through hole of pad.
A kind of method solving non-symmetrical line slab warping the most according to claim 1, it is characterised in that step C is also wrapped
Include:
L1 ' copper foil layer and first copper foil layer of blind hole daughter board carry out pressing by prepreg, the Ln-1 copper foil layer of blind hole daughter board
Carry out pressing with Ln copper foil layer by prepreg, after pressing, carry out brown process.
Priority Applications (1)
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CN201610524779.6A CN106102352B (en) | 2016-07-04 | 2016-07-04 | A method of solving non-symmetrical line slab warping |
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CN201610524779.6A CN106102352B (en) | 2016-07-04 | 2016-07-04 | A method of solving non-symmetrical line slab warping |
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CN106102352A true CN106102352A (en) | 2016-11-09 |
CN106102352B CN106102352B (en) | 2019-10-15 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112888199A (en) * | 2021-01-15 | 2021-06-01 | 浪潮电子信息产业股份有限公司 | Method for forming pin jack of multilayer PCB |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020042658A (en) * | 2000-07-07 | 2002-06-05 | 미야무라 심뻬이 | Carrier-foiled composite copper foil, method for manufacturing printed circuit board with resistance circuit, and printed circuit board having resistance circuit |
CN102523704A (en) * | 2011-12-15 | 2012-06-27 | 深圳崇达多层线路板有限公司 | Production method of multi-stage HDI plate |
CN103857208A (en) * | 2012-12-06 | 2014-06-11 | 深南电路有限公司 | Machining method for circuit board drilling |
-
2016
- 2016-07-04 CN CN201610524779.6A patent/CN106102352B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020042658A (en) * | 2000-07-07 | 2002-06-05 | 미야무라 심뻬이 | Carrier-foiled composite copper foil, method for manufacturing printed circuit board with resistance circuit, and printed circuit board having resistance circuit |
CN102523704A (en) * | 2011-12-15 | 2012-06-27 | 深圳崇达多层线路板有限公司 | Production method of multi-stage HDI plate |
CN103857208A (en) * | 2012-12-06 | 2014-06-11 | 深南电路有限公司 | Machining method for circuit board drilling |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112888199A (en) * | 2021-01-15 | 2021-06-01 | 浪潮电子信息产业股份有限公司 | Method for forming pin jack of multilayer PCB |
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