CN106098699B - A kind of array substrate, its production method, display panel and preparation method thereof - Google Patents
A kind of array substrate, its production method, display panel and preparation method thereof Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 144
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 61
- 238000002360 preparation method Methods 0.000 title abstract description 6
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 65
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 65
- 238000000034 method Methods 0.000 claims abstract description 37
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 35
- 229920005591 polysilicon Polymers 0.000 claims abstract description 27
- 239000010410 layer Substances 0.000 claims description 204
- 229920002120 photoresistant polymer Polymers 0.000 claims description 54
- 239000011229 interlayer Substances 0.000 claims description 26
- 239000000463 material Substances 0.000 claims description 26
- 230000004913 activation Effects 0.000 claims description 24
- 229910052751 metal Inorganic materials 0.000 claims description 16
- 239000002184 metal Substances 0.000 claims description 16
- 230000000717 retained effect Effects 0.000 claims description 15
- 238000009413 insulation Methods 0.000 claims description 14
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 12
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 8
- 238000005984 hydrogenation reaction Methods 0.000 claims description 8
- 238000004381 surface treatment Methods 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 7
- 239000004020 conductor Substances 0.000 claims description 7
- 238000005516 engineering process Methods 0.000 claims description 7
- 239000007788 liquid Substances 0.000 claims description 7
- 238000002161 passivation Methods 0.000 claims description 7
- 238000000059 patterning Methods 0.000 claims description 7
- 239000011347 resin Substances 0.000 claims description 7
- 229920005989 resin Polymers 0.000 claims description 7
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 6
- 229910052733 gallium Inorganic materials 0.000 claims description 6
- 229910052738 indium Inorganic materials 0.000 claims description 6
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical group [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 6
- 239000011787 zinc oxide Substances 0.000 claims description 6
- 238000002425 crystallisation Methods 0.000 claims description 4
- 230000008025 crystallization Effects 0.000 claims description 4
- 238000006356 dehydrogenation reaction Methods 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 4
- 230000002093 peripheral effect Effects 0.000 claims description 4
- -1 grid Substances 0.000 claims description 2
- 230000000694 effects Effects 0.000 abstract description 10
- 239000002210 silicon-based material Substances 0.000 abstract description 9
- 238000005457 optimization Methods 0.000 abstract description 3
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000002344 surface layer Substances 0.000 description 3
- 238000003491 array Methods 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000002346 layers by function Substances 0.000 description 1
- 150000002927 oxygen compounds Chemical class 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1229—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with different crystal properties within a device or between different devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
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Abstract
The invention discloses a kind of array substrates, its production method, display panel and preparation method thereof, display area makes active layer using metal oxide in the array substrate, so that the off-state current of the switching transistor formed is lower, and the metal oxide Jing Guo process can be become crystallite state from amorphous state, be conducive to the stability for improving switching transistor；Neighboring area makes active layer using polycrystalline silicon material simultaneously, so that the switching transistor electron mobility with higher formed, higher driving capability is made it have, suitable for building driving circuit, meets the demand of the integrated drive electronics design of array substrate neighboring area.To sum up, the active layer of metal oxide and polysilicon production switching transistor is respectively adopted in the display area Yu neighboring area of array substrate, so that the structure of optimization array substrate designs, guarantees the display effect of display product and improves product yield.
Description
Technical field
The present invention relates to field of display technology more particularly to a kind of array substrate, its production method, display panel and its systems
Make method.
Background technique
Currently, display technology is widely used in the display of TV, mobile phone and public information.Wherein for driving display
The structure for the array substrate that device is shown, as shown in Figure 1, specifically including that the light shield layer 1 on underlay substrate, buffering
Layer 2, active layer 3, gate insulation layer 4, interlayer dielectric layer 5, grid 6, source electrode 7 and drain electrode 8, public electrode 9, pixel electrode 10；Its
In, active layer uses polycrystalline silicon material, and light shield layer prevents active layer from producing for blocking influence of the ambient to polycrystalline silicon material
Raw photo-generated carrier, and then influence the switching characteristic of switching transistor.However use polycrystalline silicon material as active layer material
Switching transistor, off-state current is larger, causes switching transistor to have biggish leakage current, so that the picture of display area
Plain switching characteristic is unstable, affects the display effect of display device, reduces the yield of display product；But its electron mobility
It is higher, it makes it have compared with high driving ability, therefore using the switching transistor of polycrystalline silicon material production active layer, suitable for building
The driving circuit on array substrate periphery.
Therefore, how the structure of optimization array substrate designs, so that the display effect and product yield of display product are improved,
It is those skilled in the art's technical problem urgently to be resolved.
Summary of the invention
The embodiment of the invention provides a kind of array substrates, its production method, display panel and preparation method thereof, to excellent
The structure design for changing array substrate, to improve the display effect and product yield of display product.
The embodiment of the invention provides a kind of production methods of array substrate, comprising:
The figure for being located at the first active layer of neighboring area is formed on underlay substrate；The wherein material of first active layer
Material is polysilicon；
The figure for being located at the second active layer of display area is formed on the underlay substrate；Wherein second active layer
Material be metal oxide；
Technique is carried out to the underlay substrate of the figure of the figure and second active layer that are formed with first active layer
Processing, makes the metal oxide be converted into crystallite state by amorphous state.
It is right in the production method of above-mentioned array substrate provided in an embodiment of the present invention in a kind of possible embodiment
The underlay substrate for being formed with the figure of first active layer and the figure of second active layer carries out process, makes described
Metal oxide is converted into crystallite state by amorphous state, specifically includes:
High-temperature activation processing is carried out to the underlay substrate for the figure for being formed with second active layer, aoxidizes the metal
Object is converted into crystallite state by amorphous state；Wherein, the temperature of the high-temperature activation processing is 400-700 DEG C.
In a kind of possible embodiment, in the production method of above-mentioned array substrate provided in an embodiment of the present invention,
It is formed after the figure of first active layer, before the figure for forming second active layer, further includes:
On the underlay substrate of figure for being formed with first active layer, gate insulation layer, grid and inter-level dielectric are formed
The figure of layer；Wherein,
The figure of the grid includes the figure of the grid positioned at the display area and the grid positioned at the neighboring area
The figure of pole；
The figure of the interlayer dielectric layer includes positioned at the neighboring area and running through the gate insulation layer and the interlayer
The figure of the via hole of dielectric layer.
In a kind of possible embodiment, in the production method of above-mentioned array substrate provided in an embodiment of the present invention,
It is formed after the figure of the interlayer dielectric layer, before the figure for forming second active layer, further includes:
It is cleaned using underlay substrate of the buffered etch liquid to the figure for being formed with the interlayer dielectric layer.
In a kind of possible embodiment, in the production method of above-mentioned array substrate provided in an embodiment of the present invention, shape
At the process of the figure of second active layer, specifically include:
On the underlay substrate after being cleaned using buffered etch liquid, depositing metal oxide film；
It is exposed using gray scale mask plate, photoresist completely removes region, region and light is fully retained in photoresist for formation
Photoresist partly retains region；Wherein, the graphics field that region corresponds to second active layer, the light is fully retained in the photoresist
Photoresist half retains region and correspond to the via area on the interlayer dielectric layer, the photoresist completely remove region for except with it is described
Other regions outside second active layer and the corresponding region of the via hole；
It completely removes region to the photoresist to perform etching, removing the photoresist, to completely remove region corresponding described
Metal-oxide film；
The photoresist that half reservation region of region and the photoresist is fully retained to the photoresist is ashed, the light
The photoresist that region is fully retained in photoresist is thinning, and the photoresist that the photoresist half retains region is completely removed；
Plasma surface treatment is carried out to the metal-oxide film not being covered by photoresist, makes the metal oxygen
Compound film becomes conductor；
It removes the photoresist and the remaining photoresist in region is fully retained, form the figure of second active layer.
In a kind of possible embodiment, in the production method of above-mentioned array substrate provided in an embodiment of the present invention, institute
Stating metal oxide is indium gallium zinc oxide.
It is right in the production method of above-mentioned array substrate provided in an embodiment of the present invention in a kind of possible embodiment
The underlay substrate for being formed with the figure of second active layer carries out high-temperature activation processing, makes the metal oxide by amorphous state
It is converted into after crystallite state, further includes:
To high-temperature activation, treated that the underlay substrate carries out hydrogenation treatment；
Source electrode, drain electrode, resin layer, public electrode, passivation layer and pixel electricity are formed on underlay substrate after hydrogenation treatment
The figure of pole.
In a kind of possible embodiment, in the production method of above-mentioned array substrate provided in an embodiment of the present invention,
The figure for being located at the first active layer of the neighboring area is formed on the underlay substrate, is specifically included:
The deposited amorphous silicon on the underlay substrate is converted into amorphous silicon more by dehydrogenation technique and crystallization process
Crystal silicon, and form by patterning processes the figure of first active layer.
In a kind of possible embodiment, in the production method of above-mentioned array substrate provided in an embodiment of the present invention,
It is formed after the figure of the gate insulation layer and the grid, further includes:
Using self-registered technology, first active layer is doped, forms heavily doped region and lightly doped region.
The embodiment of the invention provides a kind of production method of display panel, including provided in an embodiment of the present invention above-mentioned
The production method of array substrate.
The embodiment of the invention provides a kind of array substrates, are divided into display area and neighboring area, the array substrate packet
Include: the first active layer positioned at the neighboring area and second positioned at the display area being formed on underlay substrate are active
Layer；Wherein,
The material of first active layer is polysilicon；
The material of second active layer is the metal oxide including at least the micro- crystalline structure in part.
In a kind of possible embodiment, in above-mentioned array substrate provided in an embodiment of the present invention, the metal oxidation
Object forms the metal oxide for including at least the micro- crystalline structure in part by high-temperature activation processing, wherein at the high-temperature activation
The temperature of reason is 400-700 DEG C.
In a kind of possible embodiment, in above-mentioned array substrate provided in an embodiment of the present invention, the array substrate
Further include: interlayer dielectric layer, source electrode and drain electrode；Wherein,
The interlayer dielectric layer of the neighboring area has multiple via holes, has metal-oxide film in the via hole；Institute
It states source electrode and the drain electrode is located on the interlayer dielectric layer, and respectively by passing through plasma in the via hole
The metal-oxide film of surface treatment is electrical connected with first active layer；
The source electrode of the display area and the drain electrode are located at second active layer.
In a kind of possible embodiment, in above-mentioned array substrate provided in an embodiment of the present invention, the metal oxidation
Object is indium gallium zinc oxide.
In a kind of possible embodiment, in above-mentioned array substrate provided in an embodiment of the present invention, the array substrate
Further include:
Gate insulation layer, grid, resin layer, public electrode, passivation layer and pixel electrode；Wherein,
Second active layer is located on the grid of the display area, and first active layer is located at the peripheral region
Under the grid in domain.
The embodiment of the invention provides a kind of display panels, including above-mentioned array substrate provided in an embodiment of the present invention.
The beneficial effect of the embodiment of the present invention includes:
The embodiment of the invention provides a kind of array substrate, its production method, display panel and preparation method thereof, the arrays
The production method of substrate, comprising: the figure for being located at the first active layer of neighboring area is formed on underlay substrate；Wherein first has
The material of active layer is polysilicon；The figure for being located at the second active layer of display area is formed on underlay substrate；Wherein second has
The material of active layer is metal oxide；The underlay substrate of the figure for the second active layer of figure for being formed with the first active layer is carried out
Process oxidizes metal object by amorphous state and is converted into crystallite state.Display area is aoxidized using metal in this way in array substrate
Object makes active layer, so that the off-state current of the switching transistor formed is lower, and the metal oxide Jing Guo process can
To become crystallite state from amorphous state, be conducive to the stability for improving switching transistor；Neighboring area uses polycrystalline silicon material simultaneously
Active layer is made, so that the switching transistor electron mobility with higher formed, makes it have higher driving capability, is fitted
For building driving circuit, meet the demand of the integrated drive electronics design of array substrate neighboring area.To sum up, array substrate
The active layer of metal oxide and polysilicon production switching transistor is respectively adopted in display area and neighboring area, to optimize battle array
The structure of column substrate designs, and guarantees the display effect of display product and improves product yield.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of array substrate in the prior art；
Fig. 2 is the production method flow chart of array substrate provided in an embodiment of the present invention；
Fig. 3 is the method flow diagram of second active layer of production provided in an embodiment of the present invention；
Fig. 4 is the structural schematic diagram of array substrate provided in an embodiment of the present invention.
Specific embodiment
With reference to the accompanying drawing, to array substrate provided in an embodiment of the present invention, its production method, display panel and its production
Method obtains specific embodiment and is described in detail.
The embodiment of the invention provides a kind of production methods of array substrate, as shown in Fig. 2, may include:
S101, the figure for being located at the first active layer of neighboring area is formed on underlay substrate；Wherein first active layer
Material is polysilicon；
S102, the figure for being located at the second active layer of display area is formed on underlay substrate；Wherein second active layer
Material is metal oxide；
S103, the underlay substrate of the figure of the figure for being formed with the first active layer and the second active layer is carried out at technique
Reason, oxidizes metal object by amorphous state and is converted into crystallite state.
Above-mentioned array substrate provided in an embodiment of the present invention, display area make active layer using metal oxide, make
The off-state current for the switching transistor that must be formed is lower, and the metal oxide Jing Guo process can become micro- from amorphous state
Crystalline state is conducive to the stability for improving switching transistor；Neighboring area makes active layer using polycrystalline silicon material simultaneously, so that shape
At switching transistor electron mobility with higher, make it have higher driving capability, suitable for building driving circuit,
Meet the demand of the integrated drive electronics design of array substrate neighboring area.To sum up, the display area and peripheral region of array substrate
The active layer of metal oxide and polysilicon production switching transistor is respectively adopted in domain, so that the structure of optimization array substrate is set
Meter guarantees the display effect of display product and improves product yield.
In the specific implementation, in the production method of above-mentioned array substrate provided in an embodiment of the present invention, step S103 can be with
It specifically includes: high-temperature activation processing being carried out to the underlay substrate for the figure for being formed with the second active layer, oxidizes metal object by non-
Crystalline state is converted into crystallite state；Wherein, the temperature of high-temperature activation processing is 400-700 DEG C.Specifically, metal oxide can pass through
400-700 DEG C of high-temperature activation processing, makes it be converted into crystallite state by amorphous state, and the metal oxide of crystallite state is brilliant as switch
The active layer material of body pipe can make the performance of switching transistor more stable.In addition, high-temperature activation processing can also repair battle array
The lattice damage caused by polysilicon in column substrate manufacturing process.In this way in the switching transistor of the display area of array substrate,
Material using metal oxide as active layer, it is ensured that its off-state current is lower, and by making out after high-temperature activation
The switch performance for closing transistor is more stable, ensure that the switching characteristic of pixel switch, helps to ensure that the display effect of display product
Fruit, while improving the yield of display product.
In the specific implementation, in the production method of above-mentioned array substrate provided in an embodiment of the present invention, have in formation first
It can also include: in the figure for being formed with the first active layer before the figure for forming the second active layer after the figure of active layer
Underlay substrate on, formed gate insulation layer, grid and interlayer dielectric layer figure；Wherein, the figure of grid includes being located at display
The figure of the figure of the grid in region and the grid positioned at neighboring area；The figure of interlayer dielectric layer include positioned at neighboring area and
Through the figure of gate insulation layer and the via hole of interlayer dielectric layer.Specifically, it after the figure for forming the first active layer, is being formed
It further include the figure to form gate insulation layer, grid and interlayer dielectric layer before the figure of second active layer, such display area
The figure of grid is formed in front of the second active layer, therefore the switching transistor that display area is formed is bottom gate type, in this way can be with
Save the production of light shield layer；And the first active layer of neighboring area is formed in front of the figure of grid, but neighboring area is impermeable
The region of light, therefore the production of light shield layer can also be saved, while including via hole in the figure of neighboring area interlayer dielectric layer
Figure, source electrode and drain electrode of the via hole for the first active layer to be formed with the later period are connected.
In the specific implementation, in the production method of above-mentioned array substrate provided in an embodiment of the present invention, it is situated between forming interlayer
It can also include: using buffered etch liquid to being formed with layer before the figure for forming the second active layer after the figure of matter layer
Between the underlay substrate of figure of dielectric layer cleaned.Specifically, the oxidation that the polysilicon surface layer in via hole is formed in order to prevent
Layer influences contact of the source electrode and drain electrode with polysilicon, can be using the more of BOE (buffer oxide etch) cleaning removal via hole
The oxide layer on crystal silicon surface layer cleans array substrate using buffered etch liquid, the oxide layer on polysilicon surface layer is removed, and
Cleaning process can have an impact the second active layer to avoid cleaning before forming the second active layer.
In the specific implementation, in the production method of above-mentioned array substrate provided in an embodiment of the present invention, it is active to form second
The process of the figure of layer, as shown in figure 3, can specifically include:
S201, using buffered etch liquid cleaned after underlay substrate on, depositing metal oxide film；
S202, it is exposed using gray scale mask plate, photoresist completely removes region, region is fully retained in photoresist for formation
Partly retain region with photoresist；Wherein, the graphics field of corresponding second active layer in region is fully retained in photoresist, and photoresist half is protected
Region is stayed to correspond to the via area on interlayer dielectric layer, it is except corresponding with the second active layer and via hole that photoresist, which completely removes region,
Region outside other regions；
S203, region is completely removed to photoresist performing etching, removal photoresist completely removes the corresponding metal oxygen in region
Compound film；
S204, the photoresist for photoresist being fully retained half reservation region of region and photoresist are ashed, and photoresist is complete
All risk insurance stays the photoresist in region thinning, and the photoresist that photoresist half retains region is completely removed；
S205, plasma surface treatment is carried out to the metal-oxide film not being covered by photoresist, oxidized metal
Object film becomes conductor；
The remaining photoresist in region is fully retained in S206, stripping photoresist, forms the figure of the second active layer.
Specifically, using above-mentioned patterning processes step, the figure of the second active layer can be formed, while being retained in via hole
Metal-oxide film；It can also make the metal-oxide film conductor in via hole by plasma surface treatment, this
Polysilicon surface of the sample in via hole retains one layer of sull, can prevent from leaking cruelly polysilicon in via hole again by
Oxidation；Metal oxide can also be made to be converted into conductor by semiconductor by plasma surface treatment, so as to reduce
The contact resistance of source-drain electrode metal and polysilicon.
In the specific implementation, in the production method of above-mentioned array substrate provided in an embodiment of the present invention, metal oxide can
Think indium gallium zinc oxide, the metal oxide of array substrate design requirement can also be met using other, be not limited thereto.
In the specific implementation, in the production method of above-mentioned array substrate provided in an embodiment of the present invention, to being formed with second
The underlay substrate of the figure of active layer carries out high-temperature activation processing, oxidizes metal after object is converted into crystallite state by amorphous state,
It can also include: that hydrogenation treatment is carried out to high-temperature activation treated underlay substrate；Shape on underlay substrate after hydrogenation treatment
At the figure of source electrode, drain electrode, resin layer, public electrode, passivation layer and pixel electrode.Specifically, to the substrate after high-temperature activation
Substrate carries out hydrogenation treatment, can fill up the hydrogen bond of polysilicon, keep it more stable, and subsequent array base is formed after hydrogenation treatment
Multiple functional layers on plate, guarantee the function of array substrate.
In the specific implementation, in the production method of above-mentioned array substrate provided in an embodiment of the present invention, step S101 can be with
Specifically include: the deposited amorphous silicon on underlay substrate makes amorphous silicon be converted into polycrystalline by dehydrogenation technique and crystallization process
Silicon, and pass through the figure of patterning processes the first active layer of formation.Specifically, by depositing one layer of amorphous silicon material on underlay substrate
Material, and then by dehydrogenation technique and crystallization process, so that amorphous silicon is converted into polysilicon, has forming first by patterning processes
The figure of active layer, wherein patterning processes are identical as patterning processes in the prior art, including the techniques such as photoetching, etching, herein not
It is described further.
In the specific implementation, in the production method of above-mentioned array substrate provided in an embodiment of the present invention, gate insulation is being formed
It can also include: to be doped using self-registered technology to the first active layer after the figure of layer and grid, form heavy doping
Region and lightly doped region.Specifically, technique can be doped to the first active layer using self-registered technology and becomes half
Conductor.
Based on the same inventive concept, the embodiment of the invention provides a kind of production methods of display panel, including the present invention
The production method for the above-mentioned array substrate that embodiment provides.The principle and array that the production method of the display panel solves the problems, such as
The production method of substrate is similar, therefore the implementation of the production method of the display panel may refer to the production side of above-mentioned array substrate
The implementation of method, overlaps will not be repeated.
Based on the same inventive concept, the embodiment of the invention provides a kind of array substrate, it is divided into display area and peripheral region
Domain, as shown in figure 4, array substrate include: be formed on underlay substrate positioned at neighboring area the first active layer 01 and be located at
Second active layer 02 of display area；Wherein, the material of the first active layer 01 is polysilicon；The material of second active layer 02 is extremely
It less include the metal oxide of the micro- crystalline structure in part.
Above-mentioned array substrate provided in an embodiment of the present invention is used in display area including at least the micro- crystalline structure in part
Metal oxide makes active layer, makes active layer using polysilicon in neighboring area.Have due to being used as using metal oxide
The off-state current of the switching transistor of active layer is lower, and the metal oxide of crystallite state is conducive to improve the stabilization of switching transistor
Property, it is ensured that the stability of the switching transistor of pixel region improves the display effect and product yield of display panel.Simultaneously
Neighboring area makes its higher drive using the switching transistor electron mobility with higher of polycrystalline silicon material production active layer
Kinetic force meets the integrated drive electronics design requirement of neighboring area suitable for building driving circuit.
In the specific implementation, in above-mentioned array substrate provided in an embodiment of the present invention, metal oxide passes through high-temperature activation
Processing forms the metal oxide for including at least the micro- crystalline structure in part, wherein the temperature of high-temperature activation processing is 400-700
℃.Specifically, metal oxide can be handled by 400-700 DEG C of high-temperature activation, it is made to be converted into crystallite state by amorphous state, micro-
Active layer material of the metal oxide of crystalline state as switching transistor, can make the performance of switching transistor more stable.This
Switching transistor of the sample in the display area of array substrate, material using metal oxide as active layer, it is ensured that its
Off-state current is lower, and by making the switch performance of switching transistor more stable after high-temperature activation, ensure that pixel switch
Switching characteristic, helps to ensure that the display effect of display product, while improving the yield of display product.
In the specific implementation, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in figure 4, array substrate may be used also
To include: interlayer dielectric layer 03, source electrode 04 and drain electrode 05；Wherein, the interlayer dielectric layer 03 of neighboring area has multiple via holes, mistake
There is metal-oxide film 06 in hole；Source electrode 04 and drain electrode 05 are located on interlayer dielectric layer 03, and are passed through respectively
The metal-oxide film 06 by plasma surface treatment in hole is electrical connected with the first active layer 01；Display area
Source electrode 04 and drain electrode 05 are located on the second active layer 02.Specifically, the polysilicon surface in the via hole of neighboring area retains
One layer of metal-oxide film, can prevent the polysilicon being exposed in via hole to be oxidized again；Plasma can also be passed through
Body surface surface treatment makes metal oxide be converted into conductor by semiconductor, so as to reduce connecing for source-drain electrode metal and polysilicon
Electric shock resistance.
In the specific implementation, in above-mentioned array substrate provided in an embodiment of the present invention, metal oxide can be indium gallium zinc
Oxide can also meet the metal oxide of array substrate design requirement using other, be not limited thereto.
In the specific implementation, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in figure 4, array substrate may be used also
With include: gate insulation layer 07, grid 08, resin layer, public electrode, passivation layer and pixel electrode (be not shown in Fig. 4 resin layer,
Public electrode, passivation layer and pixel electrode)；Wherein, the second active layer 02 is located on the grid 08 of display area, and first is active
Layer 01 is located under the grid 08 of neighboring area.Specifically, the grid of display area is located under the second active layer, and formation is opened
Pass transistor is bottom gate type, can save the production of light shield layer in this way；And the first active layer of neighboring area is located under grid,
The switching transistor of formation is top gate type, but neighboring area is lighttight region, therefore can also save the production of light shield layer.
Based on the same inventive concept, the embodiment of the invention provides a kind of display panels, including the embodiment of the present invention to provide
Above-mentioned array substrate.The display panel can be applied to mobile phone, tablet computer, television set, display, laptop, number
Any products or components having a display function such as code photo frame, navigator.The principle and battle array solved the problems, such as due to the display panel
Column substrate is similar, therefore the implementation of the display panel may refer to the implementation of above-mentioned array substrate, and overlaps will not be repeated.
The embodiment of the invention provides a kind of array substrate, its production method, display panel and preparation method thereof, the arrays
The production method of substrate, comprising: the figure for being located at the first active layer of neighboring area is formed on underlay substrate；Wherein first has
The material of active layer is polysilicon；The figure for being located at the second active layer of display area is formed on underlay substrate；Wherein second has
The material of active layer is metal oxide；To the underlay substrate of the figure of the figure for being formed with the first active layer and the second active layer into
Row process oxidizes metal object by amorphous state and is converted into crystallite state.Display area uses metal oxygen in this way in array substrate
Compound makes active layer, so that the off-state current of the switching transistor formed is lower, and the metal oxide Jing Guo process
It can become crystallite state from amorphous state, be conducive to the stability for improving switching transistor；Neighboring area uses polysilicon material simultaneously
Material production active layer, so that the switching transistor electron mobility with higher formed, makes it have higher driving capability,
Suitable for building driving circuit, meet the demand of the integrated drive electronics design of array substrate neighboring area.To sum up, array substrate
Display area and neighboring area be respectively adopted metal oxide and polysilicon production switching transistor active layer, to optimize
The structure of array substrate designs, and guarantees the display effect of display product and improves product yield.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (14)
1. a kind of production method of array substrate characterized by comprising
The figure for being located at the first active layer of neighboring area is formed on underlay substrate；Wherein the material of first active layer is
Polysilicon；
The figure for being located at the second active layer of display area is formed on the underlay substrate；The wherein material of second active layer
Material is metal oxide；
Process is carried out to the underlay substrate of the figure of the figure and second active layer that are formed with first active layer,
The metal oxide is set to be converted into crystallite state by amorphous state；
Wherein, the process for forming the figure of second active layer, specifically includes:
On the underlay substrate after being cleaned using buffered etch liquid, depositing metal oxide film；
It is exposed using gray scale mask plate, photoresist completely removes region, region and photoresist is fully retained in photoresist for formation
Half retains region；Wherein, the graphics field that region corresponds to second active layer, the photoresist is fully retained in the photoresist
Half, which retains region, corresponds to the via area on the interlayer dielectric layer of first active layer, and the photoresist completely removes region and is
Other regions in addition to region corresponding with second active layer and the via hole；
Region is completely removed to the photoresist to perform etching, and is removed the photoresist and is completely removed the corresponding metal in region
Sull；
The photoresist that half reservation region of region and the photoresist is fully retained to the photoresist is ashed, the photoresist
The photoresist that region is fully retained is thinning, and the photoresist that the photoresist half retains region is completely removed；
Plasma surface treatment is carried out to the metal-oxide film not being covered by photoresist, makes the metal oxide
Film becomes conductor；
It removes the photoresist and the remaining photoresist in region is fully retained, form the figure of second active layer.
2. production method as described in claim 1, which is characterized in that the figure that is formed with first active layer and described
The underlay substrate of the figure of second active layer carries out process, and the metal oxide is made to be converted into crystallite state by amorphous state,
It specifically includes:
High-temperature activation processing is carried out to the underlay substrate of the figure for being formed with second active layer, make the metal oxide by
Amorphous state is converted into crystallite state；Wherein, the temperature of the high-temperature activation processing is 400-700 DEG C.
3. production method as claimed in claim 1 or 2, which is characterized in that after the figure for forming first active layer,
Before the figure for forming second active layer, further includes:
On the underlay substrate of figure for being formed with first active layer, gate insulation layer, grid and the inter-level dielectric are formed
The figure of layer；Wherein,
The figure of the grid includes the figure of the grid positioned at the display area and the grid positioned at the neighboring area
Figure；
The figure of the interlayer dielectric layer includes positioned at the neighboring area and running through the gate insulation layer and the inter-level dielectric
The figure of the via hole of layer.
4. production method as claimed in claim 3, which is characterized in that after the figure for forming the interlayer dielectric layer,
It is formed before the figure of second active layer, further includes:
It is cleaned using underlay substrate of the buffered etch liquid to the figure for being formed with the interlayer dielectric layer.
5. production method as described in claim 1, which is characterized in that the metal oxide is indium gallium zinc oxide.
6. production method as claimed in claim 2, which is characterized in that the substrate to the figure for being formed with second active layer
Substrate carries out high-temperature activation processing, is converted into the metal oxide after crystallite state by amorphous state, further includes:
To high-temperature activation, treated that the underlay substrate carries out hydrogenation treatment；
Source electrode, drain electrode, resin layer, public electrode, passivation layer and pixel electrode are formed on underlay substrate after hydrogenation treatment
Figure.
7. production method as described in claim 1, which is characterized in that formed on the underlay substrate and be located at the peripheral region
The figure of first active layer in domain, specifically includes:
Deposited amorphous silicon makes amorphous silicon be converted into polysilicon by dehydrogenation technique and crystallization process on the underlay substrate,
And the figure of first active layer is formed by patterning processes.
8. production method as claimed in claim 3, which is characterized in that in the figure for forming the gate insulation layer and the grid
Later, further includes:
Using self-registered technology, first active layer is doped, forms heavily doped region and lightly doped region.
9. a kind of production method of display panel, which is characterized in that including such as described in any item array substrates of claim 1-8
Production method.
10. a kind of array substrate, is divided into display area and neighboring area, which is characterized in that the array substrate includes: to be formed in
The first active layer positioned at the neighboring area on underlay substrate and the second active layer positioned at the display area；Wherein,
The material of first active layer is polysilicon；
The material of second active layer is the metal oxide including at least the micro- crystalline structure in part；
Wherein, the array substrate further include: interlayer dielectric layer, source electrode and drain electrode；Wherein,
The interlayer dielectric layer of the neighboring area has multiple via holes, has metal-oxide film in the via hole；The source
Pole and the drain electrode are located on the interlayer dielectric layer, and pass through the process plasma surface in the via hole respectively
The metal-oxide film of processing is electrical connected with first active layer；
The source electrode of the display area and the drain electrode are located at second active layer.
11. array substrate as claimed in claim 10, which is characterized in that the metal oxide handles shape by high-temperature activation
At the metal oxide for including at least the micro- crystalline structure in part, wherein the temperature of the high-temperature activation processing is 400-700 DEG C.
12. array substrate as claimed in claim 10, which is characterized in that the metal oxide is indium gallium zinc oxide.
13. array substrate as claimed in claim 12, which is characterized in that the array substrate further include:
Gate insulation layer, grid, resin layer, public electrode, passivation layer and pixel electrode；Wherein,
Second active layer is located on the grid of the display area, and first active layer is located at the neighboring area
Under grid.
14. a kind of display panel, which is characterized in that including such as described in any item array substrates of claim 10-13.
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| US10418385B2 (en) | 2016-11-18 | 2019-09-17 | Shanghai Tianma Micro-electronics Co., Ltd. | Array substrate and fabrication method thereof, display panel |
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| CN109991817A (en) | 2017-12-29 | 2019-07-09 | 上海视涯信息科技有限公司 | A kind of light shield of silicon substrate display panel and forming method thereof and its exposure technology |
| CN109326611B (en) * | 2018-09-30 | 2021-04-27 | 厦门天马微电子有限公司 | Array substrate, manufacturing method thereof and display panel |
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