CN106054986B - Crop greenhouse atmosphere control system - Google Patents

Crop greenhouse atmosphere control system Download PDF

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Publication number
CN106054986B
CN106054986B CN201610454829.8A CN201610454829A CN106054986B CN 106054986 B CN106054986 B CN 106054986B CN 201610454829 A CN201610454829 A CN 201610454829A CN 106054986 B CN106054986 B CN 106054986B
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cycle
time
signal
voltage
true
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CN106054986A (en
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张金木
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Yanchuan County innovation Machinery Manufacturing Co., Ltd.
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Fuzhou Taijiang Chaoren Electronic Co Ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05DSYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES
    • G05D27/00Simultaneous control of variables covered by two or more of main groups G05D1/00 - G05D25/00
    • G05D27/02Simultaneous control of variables covered by two or more of main groups G05D1/00 - G05D25/00 characterised by the use of electric means
    • AHUMAN NECESSITIES
    • A01AGRICULTURE; FORESTRY; ANIMAL HUSBANDRY; HUNTING; TRAPPING; FISHING
    • A01GHORTICULTURE; CULTIVATION OF VEGETABLES, FLOWERS, RICE, FRUIT, VINES, HOPS OR SEAWEED; FORESTRY; WATERING
    • A01G9/00Cultivation in receptacles, forcing-frames or greenhouses; Edging for beds, lawn or the like
    • A01G9/24Devices or systems for heating, ventilating, regulating temperature, illuminating, or watering, in greenhouses, forcing-frames, or the like
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02ATECHNOLOGIES FOR ADAPTATION TO CLIMATE CHANGE
    • Y02A40/00Adaptation technologies in agriculture, forestry, livestock or agroalimentary production
    • Y02A40/10Adaptation technologies in agriculture, forestry, livestock or agroalimentary production in agriculture
    • Y02A40/25Greenhouse technology, e.g. cooling systems therefor

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  • Life Sciences & Earth Sciences (AREA)
  • Environmental Sciences (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Selective Calling Equipment (AREA)

Abstract

The present invention relates to a kind of crop greenhouse atmosphere control system, and comprising multiple data acquisition units, multiple appliance controllers and a main controller, main controller is contacted by GSM nets with owner.Appliance controller output controls through Phototube Coupling, bidirectional triode thyristor control or relay contact circuit, is concatenated into the power supply of stove, pump electric equipment, controls it to load energized power and time.

Description

Crop greenhouse atmosphere control system
(1) technical field:
The present invention relates to a kind of crop greenhouse atmosphere control system, includes multiple data acquisition units, multiple electrical equipment controls Device and a main controller, main controller are contacted by GSM nets with owner.Appliance controller is exported through Phototube Coupling, bidirectional triode thyristor Control or the control of relay contact circuit, are concatenated into the power supply of stove, pump electric equipment, control it to load energized power and time.
(2) background technology:
The control system of power supply is provided by power network, its each electronic equipment or intermodule are communicated by special circuit, To correct the timing time of each electronic equipment or electronic module, reach synchronous operation purpose.Due to being made using special circuit communication Wiring complicates and increases cost, if timing time is not corrected by line traffic, due to traditional timing error, runs number After hour, it, which accumulates timing error, can make system control action inconsistent, may cause system crash, and at some, often change is set Meter, its products application of the big occasion of wiring installation amount are restricted.
(3) content of the invention:
The present invention relates to crop greenhouse atmosphere control system, comprising multiple data acquisition units, multiple appliance controllers and One main controller, each data acquisition unit include one or several Temperature Humidity Sensors, and data acquisition unit is by the humiture of collection Signal sends main controller to by the wave communication of power line half and handled, and main controller is contacted by GSM nets with owner.Work as data acquisition unit Humiture parameter-beyond-limit is detected, appliance controller is heating, the sprinkling irrigation load electricity for starting the electric equipments such as corresponding stove, pump Source, to keep green house temperature-humidity in control range.The panel of each data acquisition unit is equipped with 3 to 5 LED modules with different colors, access system First numbered before system.The a period of time of data acquisition unit after firm start, sequentially show LED modules with different colors combine (such as:Red, green, Blue, red green, bluish-green, red blue, RGB), each combination is corresponding with the number of numbering, when selection shows LED modules with different colors combination, Shutdown obtains corresponding numbering and preservation, and it is in the numbering period when can't detect grid cyclic wave signal, and single-chip microcomputer relies on Numbering data are stored in nonvolatile storage by the energy storage of its power capacitor.Each data acquisition unit, appliance controller and main controller, Cycle discriminator circuit is respectively mounted in its device, the lock in time for generation system keeps system to keep strokes, while logical at it Believe each installation one communications electronics switch, switch drive module in circuit.Said apparatus is connected on same electric power netting twine and set Master switch is put, an electronic switch is filled after master switch, the electronic switch parallel connection isolating diode, during communication, main controller closes Power-off sub switch simultaneously connects its communications electronics switch, civil power is sent into system through isolating diode, system is in through power line Half wave communication half-wave power supply state.Appliance controller output is through Phototube Coupling, bidirectional triode thyristor control or relay contact circuit control System, is concatenated into the system external power of stove, pump electric equipment, controls it to load energized power and time.Main controller is in setting Between or the mobile phone short message instructions that receive, it is necessary to during half wave communication, that is, perform the switching action from all-wave to half-wave.When each data Collector and appliance controller setting half-wave call duration time or and detect that power network is isolated the half-wave of diode blocking There is no signal, when system is in half-wave state, that is, cut off its stove, pump electric appliance load power supply, then connect communications electronics switch, make System is in half-wave communications status;Conversely, when before half-wave switches to all-wave, main controller is first to each data acquisition unit and electrical equipment control Device processed sends switching command, shut-off communications electronics switch or connection appliances power source.
The switch drive module of its communications electronics switch is to divide two-way after resistance is depressured from electric power netting twine, is used for all the way each Data acquisition unit and appliance controller, it through reversal connection diode be connected to each data acquisition unit, appliance controller single-chip microcomputer I/O Mouthful, when half-wave is born in clock timer timing to cycle, the I/O mouths are scanned, if being that system is in half wave communication without signal State.Another way is used for each data acquisition unit, appliance controller and main controller, and communication therebetween is controlled by lock in time to keep Keep strokes, the road is followed by the CLK ends of d type flip flop, another external interrupt of the Q termination single-chip microcomputers of d type flip flop through electric resistance partial pressure Mouth (INT0 or INT1), fracture is arranged to level triggers in this.The D ends ground connection of d type flip flop, its S end and the I/O mouth phases of single-chip microcomputer Connect, original state S puts 1 in end.When the positive square-wave signal at CLK ends arrives, its rising edge sets to 0 d type flip flop, and external interrupt mouth is low Level produce interruption, first make in interrupt service routine S ends set to 0 make d type flip flop put 1 i.e. Q ends be 1 and the Central Shanxi Plain is broken, then carry out Communication, communications electronics switch is connected to single-chip microcomputer corresponding port according to used communication mode, and carries out signal condition, before sign off S, which puts at end 1, makes out the communication of the next cycle of interrupt latency, so goes round and begins again and realizes half wave communication.
SMS R-T unit is installed in system, using GSM network, led to receiving and dispatching short message mode with owner Letter, GSM SMS messaging service at present is still that a kind of short message service GSM SMS of domestic popularity rate highest possesses data in itself Transmitting function, the transmission of a message, which just constitutes, once to communicate, and the transmission of message is by the Short Message Service outside GSM (SMSC) is relayed at center, and it does not have to dialing and can establish connection by GSM SMS service SMS, and user is the information to be sent out Short message service center is sent to plus stay of two nights data, the final stay of two nights is then forwarded to after short message service center completes storage. So information will not lose when GSM terminals are not started shooting.
The present invention utilizes the positive half cycle ascent stage of power network cycle, takes three to screen point and realizes that the identification to cycle signal is sentenced It is fixed, recycle the cycle time to establish lock in time, realize main controller and each data acquisition unit in system, each appliance controller it is same Step operation.
Main controller and each data acquisition unit, each appliance controller cycle discriminator circuit structural representation as shown in Fig. 2 by Two voltage comparators using hysteresis loop comparators form, and include filter circuit in each voltage comparator, its voltage ratio compared with The reference voltage of device is provided by mu balanced circuit.System sets clock timer and synchrotimer.If detect adjacent two Individual cycle signal is true, then takes out the clock timer timing time between this two adjacent cycle signal zero passages, sequentially It is stored in cycle time memory cell, the cycle time memory cell can deposit 100 cycle times, and one is often stored in when being filled with The cycle time, the cycle time being stored at first is first removed, and calculates the average value Tz of the cycle time of deposit and preserve, Differentiate cycle signal to be identified using Tz values, reduced with reducing the influence of power network frequency fluctuation, while point being screened using three Judge possibility by accident.
Two comparators are respectively used to screen point 1, screen point 2, as shown in Figure 1.In the cycle of cycle positive half cycle ascent stage At zero passage, that is, screen point 0 and voltage zero-cross detection module is set, it is entered using cycle positive half-wave signal through electric resistance partial pressure, diode The clock end CLK of d type flip flop, the Q termination single-chip microcomputer external interrupts of d type flip flop are sent into after one step isolation negative half period, signal condition Mouthful, the external interrupt mouth is arranged to level triggers, the D ends ground connection of d type flip flop, and S terminates single-chip processor i/o mouth, and usually the I/O mouths are put 1.When cycle positive half-wave zero cross signal arrives, cycle signal rising edge immediately after makes d type flip flop Q ends be 0, outside single-chip microcomputer Fracture low level in portion, interrupted so as to produce, the execute instruction in interrupt service routine:The I/O mouths are set to 0, the Central Shanxi Plain is disconnected, meter When, the I/O mouths put 1, open interruption.Remaining two comparator is separately positioned on the cycle positive half cycle ascent stage, crest voltage The examination point 1 at 35% to 50% place and the examination point 2 at 50% to 70% place.
Cycle signal determining:After setting time opens interruption, clock timer resets and starts timing single-chip microcomputer, works as cycle During voltage zero-cross, the output voltage for being arranged on d type flip flop in the voltage zero-cross inspection survey mould block ﹙ V0 ﹚ for screen point 0 jumps vanishing, production It is raw to interrupt, record its zero crossing break period Th0;Hereafter, the output electricity of electricity pressure comparator ﹙ V1 ﹚ at point 1 is screened in single-chip microcomputer scanning Pressure, when all wave voltages are reached to ﹙ V1 ﹚ threshold voltage, output voltage saltus step from high to low, scanning records its bound-time Th1; Same scanning record screens electricity pressure comparator ﹙ V2 ﹚ output voltage bound-time Th2 at point 2, and Th0 and voltage zero-cross are detected into mould Kuai ﹙ V0 ﹚ output voltage bound-time setting value Ts0 makes comparisons;Th1 and electricity pressure comparator ﹙ V1 ﹚ output voltage bound-time Setting value Ts1 and Th2 makes comparisons respectively with electricity pressure comparator ﹙ V2 ﹚ output voltage bound-time setting value Ts2, if In the range of allowable error, then the discriminator signal detected is true, is otherwise false.When above-mentioned judgement discriminator signal is true, calculate During clock timer timing between cycle signal zero passage when this cycle signal zero passage and an adjacent preceding discriminator signal are true Between Tzu, it is made comparisons with the average value Tz of cycle time, the cycle signal if no more than setting cycle time error Tzv It is true, at this moment preserves Tzu and take 20ms to be added with synchrotimer timing time, in the value deposit synchrotimer that will add up.
When clock timer starts timing with cycle voltage zero-cross, then timing to 16ms opens the break period between 18.5ms Open interruption during setting value Tk, clock timer timing to 25ms to Central Shanxi Plain during pass break period setting value Tn between 27ms is broken.
After system boot, clock timer starts timing, when detecting first cycle voltage zero-cross, is arranged on examination The voltage zero-cross Jian of point 0 surveys Mo Kuai ﹙ V0 ﹚ output voltage saltus step, is interrupted so as to produce, and takes out the time of cycle voltage over zero T0 is preserved, and clock timer is reset and starts timing, and at this moment cycle time voltage crosses zero Th0 is 0, while single-chip microcomputer is by above-mentioned Method scans and judges discriminator signal.What it is due to detection is first cycle, and clock timer is opened in cycle voltage zero-cross Beginning timing, its Th0, Th1 and Th2 value must add the difference that cycle time 20ms subtracts out break period setting value Tk, such as Three discriminator signals of fruit are true, and i.e. opening the break period for the first time takes Tk next time.Otherwise it is fictitious time, now clock timer time T0 must be added, continue to detect.
When detecting first and second adjacent cycle voltage zero-cross, due to not preserving the cycle time of detection, Therefore the clock timer timing time twice between cycle signal zero passage is made comparisons with cycle time 20ms, judges cycle signal When being true, then take out clock timer cumulative time T1=T0+Tk when opening interruption and be stored in synchrotimer as initial time In, open interruption after clock timer reset, otherwise judge cycle signal be fictitious time, now the clock timer time must add T1, Continue to detect first cycle again as stated above.After it is very to detect first cycle signal, recover above-described week Ripple signal determining.
If as shown in figure 1, detecting that cycle signal is false, the break period is opened next time and opens the break period at this Afterwards, open interruptions during average value Tz through the cycle time that is delayed, and open interrupt after be delayed Tns when the Central Shanxi Plain break, when setting the Central Shanxi Plain to break Between be when cycle signal screen point 0 when do not producing interruption, at this moment must be in the setting time point more than Ts0 allowable error scopes Start to scan, and when scanning examination point 1 and examination point 2, voltage comparator output voltage does not produce saltus step, all in the Central Shanxi Plain breaks The Central Shanxi Plain was broken and stopped scanning time Tns, and Tns is:
Tns=Tn-Tk
If it is true to detect cycle signal, next cycle opens break period Tks and is:
Tks=Tk+Th0
I.e. from opening for the first time after the break period takes Tk, clock timer is that timing opens interruption to Tks, and weight after resetting New to start timing, timing is broken to Central Shanxi Plain during Tns, so that the synchrotimer time is corrected by cycle time voltage crosses zero.
Repeat said process.If the upper cycle signal detected is true, when this cycle judges, discriminator signal is Vacation, or the cycle time detected exceed setting cycle time error Tzv, or clock meter compared with the average value Tz of cycle time When device timing to close break period setting value Tns when, voltage zero-cross inspection survey the non-saltus step of mould block ﹙ V0 ﹚ output voltages, in not producing Disconnected, then when clock timer timing is to Tns, the Central Shanxi Plain is broken, and at this moment remembers that not counting cycle N is 1 and stores, when opening interruption next time Between be to open the break period in last time to open interruption after Tz, hereafter every time judge the cycle signal true and false, if false or this detection Though discriminator signal is true but last time is false, then N is taken, will restore after N+1 and do not reset after interruption is opened in memory, clock timer Continue timing, at this moment, next cycle of setting opens the break period and temporarily uses out break period interim setting value Tkz instead:
Tkz=(N+1) × Tz
Meanwhile next cycle closes break period temporary transient use instead and closes the break period interim setting value Tnz:
Tnz=Tkz+Tns
When clock timer to after Tkz, the time that point is screened in scanning can be obtained by simple computation.If at this moment examine It is true to measure cycle signal, then takes out N in memory and preserve, and by N zero setting in memory, make clock timer clocking value Ts For:(Ts-Tkz) → Ts, at this moment take (N+1) × 20ms value to be added in synchrotimer, and recover using setting value Tks with Tns, recovered clock timer are reset after interruption is opened.
The system synchronization time be synchrotimer time, along with currently just timing clock timer time.
When judging to screen the point signal true and false, Th0, Th1, Th2 are by being set with voltage comparator output voltage bound-time Definite value Ts0, Ts1, Ts2 make comparisons see it is whether overproof, come judge screen point a signal true and false, can select:Th0, Th1, Th2 are The cycle discriminator signal is true when true, or Th0 is true, while when one of Th1, Th2 are true, or when Th1, Th2 are true, should Cycle discriminator signal is true, depending on to judging the different requirements of the cycle signal true and false.
If system fault, when N is more than a setting value between 25 to 70, due to main controller in system and each data Collector, each appliance controller, its Tz value detected may be different with N values, at this moment, power network frequency accumulated error, Ke Nengzao Corrected when can not be by detecting true cycle signal into the synchrotimer time, when it is true to detect cycle signal, Directly it is added on using clocking value of the clock timer at Tkz in synchrotimer, to reduce the asynchronous time of system, electric power N is much smaller than 25 in the case of net normal operation.
The cycle time error Tzv of permission and the flip-flop transition setting value of voltage comparator output voltage, by test assessment Its average value is taken to obtain.
(4) illustrate:
Fig. 1 is that cycle screens data relationship schematic diagram;
Fig. 2 is cycle discriminator circuit structural representation;
Fig. 3 is the circuit structure block diagram of crop greenhouse atmosphere control system.
(5) embodiment:
Fig. 3 is that the circuit structure block diagram of crop greenhouse atmosphere control system includes:The ﹚ of Zhu Kong Qi ﹙ 10, communications electronics are opened Close the ﹚ of ﹙ 11, switch drives the ﹚ of dynamic model block ﹙ 12, SMS is received the ﹚ of 13 ﹚, SIM card ﹙ of transmitting apparatus ﹙ 14, the electric ﹚ of device control device ﹙ 15, cycle and discriminated Other electricity Lu ﹙ 16 ﹚, Shuo is according to the ﹚ of Cai Ji Qi ﹙ 17, the ﹚ of 18 ﹚, electricity device She Bei ﹙ of Wen Shi degree Chuan Gan Qi ﹙ 19, the ﹚ of electricity Kai Guan ﹙ 20.Wherein communicate The ﹚ of electricity Kai Guan ﹙ 11, the ﹚ of switch Qu dynamic model Kuai ﹙ 12, cycle screen Dan Pian Ji ﹙ U0 ﹚ in the ﹚ and Fig. 2 of electricity Lu ﹙ 16 and are respectively included in electricity According in the ﹚ of 17 ﹚ and Zhu Kong Qi ﹙ of Cai Ji Qi ﹙ 10, the ﹚ of electricity Kai Guan ﹙ 20, the ﹚ of communications electronics Kai Guan ﹙ 11 use double device Kong Qi ﹙ 15 ﹚, Shuo To controllable silicon as switch.
Fig. 2 is the structural representation that cycle screens the ﹚ of electricity Lu ﹙ 16, by:Shu enters electricity Lu ﹙ S0 ﹚, voltage zero-cross Jian and surveys Mo Kuai ﹙ V0 ﹚, electricity pressure comparator ﹙ V1 ﹚ and electricity pressure comparator ﹙ V2 ﹚ are formed.Dan Pian Ji ﹙ U0 ﹚ refer to the ﹚ of electricity device Kong Qi ﹙ 15, data acquisition Single-chip microcomputer in the ﹚ of 17 ﹚ and Zhu Kong Qi ﹙ of Qi ﹙ 10.Shu enters electricity Lu ﹙ S0 ﹚ and is used to mains AC voltage passing through resistance and diode Partial pressure, be converted to the suitably stable input voltage of voltage comparator.Dan Pian Ji ﹙ U0 ﹚ use 89C55WD.Electricity pressure comparator ﹙ V1 ﹚, electricity pressure comparator ﹙ V2 ﹚ use special voltage comparator LM393, and its reference voltage is the mu balanced circuit using voltage-stabiliser tube Carry out the threshold voltage of burning voltage comparator.
When mains AC voltage cycle signal zero passage, voltage zero-cross Jian surveys Mo Kuai ﹙ V0 ﹚ output voltage saltus step, single Pian Ji ﹙ U0 ﹚ produce interruption, record the break period, while Dan Pian Ji ﹙ U0 ﹚ are additionally operable to scanning voltage Bi compare Qi ﹙ V1 ﹚ and voltage ratio Compare Qi ﹙ V2 ﹚ output voltage, bound-time is recorded when output voltage saltus step, for judging power network cycle signal so as to producing Raw lock in time.
Single chip computer89C51 realizes serial communication by I2C buses and main controller in SMS R-T unit, the single-chip microcomputer 89C51 is connected also by serial line interface integrated circuit MAX232 with gsm module TC35i carries out data exchange, gsm module chip TC35i is RS232 data ports, supports AT Command Set, wherein contain the control to SMS, single chip computer89C51 is by GSM moulds Block sends a series of AT instructions, completes the initialization to gsm module and receiving short message.SMS transmitting-receiving uses TEXT patterns, TEXT patterns are a kind of tactic patterns based on ASCII character.

Claims (2)

1. crop greenhouse atmosphere control system, it is characterized in that, the panel of each data acquisition unit is equipped with 3 to 5 different colours LED, a period of time after firm start, sequentially show that LED modules with different colors combines, when selection shows LED modules with different colors combination, close Machine obtains corresponding numbering and preservation, and in the numbering period when can't detect grid cyclic wave signal, single-chip microcomputer relies on its power supply Numbering data are stored in nonvolatile storage by the energy storage of electric capacity;Each data acquisition unit, appliance controller and main controller, its device In be respectively mounted cycle discriminator circuit, for the lock in time of generation system, while each one communication of installation in its telecommunication circuit Electronic switch, switch drive module, an electronic switch is filled after master switch, the electronic switch parallel connection isolating diode, led to During letter, main controller shut-off electronic switch simultaneously connects its communications electronics switch, civil power is sent into system through isolating diode, at system In the half wave communication half-wave power supply state through power line, appliance controller output through Phototube Coupling, bidirectional triode thyristor control or after Circuit control is made electrical contact with, is concatenated into the power supply of stove, pump electric equipment, controls its energized power and time, when each data acquisition Device and appliance controller setting half-wave call duration time or and detect that the half-wave that power network is isolated diode blocking does not have Signal, communications electronics switch is connected, system is in half-wave communications status;
The switch drive module of its communications electronics switch is to divide two-way after resistance is depressured from electric power netting twine, all the way through cycle negative half The logical reversal connection diode of waveguide be connected to each data acquisition unit, appliance controller single-chip microcomputer I/O mouths, in clock timer timing When bearing half-wave to cycle, the I/O mouths are scanned, if being that system is in half-wave communications status without signal, another way is used for each number According to collector, appliance controller and main controller, the road is followed by the CLK ends of d type flip flop through electric resistance partial pressure, and the Q terminations of d type flip flop are single The external interrupt mouth of piece machine, when the positive square-wave signal at CLK ends arrives, its rising edge sets to 0 d type flip flop, and external interrupt mouth is low Level produces interruption, is communicated;SMS R-T unit is installed, using GSM network, to receive and dispatch short message mode in system Communicated with owner;
Cycle discriminator circuit is the positive half cycle ascent stage using power network cycle, takes three to screen knowledge of the point realization to cycle signal Do not judge, recycle the cycle time to establish lock in time, system sets clock timer and synchrotimer, if detecting phase Two adjacent cycle signals are true, then take out the clock timer timing time between this two adjacent cycle signal zero passages That is the cycle time, sequentially it is stored in cycle time memory cell, when being filled with 100 cycle time, is often stored in a cycle time, The cycle time being stored at first is first removed, and calculates the average value Tz of the cycle time of deposit, is treated using Tz value discriminatings Identify cycle signal;
Two comparators are respectively used to screen point 1, screen point 2, at the cycle zero passage of cycle positive half cycle ascent stage, that is, screen a little 0 set voltage zero-cross detection module, it using cycle positive half-wave signal through electric resistance partial pressure, diode further isolate negative half period, The clock end CLK of d type flip flop is sent into after signal condition, when cycle positive half-wave zero cross signal arrives, cycle letter immediately after Number rising edge makes d type flip flop Q ends be 0, and single-chip microcomputer external interrupt mouth low level is interrupted so as to produce, and two comparators are set respectively Put in cycle positive half cycle ascent stage, the examination point 1 at 35% to 50% place of crest voltage and the examination point 2 at 50% to 70% place;
Cycle signal determining:Single-chip microcomputer is after setting time opens interruption, and clock timer resets and starts timing, when all wave voltages During zero passage, the output voltage for being arranged on d type flip flop in the voltage zero-cross detection module for screening point 0 jumps vanishing, produces interruption, note Record its zero crossing break period Th0;Hereafter, the output voltage of first voltage Bi compare Qi ﹙ V1 ﹚ at point 1 is screened in single-chip microcomputer scanning, when When all wave voltages reach first voltage than threshold voltage compared with device ﹙ V1 ﹚, output voltage saltus step from high to low, scanning records its jump Become time Th1;Same scanning record screens second voltage Bi compare Qi ﹙ V2 ﹚ output voltage bound-time Th2 at point 2, if described In the range of allowable error, then the discriminator signal detected is true by bound-time Th1 and Th2, is otherwise false, above-mentioned judgement is screened When signal is true, calculate between cycle signal zero passage when this cycle signal zero passage and an adjacent preceding discriminator signal are true when Clock timer timing time Tzu, it is made comparisons with the average value Tz of cycle time, if no more than setting cycle time error Then cycle signal is true to Tzv, at this moment preserves Tzu and takes 20ms to be added with synchrotimer timing time, the value deposit that will add up In synchrotimer;
When clock timer starts timing with cycle voltage zero-cross, then timing to 16ms opens break period setting between 18.5ms Open interruption during value Tk, clock timer timing to 25ms to Central Shanxi Plain during pass break period setting value Tn between 27ms is broken;
When detecting first cycle voltage zero-cross, the output voltage for being arranged on the voltage zero-cross detection module for screening point 0 is jumped Becoming, interrupted so as to produce, the time T0 for taking out cycle voltage over zero is preserved, and clock timer is reset and starts timing, this Shi Zhoubo time voltage crosses zeros Th0 is 0, and single-chip microcomputer scans and judges discriminator signal, and its Th0, Th1 and Th2 value must add The cycle time, 20ms subtracted out break period setting value Tk difference, if three discriminator signals are true, detected cycle next time The break period of opening of voltage over zero takes Tk, is otherwise fictitious time, now the clock timer time must add T0, continue to detect;
When it is true to detect first and second adjacent cycle voltage zero-cross, judgement cycle signal, then takes out and open interruption When clock timer cumulative time T1=T0+Tk as initial time be stored in synchrotimer in, open interruption after clock timing Device is reset, and otherwise judges that cycle signal is fictitious time, now the clock timer time must add T1, continue to examine again as stated above First cycle is surveyed, after it is very to detect first cycle signal, recovers above-described cycle signal determining;
If it is false to detect cycle signal, open the break period next time after this opens the break period, through be delayed cycle when Between average value Tz when open interruption, and open interrupt after be delayed Tns when the Central Shanxi Plain break, it is when cycle signal is discriminated to set and close the break period Not Wei fictitious time, the break period Tns Central Shanxi Plain is disconnected and stop scanning, and Tns is closing:
Tns=Tn-Tk
If it is true to detect cycle signal, next cycle opens break period Tks and is:
Tks=Tk+Th0
I.e. from opening for the first time after the break period takes Tk, clock timer is that timing opens interruption to Tks, and is opened again after resetting Beginning timing, timing are broken to Central Shanxi Plain during Tns;
Said process is repeated, if the upper cycle signal detected is true, when this cycle judges, discriminator signal is vacation, Then when clock timer timing is to Tns, the Central Shanxi Plain is broken, and at this moment remembers that cycle N is 1 and stored that it is upper to open the break period next time It is secondary to open the break period interruption is opened after Tz, the cycle signal true and false is hereafter judged every time, if false or this detection discriminator signal Though being true but last time is false, then stored N is taken out, and will be restored after N+1 in storage N memory, clock timer exists Continuation timing is not reset after opening interruption, and at this moment, next cycle of setting opens the break period and temporarily uses out the break period instead and set temporarily Definite value Tkz:
Tkz=(N+1) × Tz
Meanwhile next cycle closes break period temporary transient use instead and closes the break period interim setting value Tnz:
Tnz=Tkz+Tns
When clock timer to after Tkz, if at this moment detecting that cycle signal is true, take out N in memory and preserve, and By N zero setting in memory, the clock timer clocking value Ts is set to be:Ts-Tkz is first calculated again with results modification Ts values are calculated, at this moment Take (N+1) × 20ms value to be added in synchrotimer, and recover to use setting value Tks and Tns, recovered clock timer is being opened Reset after interruption;
The system synchronization time be synchrotimer time, along with currently just timing clock timer time;
And select:Cycle discriminator signal is true when Th0, Th1, Th2 are true, or Th0 is true, while one of Th1, Th2 are When true, or when Th1, Th2 are true, cycle discriminator signal is true, if N is more than a setting value between 25 to 70, is used Clocking value of the clock timer at Tkz is directly added in synchrotimer.
2. crop greenhouse atmosphere control system according to claim 1, it is characterised in that including:
The main ﹚ of control device ﹙ 10, communications electronics, which are opened, closes the ﹚ of ﹙ 11, the ﹚ of switch drive dynamic model block ﹙ 12, SMS receipts transmitting apparatus ﹙ 13 ﹚, SIM card ﹙ The ﹚ of 14 ﹚, electricity device Kong Qi ﹙ 15, cycle screen electricity Lu ﹙ 16 ﹚, Shuo according to the ﹚ of Cai Ji Qi ﹙ 17, Wen Shi degree Chuan Gan Qi ﹙ 18 ﹚, electricity device She Bei ﹙ 19 ﹚, electricity Kai Guan ﹙ 20 ﹚, wherein Dan Pian Ji ﹙ U0 ﹚ and communications electronics Kai Guan ﹙ 11 ﹚, the ﹚ of switch Qu dynamic model Kuai ﹙ 12 and cycle are screened The ﹚ of electricity Lu ﹙ 16 are respectively included in electricity device Kong Qi ﹙ 15 ﹚, Shuo according in the ﹚ of 17 ﹚ and Zhu Kong Qi ﹙ of Cai Ji Qi ﹙ 10;
Cycle screen the ﹚ of electricity Lu ﹙ 16 by:Shu enters electricity Lu ﹙ S0 ﹚, voltage zero-cross Jian and surveys Mo Kuai ﹙ V0 ﹚, screens first voltage ratio at point 1 Compare Qi ﹙ V1 ﹚ are formed with second voltage Bi compare Qi ﹙ V2 ﹚ at point 2 are screened, and Shu enters electricity Lu ﹙ S0 ﹚ and is used to lead to mains AC voltage The partial pressure of resistance and diode is crossed, is converted to the suitably stable input voltage of voltage comparator;
Single chip computer89C51 realizes serial communication by I2C buses and main controller in SMS R-T unit, the single-chip microcomputer 89C51 is connected also by serial port MAX232 with gsm module TC35i carries out data exchange.
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