CN106026948B - A kind of high capacitance driving Low-Power CMOS trans-impedance amplifier - Google Patents
A kind of high capacitance driving Low-Power CMOS trans-impedance amplifier Download PDFInfo
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- CN106026948B CN106026948B CN201610323009.5A CN201610323009A CN106026948B CN 106026948 B CN106026948 B CN 106026948B CN 201610323009 A CN201610323009 A CN 201610323009A CN 106026948 B CN106026948 B CN 106026948B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/42—Modifications of amplifiers to extend the bandwidth
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
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Abstract
The invention discloses a kind of high capacitances to drive Low-Power CMOS trans-impedance amplifier, including adjusting cascade input stage, band feedback voltage amplifying stage and with depth feedback output grade, the output end for adjusting cascade input stage is connect and then with feedback voltage amplifying stage with the input terminal with depth feedback output grade.The present invention is by using adjusting cascade input stage, band profound and negative feedbck output stage and automatic biasing structure, realize capacitance drive capability, when input and output capacitor is all larger, it still can get biggish bandwidth, and by using band feedback voltage output stage, the amplification factor of trans-impedance amplifier can effectively be increased, while the trans-impedance amplifier multiple of trans-impedance amplifier can be accurately controlled.And the present invention can save a band-gap reference circuit by using automatic biasing structure, can effectively reduce the power consumption of trans-impedance amplifier, reduce chip area.It the composite can be widely applied in communication equipment.
Description
Technical field
The present invention relates to electronic circuit technology fields more particularly to a kind of high capacitance driving Low-Power CMOS to amplify across resistance
Device.
Background technique
With the fast development of the communication technology, high speed, stable, portable electronic equipment are at the mainstream in epoch.And
Important component of the preamplifier as communication system, performance directly affect the performance of entire communication system.
In traditional circuit design, people's ordinary practice is therefore current in using voltage as the signal variable of circuit
Voltage signal processing circuit also relative maturity.But with the development of communication technology, current mode and capacitive ultra-weak electronic signal exist
Also become increasingly common in communication system, such as in fiber optic communication, human body communication, generally use current coupling or capacitor coupling
The signals coupled modes such as conjunction, so must amplify this kind of current mode or capacitive ultra-weak electronic signal, and are transformed into electricity
Signal is pressed, is handled convenient for subsequent voltage signal processing circuit.Therefore, therefore research has low noise, high-gain, high band
Wide preamplifier seems and is highly desirable.
Now, it has been achieved for centainly being in progress in the trans-impedance amplifier based on standard CMOS process, but current research master
The trans-impedance amplifier in fiber optic communication is concentrated on, although the class A amplifier A can be in the case where input capacitance be the capacitor of 0.5pF or so
Work is in upper frequency, but this amplifier is difficult the communication system for adapting to have higher input and output capacitor, such as human body
Input capacitance in communication is typically larger than 5pF, and its power consumption is generally also larger, is not particularly suited for mobile communication equipment.
Summary of the invention
In order to solve the above-mentioned technical problem, power consumption, adaptability higher one can be reduced the object of the present invention is to provide a kind of
Kind high capacitance drives Low-Power CMOS trans-impedance amplifier.
The technical solution used in the present invention is:
A kind of high capacitance driving Low-Power CMOS trans-impedance amplifier, including adjust cascade input stage, band feedback voltage
Amplifying stage and with depth feedback output grade, the output end for adjusting cascade input stage pass through band feedback voltage amplify it is grading
And it is connect with the input terminal with depth feedback output grade.
As a further improvement of the present invention, the adjusting cascade input stage include first resistor, the first NMOS tube,
The drain electrode of second NMOS tube, third NMOS tube and first voltage amplifier, first NMOS tube is connected to by first resistor
Power end, the grid of first NMOS tube are connected to power end, the source electrode of first NMOS tube and the leakage of the second NMOS tube
Pole connection, the source electrode of second NMOS tube respectively with current signal input, the drain electrode of third NMOS tube, third NMOS tube
Grid is connected with the input terminal of first voltage amplifier, the output end of the first voltage amplifier and the grid of the second NMOS tube
Connection, the source electrode of the third NMOS tube are connected to ground, and the drain electrode of first NMOS tube is connected to band feedback voltage amplifying stage
Input terminal.
As a further improvement of the present invention, the adjusting cascade input stage include first resistor, the first NMOS tube,
Second NMOS tube, third NMOS tube, the first current-limiting resistance, the second current-limiting resistance, the 6th NMOS tube, the 7th NMOS tube, the 8th
The drain electrode of NMOS tube, the 9th NMOS tube, the tenth NMOS tube and the second PMOS tube, first NMOS tube is connected by first resistor
To power end, the grid of first NMOS tube is connected to power end, the source electrode of first NMOS tube and the second NMOS tube
Drain electrode connection, the source electrode of second NMOS tube respectively with current signal input, the drain electrode of third NMOS tube, third NMOS tube
Grid and the 7th NMOS tube grid connection, source electrode, the source electrode of the 7th NMOS tube, the 8th NMOS tube of the third NMOS tube
Source electrode and the source electrode of the tenth NMOS tube be connected to ground, the grid of second NMOS tube and the drain electrode of the 9th NMOS tube connect
Connect, the grid of first NMOS tube respectively with the grid of the 6th NMOS tube, the source electrode of the second PMOS tube and the 9th NMOS tube
The drain electrode of grid, the 6th NMOS tube is connected to power end by the first current-limiting resistance, and the drain electrode of the 9th NMOS tube is logical
It crosses the second current-limiting resistance and is connected to power end, the drain electrode of the 6th NMOS tube is connect with the grid of the second PMOS tube, and described
The source electrode of six NMOS tubes is connect with the drain electrode of the 7th NMOS tube, and the source electrode of the 9th NMOS tube and the drain electrode of the tenth NMOS tube connect
Connect, second PMOS tube drain electrode respectively with the drain electrode of the 8th NMOS tube, the grid of the 8th NMOS tube and the tenth NMOS tube
Grid is connected, and the drain electrode of first NMOS tube is connected to the input terminal with feedback voltage amplifying stage.
As a further improvement of the present invention, the band feedback voltage amplifying stage includes second resistance and second voltage amplification
Device, the output end for adjusting cascade input stage are connected to the input terminal of second voltage amplifier, and the second voltage is put
The input terminal of big device is connected to the output end of second voltage amplifier, the output of the second voltage amplifier by second resistance
End is connected to the input terminal with depth feedback output grade.
As a further improvement of the present invention, the band feedback voltage amplifying stage include second resistance, third current-limiting resistance,
4th current-limiting resistance, the 5th current-limiting resistance, the 11st NMOS tube, the 12nd NMOS tube and the 13rd NMOS tube, it is described to adjust altogether
The output end of source common-gate input stage is connected to the source electrode of the 13rd NMOS tube, the adjusting cascade by second resistance
The output end of input stage is connected to the grid of the 11st NMOS tube, the drain of the 11st NMOS tube and the 13rd NMOS tube
Drain electrode is connected to power end, and the drain electrode of the 12nd NMOS tube is connected to power end by the 4th current-limiting resistance, and described the
The drain electrode of 12 NMOS tubes is connected to the grid of the 13rd NMOS tube, and the source level of the 11st NMOS tube passes through third current limliting electricity
Resistance is connected to ground, and the source level of the 11st NMOS tube is connect with the grid of the 12nd NMOS tube, the 13rd NMOS tube
Source level is connected to ground by the 5th current-limiting resistance, and the source level of the 12nd NMOS tube is connected to ground, the 13rd NMOS tube
Source level connect with the input terminal with depth feedback output grade.
As a further improvement of the present invention, the band depth feedback output grade include the first PMOS tube, the 4th NMOS tube,
5th NMOS tube and tertiary voltage amplifier, the output end with feedback voltage amplifying stage are connected to the grid of the 4th NMOS tube
Pole, the source electrode of first PMOS tube are connected to power end, the grid of first PMOS tube respectively with tertiary voltage amplifier
Input terminal, the drain electrode of the first PMOS tube, the drain electrode of the 4th NMOS tube be connected, the source electrode and the 5th of the 4th NMOS tube
The drain electrode of NMOS tube connects, and the output end of the tertiary voltage amplifier is connect with the grid of the 5th NMOS tube, and the described 5th
The source electrode of NMOS tube is connected to ground.
As a further improvement of the present invention, the band depth feedback output grade include the first PMOS tube, the 4th NMOS tube,
5th NMOS tube, third PMOS tube, the 4th PMOS tube, the 14th NMOS tube and the 6th current-limiting resistance, the band feedback voltage are put
The output end of big grade is connected to the grid of the 4th NMOS tube, the source level of the third PMOS tube, the source level of the 4th PMOS tube and the
The source level of one PMOS tube is connect with power end, the grid of the third PMOS tube respectively with the grid of the first PMOS tube, first
The drain electrode of PMOS tube is connected with the drain electrode of the 4th NMOS tube, and the drain electrode of the third PMOS tube is connected by the 6th current-limiting resistance and ground
It connects, the drain electrode of the third PMOS tube is connect with the grid of the 14th NMOS tube, and the grid of the 4th PMOS tube is respectively with
The drain electrode of four PMOS tube, the drain electrode of the 14th NMOS tube are connected with the grid of the 5th NMOS tube, the source of the 4th NMOS tube
Pole is connect with the drain electrode of the 5th NMOS tube, and the source electrode of the 14th NMOS tube and the source electrode of the 5th NMOS tube are connected to ground.
The beneficial effects of the present invention are:
A kind of high capacitance driving Low-Power CMOS trans-impedance amplifier of the present invention is by using adjusting cascade input stage, band
Profound and negative feedbck output stage and automatic biasing structure realize that capacitance drive capability can still be obtained when input and output capacitor is all larger
Biggish bandwidth is obtained, and by using band feedback voltage output stage, can effectively increase the amplification factor of trans-impedance amplifier, simultaneously
The trans-impedance amplifier multiple of trans-impedance amplifier can be accurately controlled.And the present invention can be saved by using automatic biasing structure
One band-gap reference circuit can effectively reduce the power consumption of trans-impedance amplifier, reduce chip area.
Detailed description of the invention
Specific embodiments of the present invention will be further explained with reference to the accompanying drawing:
Fig. 1 is circuit diagram of the invention；
Fig. 2 is the circuit diagram of another embodiment of adjusting cascade input stage of the invention；
Fig. 3 is the circuit diagram of another embodiment of the invention with feedback voltage amplifying stage；
Fig. 4 is the circuit diagram of another embodiment of the invention with profound and negative feedbck.
Specific embodiment
With reference to Fig. 1, a kind of high capacitance of the present invention drives Low-Power CMOS trans-impedance amplifier, including adjusts cascade input
Grade 1, band feedback voltage amplifying stage 2 and with depth feedback output grade 3, the output end for adjusting cascade input stage 1 passes through
It is connect with feedback voltage amplifying stage 2 and then with the input terminal with depth feedback output grade 3.
The input signal of current signal input is a current signal Iin, IinBy adjusting 1 coupling of cascade input stage
It closes and enters trans-impedance amplifier, current signal is converted into a voltage signal V after being overregulated cascade input stage 1a；Described
Input signal with feedback voltage amplifying stage 2 is the voltage signal V for adjusting cascade input stage 1 and being exporteda, fed back by band
Voltage amplifier circuit is to voltage VaIt amplifies, amplified voltage is Vb；The band profound and negative feedbck output stage will be with anti-
The output voltage V of feedthrough voltage amplifying stage 2bIt is exported after carrying out power amplification, output voltage Vout。
Preferably, input current, can be coupled in trans-impedance amplifier, and will be defeated by the adjusting cascade input stage 1
Enter current signal and be converted into voltage signal, the input stage is using a voltage amplifier as feed circuit, this feed circuit
The input impedance of the trans-impedance amplifier can be made to reduce, to reduce influence of the input capacitance to trans-impedance amplifier bandwidth, increased
Driving capability of the strong trans-impedance amplifier to input capacitance；The voltage for being exported input stage with feedback voltage amplifying stage 2 into
Row amplification improves the amplification factor of amplifier, and due to using feedback in grade amplification, may make across resistance amplification factor
It is approximately equal to the size of feedback resistance；The band profound and negative feedbck output stage, the output stage include a source follower, be can be improved
The output power of trans-impedance amplifier improves carrying load ability, while the output stage additionally uses a profound and negative feedbck circuit, can
So that the output impedance of the trans-impedance amplifier reduces, to reduce influence of the input capacitance to trans-impedance amplifier bandwidth, enhance
Driving capability of the trans-impedance amplifier to input capacitance.
It is further used as preferred embodiment, the adjusting cascade input stage 1 includes first resistor R1, first
NMOS tube NM1, the second NMOS tube NM2, third NMOS tube NM3 and first voltage amplifier A1, the leakage of the first NMOS tube NM1
Pole is connected to power end by first resistor R1, and the grid of the first NMOS tube NM1 is connected to power end, the first NMOS
The source electrode of pipe NM1 is connect with the drain electrode of the second NMOS tube NM2, and the source electrode of the second NMOS tube NM2 is defeated with current signal respectively
Enter end, the drain electrode of third NMOS tube NM3, third NMOS tube NM3 grid connected with the input terminal of first voltage amplifier A1, institute
The output end for stating first voltage amplifier A1 is connect with the grid of the second NMOS tube NM2, the source electrode of the third NMOS tube NM3 with
Ground connection, the drain electrode of the first NMOS tube NM1 are connected to the input terminal with feedback voltage amplifying stage 2.
The adjusting cascade input stage 1 includes the first NMOS tube NM1, the second NMOS tube NM2 and third NMOS tube
NM3, first resistor R1 and first voltage amplifier A1.The second NMOS tube NM2 and third NMOS tube NM3 constitutes one altogether
Grid structure input stage, input current IinIt is coupled in trans-impedance amplifier by the first NMOS tube NM1 and the second NMOS tube NM2,
When first voltage amplifier A1 is not added, the input resistance of this common gate structure input stage are as follows:
Commonly enter capacitor CinIt is all much larger than the parasitic capacitance of metal-oxide-semiconductor, therefore, the pole frequency of current signal input can
It is approximated by as follows:
Due to IinVariation can cause input point voltage VinVariation, therefore first voltage amplifier A1 can be added VinIt puts
For feedback to the grid of the second NMOS tube NM2, this can enable the input resistances of input stage to greatly reduce, and has added first voltage after big
The pole frequency of input resistance and current signal input after amplifier A1 may be expressed as:
By comparing formula (2), (4) we it can be found that increase first voltage amplifier A1 as feedback when, electric current letter
The pole frequency of number input terminal is greatly improved.
This improved adjusting cascade input stage 1 can also be by input current signal I simultaneouslyinIt is converted to voltage signal
Va, the voltage change of current signal input are as follows:
Vin=Iin*Rin (5)
The output voltage of first voltage amplifier A1 are as follows:
Vout1=Vin*(-A1)=Iin*Rin*(-A1) (6)
The curent change of second NMOS tube NM2 are as follows:
I2=(Vout1-Vin)*gnm2≈Iin (7)
Va=I2*Ra≈Iin*Ra (8)
Wherein RaFor the equivalent resistance seen into from node a.So far, input current signal is converted to by input stage
Voltage signal.
It is further used as preferred embodiment, the band feedback voltage amplifying stage 2 includes the electricity of second resistance R2 and second
Amplifier A2 is pressed, the output end for adjusting cascade input stage 1 is connected to the input terminal of second voltage amplifier A2, described
The input terminal of second voltage amplifier A2 is connected to the output end of second voltage amplifier A2 by second resistance R2, and described second
The output end of voltage amplifier A2 is connected to the input terminal with depth feedback output grade 3.
The band feedback voltage amplifying stage 2 includes second voltage amplifier A2 and second resistance R2, wherein second electricity
Resistance R2 is feedback resistance.Band feedback voltage amplifying stage 2 is by VaIt amplifies, improves the amplification factor of amplifier, amplified electricity
Pressure is Vb, and due to using feedback in grade amplification, it may make and be approximately equal to second resistance R2's across resistance amplification factor
Size.Its derivation process is as follows:
Due to the amplification factor A of second voltage amplifier A22> > 1, so the equivalent resistance entered in terms of a point can indicate
For
Vb=Va*(-A2)≈-Iin*Rf (11)
From formula (11) as can be seen that by after voltage amplification, the trans-impedance amplifier it is approximate etc. across resistance amplification factor
In feedback resistance RfSize, therefore, can pass through adjust RfSize come adjust across resistance amplification factor.
It is further used as preferred embodiment, the band depth feedback output grade 3 includes the first PMOS tube PM1, the 4th
NMOS tube NM4, the 5th NMOS tube NM5 and tertiary voltage amplifier A3, the output end with feedback voltage amplifying stage 2 are connected to
The grid of 4th NMOS tube NM4, the source electrode of the first PMOS tube PM1 are connected to power end, the grid of the first PMOS tube PM1
Pole is connected with the input terminal of tertiary voltage amplifier A3, the drain electrode of the first PMOS tube PM1, the drain electrode of the 4th NMOS tube NM4 respectively
It connects, the source electrode of the 4th NMOS tube NM4 is connect with the drain electrode of the 5th NMOS tube NM5, and the tertiary voltage amplifier A3's is defeated
Outlet is connect with the grid of the 5th NMOS tube NM5, and the source electrode of the 5th NMOS tube NM5 is connected to ground.Wherein, wherein the 4th
NMOS tube NM4 and the 5th NMOS tube NM5 constitutes a source follower, and the output power of trans-impedance amplifier can be improved, and it is negative to improve band
Loading capability；5th NMOS tube NM5 and tertiary voltage amplifier A3 constitutes a profound and negative feedbck circuit, can this be put across resistance
The output impedance of big device reduces A3Times, to reduce influence of the input capacitance to trans-impedance amplifier bandwidth, enhance trans-impedance amplifier
To the driving capability of input capacitance, concrete principle is as follows:
The band profound and negative feedbck output stage include the first PMOS tube PM1, the 4th NMOS tube NM4, the 5th NMOS tube NM5 and
Tertiary voltage amplifier A3 can be improved wherein the 4th NMOS tube NM4 and the 5th NMOS tube NM5 constitutes a source follower across resistance
The output power of amplifier improves carrying load ability；In non-plus depth negative feedback resistor, the 4th NMOS tube NM4 and the 5th
The output resistance for the source follower that NMOS tube NM5 is constituted is
Usual output capacitance CoutIt is all much larger than the parasitic capacitance of metal-oxide-semiconductor, therefore, the pole frequency of output node can be approximate
It is expressed as:
The 5th NMOS tube NM5 and tertiary voltage amplifier A3 constitutes a profound and negative feedbck circuit, can make this
The output impedance of trans-impedance amplifier reduces, the output resistance after adding feed circuit are as follows:
After comparing formula (12), (14) it can be found that increasing profound and negative feedbck circuit, output resistance is obviously reduced,
This can effectively reduce influence of the output capacitance to trans-impedance amplifier bandwidth, improve the driving of the output capacitance of trans-impedance amplifier
Ability.
Wherein, cascode structure is to increase much smaller than amplifier tube of a breadth length ratio between load resistance and amplifier tube
Isolated tube, the cascode structure and source follower structure, which are embodied in, adjusts cascade input stage 1, first voltage
In amplifier A1 and second voltage amplifier A2.Due to the breadth length ratio very little of the isolated tube, the parasitism of amplifier tube can isolate
Capacitor and load resistance, thus spread bandwidth；Source follower structure refers to that increasing a source between two-stage amplifying circuit follows
Device, the structure can preferably to match between each grade of amplifying circuit, effectively increase voltage swing, while keep apart every
Load resistance and parasitic capacitance between level-one amplifying circuit, spread bandwidth；One band gap can be saved using automatic biasing structure
Reference circuit can effectively reduce the power consumption of trans-impedance amplifier, reduce chip area.
With reference to Fig. 2, it is further used as preferred embodiment, another embodiment for adjusting cascade input stage 1
Are as follows: the adjusting cascade input stage 1 includes first resistor R1, the first NMOS tube NM1, the second NMOS tube NM2, the 3rd NMOS
Pipe NM3, the first current-limiting resistance RX1, the second current-limiting resistance RX2, the 6th NMOS tube NM6, the 7th NMOS tube NM7, the 8th NMOS tube
NM8, the 9th NMOS tube NM9, the tenth NMOS tube NM10 and the second PMOS tube PM2, the drain electrode of the first NMOS tube NM1 pass through the
One resistance R1 is connected to power end, and the grid of the first NMOS tube NM1 is connected to power end, the first NMOS tube NM1's
Source electrode is connect with the drain electrode of the second NMOS tube NM2, the source electrode of the second NMOS tube NM2 respectively with current signal input,
The grid of the drain electrode of three NMOS tube NM3, the grid of third NMOS tube NM3 and the 7th NMOS tube NM7 connects, the third NMOS tube
The source electrode of NM3, the source electrode of the 7th NMOS tube NM7, the source electrode of the 8th NMOS tube NM8 and the tenth NMOS tube NM10 source electrode with ground
Connection, the grid of the second NMOS tube NM2 are connect with the drain electrode of the 9th NMOS tube NM9, the grid of the first NMOS tube NM1
Respectively with the grid of the grid of the 6th NMOS tube NM6, the source electrode of the second PMOS tube PM2 and the 9th NMOS tube NM9, the described 6th
The drain electrode of NMOS tube NM6 is connected to power end by the first current-limiting resistance RX1, and the drain electrode of the 9th NMOS tube NM9 passes through the
Two current-limiting resistance RX2 are connected to power end, and the drain electrode of the 6th NMOS tube NM6 is connect with the grid of the second PMOS tube PM2, institute
The source electrode for stating the 6th NMOS tube NM6 is connect with the drain electrode of the 7th NMOS tube NM7, the source electrode and the tenth of the 9th NMOS tube NM9
The drain electrode of NMOS tube NM10 connects, the drain electrode of the second PMOS tube PM2 respectively with the drain electrode of the 8th NMOS tube NM8, the 8th
The grid of the grid of NMOS tube NM8 and the tenth NMOS tube NM10 are connected, and it is anti-that the drain electrode of the first NMOS tube NM1 is connected to band
The input terminal of feedthrough voltage amplifying stage 2.
With reference to Fig. 3, it is further used as preferred embodiment, another embodiment with feedback voltage amplifying stage 2 are as follows:
The band feedback voltage amplifying stage 2 includes second resistance R2, third current-limiting resistance RX3, the 4th current-limiting resistance RX4, the 5th current limliting
Resistance RX5, the 11st NMOS tube NM11, the 12nd NMOS tube NM12 and the 13rd NMOS tube NM13, the adjusting cascade
The output end of input stage 1 is connected to the source electrode of the 13rd NMOS tube NM13 by second resistance R2, and the adjusting common source is total
The output end of grid input stage 1 is connected to the grid of the 11st NMOS tube NM11, the drain of the 11st NMOS tube NM11 and
The drain electrode of 13 NMOS tube NM13 is connected to power end, and the drain electrode of the 12nd NMOS tube NM12 passes through the 4th current-limiting resistance
RX4 is connected to power end, and the drain electrode of the 12nd NMOS tube NM12 is connected to the grid of the 13rd NMOS tube NM13, and described
The source level of 11 NMOS tube NM11 is connected to ground by third current-limiting resistance RX3, the source level of the 11st NMOS tube NM11 with
The grid of 12nd NMOS tube NM12 connects, and the source level of the 13rd NMOS tube NM13 passes through the 5th current-limiting resistance RX5 and ground
Connection, the source level of the 12nd NMOS tube NM12 is connected to ground, the source level of the 13rd NMOS tube NM13 with it is anti-with depth
Present the input terminal connection of output stage 3.
With reference to Fig. 4, it is further used as preferred embodiment, another embodiment with depth feedback output grade 3 are as follows:
The band depth feedback output grade 3 includes the first PMOS tube PM1, the 4th NMOS tube NM4, the 5th NMOS tube NM5, third PMOS tube
PM3, the 4th PMOS tube PM4, the 14th NMOS tube NM14 and the 6th current-limiting resistance RX6, it is described with the defeated of feedback voltage amplifying stage 2
Outlet is connected to the grid of the 4th NMOS tube NM4, the source level of the third PMOS tube PM3, the source level of the 4th PMOS tube PM4 and
The source level of one PMOS tube PM1 is connect with power end, and the grid of the third PMOS tube PM3 is respectively with the first PMOS tube PM1's
The drain electrode of grid, the first PMOS tube PM1 is connected with the drain electrode of the 4th NMOS tube NM4, and the drain electrode of the third PMOS tube PM3 passes through
6th current-limiting resistance RX6 is connected to ground, and the drain electrode of the third PMOS tube PM3 is connect with the grid of the 14th NMOS tube NM14,
The grid of the 4th PMOS tube PM4 respectively with the drain electrode of the 4th PMOS tube PM4, the drain electrode and the 5th of the 14th NMOS tube NM14
The grid of NMOS tube NM5 is connected, and the source electrode of the 4th NMOS tube NM4 is connect with the drain electrode of the 5th NMOS tube NM5, and described
The source electrode of 14 NMOS tube NM14 and the source electrode of the 5th NMOS tube NM5 are connected to ground.
From above-mentioned multiple embodiments as can be seen that in entire circuit, the bias voltage of all metal-oxide-semiconductors is derived from
This trans-impedance amplifier circuit, without adding additional offset generating circuit, can effectively reduce using automatic biasing structure
The area of chip, while reducing power consumption.
Input capacitance in the embodiment of the present invention is 10pF, and output capacitance is also 10pF, and-three dB bandwidth is 1.08GHz,
It can satisfy the demand of some communication systems with high input and output capacitor.
From the foregoing it can be that a kind of high capacitance driving Low-Power CMOS trans-impedance amplifier of the present invention is total by using adjusting
Input stage of the source common gate structure as trans-impedance amplifier, can effectively reduce input impedance, promote the drive of the capacitor of input stage
Kinetic force；Using band feedback voltage amplifying stage 2, so that the size of the amplification factor of trans-impedance amplifier is approximately equal to feedback resistance
Size；Bandspreading is realized using cascode structure and source follower structure, while increasing voltage swing；Using band depth
Output impedance can be effectively reduced in negative-feedback output stage, promotes the capacitance drive capability of output stage；Use automatic biasing structure can be with
The effective power consumption and chip area for reducing trans-impedance amplifier.There is the present invention low input impedance, low output impedance, high capacitance to drive
The characteristics of dynamic, low-power consumption, area be small, the high voltage amplitude of oscillation.
It is to be illustrated to preferable implementation of the invention, but the invention is not limited to the implementation above
Example, those skilled in the art can also make various equivalent variations on the premise of without prejudice to spirit of the invention or replace
It changes, these equivalent deformations or replacement are all included in the scope defined by the claims of the present application.
Claims (6)
1. a kind of high capacitance drives Low-Power CMOS trans-impedance amplifier, it is characterised in that: including adjusting cascade input stage, band
Feedback voltage amplifying stage and with depth feedback output grade, the output end for adjusting cascade input stage passes through band feedback voltage
Amplifying stage is connect with the input terminal with depth feedback output grade in turn；
The adjusting cascade input stage includes first resistor, the first NMOS tube, the second NMOS tube, third NMOS tube and first
The drain electrode of voltage amplifier, first NMOS tube is connected to power end, the grid of first NMOS tube by first resistor
It is connected to power end, the source electrode of first NMOS tube is connect with the drain electrode of the second NMOS tube, the source electrode of second NMOS tube
Respectively with current signal input, the drain electrode of third NMOS tube, the input of the grid of third NMOS tube and first voltage amplifier
End connection, the output end of the first voltage amplifier are connect with the grid of the second NMOS tube, the source electrode of the third NMOS tube
It is connected to ground, the drain electrode of first NMOS tube is connected to the input terminal with feedback voltage amplifying stage.
2. a kind of high capacitance according to claim 1 drives Low-Power CMOS trans-impedance amplifier, it is characterised in that: the tune
Section cascade input stage includes first resistor, the first NMOS tube, the second NMOS tube, third NMOS tube, the first current-limiting resistance, the
Two current-limiting resistances, the 6th NMOS tube, the 7th NMOS tube, the 8th NMOS tube, the 9th NMOS tube, the tenth NMOS tube and the 2nd PMOS
Pipe, the drain electrode of first NMOS tube are connected to power end by first resistor, and the grid of first NMOS tube is connected to electricity
The source electrode of source, first NMOS tube is connect with the drain electrode of the second NMOS tube, the source electrode of second NMOS tube respectively with electricity
Flow the grid connection of signal input part, the drain electrode of third NMOS tube, the grid of third NMOS tube and the 7th NMOS tube, the third
The source electrode of NMOS tube, the source electrode of the 7th NMOS tube, the source electrode of the 8th NMOS tube and the source electrode of the tenth NMOS tube are connected to ground, institute
The grid for stating the second NMOS tube is connect with the drain electrode of the 9th NMOS tube, the grid of first NMOS tube respectively with the 6th NMOS tube
Grid, the source electrode of the second PMOS tube and the grid of the 9th NMOS tube be connected, the drain electrode of the 6th NMOS tube passes through first
Current-limiting resistance is connected to power end, and the drain electrode of the 9th NMOS tube is connected to power end by the second current-limiting resistance, and described
The drain electrode of six NMOS tubes is connect with the grid of the second PMOS tube, and the source electrode of the 6th NMOS tube and the drain electrode of the 7th NMOS tube connect
It connects, the source electrode of the 9th NMOS tube is connect with the drain electrode of the tenth NMOS tube, and the drain electrode of second PMOS tube is respectively with the 8th
The grid of the drain electrode of NMOS tube, the grid of the 8th NMOS tube and the tenth NMOS tube is connected, and the drain electrode of first NMOS tube connects
It is connected to the input terminal with feedback voltage amplifying stage.
3. a kind of high capacitance according to claim 1 drives Low-Power CMOS trans-impedance amplifier, it is characterised in that: the band
Feedback voltage amplifying stage includes second resistance and second voltage amplifier, the output end connection for adjusting cascade input stage
To the input terminal of second voltage amplifier, the input terminal of the second voltage amplifier is connected to second voltage by second resistance
The output end of the output end of amplifier, the second voltage amplifier is connected to the input terminal with depth feedback output grade.
4. a kind of high capacitance according to claim 1 drives Low-Power CMOS trans-impedance amplifier, it is characterised in that: the band
Feedback voltage amplifying stage includes second resistance, third current-limiting resistance, the 4th current-limiting resistance, the 5th current-limiting resistance, the 11st NMOS
Pipe, the 12nd NMOS tube and the 13rd NMOS tube, the output end for adjusting cascade input stage pass through second resistance
It is connected to the source electrode of the 13rd NMOS tube, the output end for adjusting cascade input stage is connected to the grid of the 11st NMOS tube
Pole, the drain electrode of the drain and the 13rd NMOS tube of the 11st NMOS tube are connected to power end, the 12nd NMOS tube
Drain electrode power end is connected to by the 4th current-limiting resistance, the drain electrode of the 12nd NMOS tube is connected to the 13rd NMOS tube
The source level of grid, the 11st NMOS tube is connected to ground by third current-limiting resistance, the source level of the 11st NMOS tube with
The grid of 12nd NMOS tube connects, and the source level of the 13rd NMOS tube is connected to ground by the 5th current-limiting resistance, and described the
The source level of 12 NMOS tubes is connected to ground, and the source level of the 13rd NMOS tube connects with the input terminal with depth feedback output grade
It connects.
5. a kind of high capacitance according to claim 1 drives Low-Power CMOS trans-impedance amplifier, it is characterised in that: the band
Depth feedback output grade includes the first PMOS tube, the 4th NMOS tube, the 5th NMOS tube and tertiary voltage amplifier, the band feedback
The output end of voltage amplifier stage is connected to the grid of the 4th NMOS tube, and the source electrode of first PMOS tube is connected to power end, institute
State the grid of the first PMOS tube respectively with the input terminal of tertiary voltage amplifier, the drain electrode of the first PMOS tube, the 4th NMOS tube
Drain electrode is connected, and the source electrode of the 4th NMOS tube is connect with the drain electrode of the 5th NMOS tube, the tertiary voltage amplifier it is defeated
Outlet is connect with the grid of the 5th NMOS tube, and the source electrode of the 5th NMOS tube is connected to ground.
6. a kind of high capacitance according to claim 1 drives Low-Power CMOS trans-impedance amplifier, it is characterised in that: the band
Depth feedback output grade includes the first PMOS tube, the 4th NMOS tube, the 5th NMOS tube, third PMOS tube, the 4th PMOS tube, the tenth
Four NMOS tubes and the 6th current-limiting resistance, the output end with feedback voltage amplifying stage are connected to the grid of the 4th NMOS tube, institute
The source level, the source level of the 4th PMOS tube and the source level of the first PMOS tube for stating third PMOS tube are connect with power end, the third
The grid of PMOS tube is connect with the grid of the first PMOS tube, the drain electrode of the first PMOS tube and the drain electrode of the 4th NMOS tube respectively, institute
The drain electrode for stating third PMOS tube is connected to ground by the 6th current-limiting resistance, the drain electrode and the 14th NMOS tube of the third PMOS tube
Grid connection, the grid of the 4th PMOS tube respectively with the drain electrode of the 4th PMOS tube, the drain electrode of the 14th NMOS tube and the
The grid of five NMOS tubes is connected, and the source electrode of the 4th NMOS tube is connect with the drain electrode of the 5th NMOS tube, and the described 14th
The source electrode of NMOS tube and the source electrode of the 5th NMOS tube are connected to ground.
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| CN108667434B (en) * | 2018-04-12 | 2021-08-17 | 东南大学 | Low-voltage low-output impedance trans-impedance amplifier |
| CN109962684B (en) * | 2019-03-13 | 2020-11-17 | 华中科技大学 | High dynamic range trans-impedance amplifier with three controlled current branches |
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| CN101285706A (en) * | 2008-05-30 | 2008-10-15 | 中国科学院上海技术物理研究所 | Differential input low-temperature infrared detector weak current amplifier |
| CN204046530U (en) * | 2014-04-04 | 2014-12-24 | 嘉兴禾润电子科技有限公司 | A kind of low noise trans-impedance amplifier and Optical Receiver Preamplifier thereof |
| CN105320205A (en) * | 2014-07-30 | 2016-02-10 | 国家电网公司 | Band-gap reference source with low offset voltage and high PSRR (power supply rejection ratio) |
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| US8310308B1 (en) * | 2011-05-31 | 2012-11-13 | Texas Instruments Incorporated | Wide bandwidth class C amplifier with common-mode feedback |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101285706A (en) * | 2008-05-30 | 2008-10-15 | 中国科学院上海技术物理研究所 | Differential input low-temperature infrared detector weak current amplifier |
| CN204046530U (en) * | 2014-04-04 | 2014-12-24 | 嘉兴禾润电子科技有限公司 | A kind of low noise trans-impedance amplifier and Optical Receiver Preamplifier thereof |
| CN105320205A (en) * | 2014-07-30 | 2016-02-10 | 国家电网公司 | Band-gap reference source with low offset voltage and high PSRR (power supply rejection ratio) |
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