CN105913792B - 一种像素电路、半导体摄像头检测电路、显示装置 - Google Patents
一种像素电路、半导体摄像头检测电路、显示装置 Download PDFInfo
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Abstract
本发明公开了一种像素电路、半导体摄像头检测电路、显示装置,用以解决由驱动晶体管的阈值电压发生漂移导致的输出电流和实际光照产生的电流存在差异的问题。像素电路包括:光电二极管、驱动模块、初始化模块、传输模块、电压写入模块和补偿模块;光电二极管的一端接地,另一端与传输模块连接;初始化模块用于在初始化信号端的控制下,将第一节点的电压拉至初始化电压;传输模块用于在第一扫描信号端的控制下,将第一节点的电压从初始化电压拉至数据电压;电压写入模块用于在第二扫描信号端的控制下,对驱动模块写入数据电压,并输出接地电压给补偿模块;补偿模块用于在补偿信号端和第二扫描信号端的控制下,对驱动模块进行阈值电压补偿。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种像素电路、半导体摄像头检测电路、显示装置。
背景技术
互补型金属氧化物半导体(Complementary Metal-Oxide Semiconductor,CMOS)技术及其工艺广泛应用于计算机领域,有源像素电路(Active Pixel Sensor,APS)作为最常见的CMOS摄像头检测电路,该APS像素电路的具体电路图如图1所示。
如图1所示,APS像素电路由开关晶体管T1、开关晶体管T3、驱动晶体管T2和光电二极管PD构成,驱动晶体管T2作为源极跟随器。在曝光开始时,开关晶体管T1在初始化信号端输入的初始化信号(Reset)的控制下打开,将光电二极管PD反向偏置到电压Vrst,电压Vrst对光电二极管PD的PN结电容充电,当光电二极管PD的PN结上有入射光照射时,光量子激发在PN结上产生电子空穴对,使PN结电容上的电荷发生复合,使得驱动晶体管T2的栅极电势降低,最后,将开关晶体管T3打开,由输出信号线10确认此时光电流的大小,根据实际测量到的光电流的大小,最终确认当前镜头前的光照。
从图1可以看到,现有技术输出信号线10读取到的电流与驱动晶体管T2的阈值电压有关,而在实际制作过程中,驱动晶体管T2由于工艺制程及长时间的操作,会造成驱动晶体管T2的阈值电压Vth发生漂移,使得最终输出电流的大小和实际光照到光电二极管PD后产生的电流的大小存在差异,从而会导致显示画面失真。
综上所述,现有技术由于驱动晶体管的阈值电压发生漂移会导致输出电流的大小和实际光照产生的电流的大小存在差异。
发明内容
本发明实施例提供了一种像素电路、半导体摄像头检测电路、显示装置,用以解决由于驱动晶体管的阈值电压发生漂移导致的输出电流的大小和实际光照产生的电流的大小存在差异的问题。
本发明实施例提供的一种像素电路,包括:光电二极管、驱动模块、初始化模块、传输模块、电压写入模块和补偿模块;
所述光电二极管的一端与接地端电连接,另一端与所述传输模块电连接;
所述初始化模块与初始化信号端和初始化电压端电连接,用于在所述初始化信号端的控制下,将第一节点的电压拉至所述初始化电压端输入的初始化电压;
所述传输模块与所述初始化模块和第一扫描信号端电连接,用于在所述第一扫描信号端的控制下,将所述第一节点的电压从所述初始化电压拉低至数据电压;所述数据电压的值随着所述光电二极管接收到的光照强度的增加而减小;
所述电压写入模块与所述第一节点、所述驱动模块、所述补偿模块、接地端和第二扫描信号端电连接,用于在所述第二扫描信号端的控制下,对所述驱动模块写入所述数据电压;以及,输出接地电压给补偿模块;
所述补偿模块与所述驱动模块、高电压电平信号端、补偿信号端和所述第二扫描信号端电连接,用于在所述补偿信号端和所述第二扫描信号端的控制下,对所述驱动模块进行阈值电压补偿;
其中,所述第一节点为所述初始化模块、所述传输模块和所述电压写入模块的交点。
由本发明实施例提供的像素电路,由于本发明实施例中的传输模块用于在第一扫描信号端的控制下,将第一节点的电压从初始化电压拉低至数据电压;数据电压的值随着光电二极管接收到的光照强度的增加而减小;电压写入模块用于在第二扫描信号端的控制下,对驱动模块写入数据电压;补偿模块用于在补偿信号端和第二扫描信号端的控制下,对驱动模块进行阈值电压补偿,因此,本发明实施例写入到驱动模块的数据电压仅与光电二极管接收到的光照强度有关,而补偿模块对驱动模块进行阈值电压补偿,解决了现有技术由于驱动晶体管的阈值电压发生漂移导致的输出电流的大小和实际光照产生的电流的大小存在差异的问题。
较佳地,所述补偿模块包括第一电容、第一开关晶体管、第二开关晶体管和反相器;
所述第一电容的一端与所述电压写入模块电连接,另一端与所述驱动模块电连接;
所述第一开关晶体管的栅极与所述补偿信号端电连接,另外两极分别与所述高电压电平信号端和所述驱动模块电连接;
所述反相器的一端与所述第二扫描信号端电连接,另一端与所述第二开关晶体管的栅极电连接;
所述第二开关晶体管的另外两极分别与所述电压写入模块和所述驱动模块电连接。
较佳地,所述初始化模块包括第三开关晶体管和第二电容;
所述第二电容的一端与所述第一节点电连接,另一端与接地端电连接;
所述第三开关晶体管的栅极与所述初始化信号端电连接,另外两极分别与所述初始化电压端和所述第一节点电连接。
较佳地,所述传输模块包括第四开关晶体管,所述第四开关晶体管的栅极与所述第一扫描信号端电连接,另外两极分别与所述光电二极管和所述第一节点电连接。
较佳地,所述电压写入模块包括第五开关晶体管、第六开关晶体管和第七开关晶体管;
所述第五开关晶体管的栅极与所述第二扫描信号端电连接,另外两极分别与接地端和所述补偿模块电连接;
所述第六开关晶体管的栅极与所述第二扫描信号端电连接,另外两极分别与所述第一节点和所述驱动模块电连接;
所述第七开关晶体管的栅极与所述第二扫描信号端电连接,另外两极分别与接地端和所述驱动模块电连接。
较佳地,所述第一开关晶体管、所述第二开关晶体管、所述第三开关晶体管、所述第四开关晶体管、所述第五开关晶体管、所述第六开关晶体管和所述第七开关晶体管均为P型薄膜晶体管。
较佳地,所述驱动模块包括一驱动晶体管,所述驱动晶体管的栅极与所述补偿模块和所述电压写入模块电连接,源极与所述补偿模块电连接,漏极与所述电压写入模块和输出信号线电连接。
较佳地,所述驱动晶体管为P型薄膜晶体管。
本发明实施例还提供了一种半导体摄像头检测电路,该半导体摄像头检测电路包括上述的像素电路。
本发明实施例还提供了一种显示装置,该显示装置包括上述的半导体摄像头检测电路。
附图说明
图1为现有技术像素电路的电路结构示意图;
图2为本发明实施例提供的一种像素电路的模块结构示意图;
图3为本发明实施例提供的一种像素电路的具体电路结构示意图;
图4为图3所示的像素电路的时序图;
图5-图9为本发明实施例提供的像素电路在不同工作阶段的工作原理电路示意图。
具体实施方式
本发明实施例提供了一种像素电路、半导体摄像头检测电路、显示装置,用以解决由于驱动晶体管的阈值电压发生漂移导致的输出电流的大小和实际光照产生的电流的大小存在差异的问题。
为了使本发明的目的、技术方案和优点更加清楚,下面将结合附图对本发明作进一步地详细描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例,都属于本发明保护的范围。
下面结合附图详细介绍本发明具体实施例提供的像素电路。
如图2所示,本发明具体实施例提供了一种像素电路,包括:光电二极管PD、驱动模块23、初始化模块20、传输模块21、电压写入模块22和补偿模块24;
光电二极管PD的一端与接地端电连接,另一端与传输模块21电连接;
初始化模块20与初始化信号端(对应像素电路的初始化信号Reset)和初始化电压端(对应像素电路的初始化电压Vcom)电连接,用于在初始化信号端的控制下,将第一节点N1的电压拉至初始化电压端输入的初始化电压Vcom;
传输模块21与初始化模块20和第一扫描信号端(对应像素电路的第一扫描信号Scan1)电连接,用于在第一扫描信号端的控制下,将第一节点N1的电压从初始化电压拉低至数据电压;数据电压的值随着光电二极管PD接收到的光照强度的增加而减小;
电压写入模块22与第一节点N1、驱动模块23、补偿模块24、接地端和第二扫描信号端(对应像素电路的第二扫描信号Scan2)电连接,用于在第二扫描信号端的控制下,对驱动模块23写入数据电压;以及,输出接地电压给补偿模块24;
补偿模块24与驱动模块23、高电压电平信号端(对应高电压电平信号VDD)、补偿信号端(对应像素电路的补偿信号EM)和第二扫描信号端(对应像素电路的第二扫描信号Scan2)电连接,用于在补偿信号端和第二扫描信号端的控制下,对驱动模块23进行阈值电压补偿;
其中,第一节点N1为初始化模块20、传输模块21和电压写入模块22的交点。
具体实施时,如图3所示,本发明具体实施例中的驱动模块包括一驱动晶体管DTFT,驱动晶体管DTFT的栅极与补偿模块24和电压写入模块22电连接,源极与补偿模块24电连接,漏极与电压写入模块22和输出信号线10电连接。
优选地,本发明具体实施例中的驱动晶体管DTFT为P型薄膜晶体管。
具体实施时,如图3所示,本发明具体实施例中的补偿模块包括第一电容C1、第一开关晶体管T1、反相器M和第二开关晶体管T2;
第一电容C1的一端与电压写入模块22电连接,另一端与驱动模块23电连接;
第一开关晶体管T1的栅极与补偿信号端(对应像素电路的补偿信号EM)电连接,另外两极分别与高电压电平信号端(对应高电压电平信号VDD)和驱动模块23电连接。
反相器M的一端与第二扫描信号端(对应像素电路的第二扫描信号Scan2)电连接,另一端与第二开关晶体管T2的栅极电连接;
第二开关晶体管T2的另外两极分别与电压写入模块22和驱动模块23电连接。
具体实施时,如图3所示,本发明具体实施例中的初始化模块20包括第三开关晶体管T3和第二电容C2;
第二电容C2的一端与第一节点N1电连接,另一端与接地端电连接;
第三开关晶体管T3的栅极与初始化信号端(对应像素电路的初始化信号Reset)电连接,另外两极分别与初始化电压端(对应像素电路的初始化电压Vcom)和第一节点N1电连接。
具体实施时,如图3所示,本发明具体实施例中的传输模块21包括第四开关晶体管T4,第四开关晶体管T4的栅极与第一扫描信号端(对应像素电路的第一扫描信号Scan1)电连接,另外两极分别与光电二极管PD和第一节点N1电连接。
具体实施时,如图3所示,本发明具体实施例中的电压写入模块22包括第五开关晶体管T5、第六开关晶体管T6和第七开关晶体管T7;
第五开关晶体管T5的栅极与第二扫描信号端(对应像素电路的第二扫描信号Scan2)电连接,另外两极分别与接地端和补偿模块24电连接;
第六开关晶体管T6的栅极与第二扫描信号端(对应像素电路的第二扫描信号Scan2)电连接,另外两极分别与第一节点N1和驱动模块23电连接;
第七开关晶体管T7的栅极与第二扫描信号端(对应像素电路的第二扫描信号Scan2)电连接,另外两极分别与接地端和驱动模块23电连接。
优选地,本发明具体实施例中第一开关晶体管T1、第二开关晶体管T2、第三开关晶体管T3、第四开关晶体管T4、第五开关晶体管T5、第六开关晶体管T6和第七开关晶体管T7均为P型薄膜晶体管。当然,在实际电路设计时,本发明具体实施例中的开关晶体管还可以采用P型薄膜晶体管和N型薄膜晶体管混合设计的方式。
在具体实施中,第一开关晶体管T1、第二开关晶体管T2、第三开关晶体管T3、第四开关晶体管T4、第五开关晶体管T5、第六开关晶体管T6和第七开关晶体管T7的源极和漏极根据开关晶体管类型以及信号端的信号的不同,其功能可以互换,在此不做具体区分。
下面结合图3-图9,具体说明本发明实施例提供的像素电路的具体工作原理。
如图3和图4所示,在I阶段,初始化信号Reset为低电平;第一扫描信号Scan1、第二扫描信号Scan2和补偿信号EM均为高电平;此时,图3中的第三开关晶体管T3打开;第一开关晶体管T1、第四开关晶体管T4、第五开关晶体管T5、第六开关晶体管T6和第七开关晶体管T7均断开;另外,由于第二开关晶体管T2与反相器M相连,因此,第二开关晶体管T2也处于打开状态。
在第I阶段图3的简化电路图如图5所示,图中将处于打开状态的第三开关晶体管T3用导通的直线代替,产生的电流方向如图中的箭头方向所示,此时第一节点N1的电压被拉至初始化电压端输入的初始化电压Vcom,具体实施时,初始化电压Vcom的值可以根据实际电路的需要进行设定,本发明具体实施例中的像素电路在第I阶段的目的是将之前的电压信号进行重置。
如图3和图4所示,在II阶段,第一扫描信号Scan1为低电平;初始化信号Reset、第二扫描信号Scan2和补偿信号EM均为高电平;此时,图3中的第四开关晶体管T4打开;第一开关晶体管T1、第三开关晶体管T3、第五开关晶体管T5、第六开关晶体管T6和第七开关晶体管T7均断开;另外,由于第二开关晶体管T2与反相器M相连,第二开关晶体管T处于打开状态。
在第II阶段图3的简化电路图如图6所示,图中将处于打开状态的第四开关晶体管T4用导通的直线代替,产生的电流方向如图中的箭头方向所示,当光电二极管PD的PN结上有入射光照射时,光量子激发在PN结上产生电子空穴对,使PN结电容上的电荷发生复合,使得第一节点N1的电压降低,具体地,第一节点N1的电压从初始化电压Vcom降低到数据电压Vdata,并存储在第二电容C2一端的第一节点N1。本发明具体实施例存储在第二电容C2一端的第一节点N1的数据电压Vdata的值随着光电二极管PD接收到的光照强度的增加而减小。
如图3和图4所示,在III阶段,第二扫描信号Scan2和补偿信号EM为低电平;第一扫描信号Scan1和初始化信号Reset为高电平;此时,图3中的第一开关晶体管T1、第五开关晶体管T5、第六开关晶体管T6和第七开关晶体管T7均打开;第三开关晶体管T3和第四开关晶体管T4均断开;另外,由于第二开关晶体管T2与反相器M相连,因此,第二开关晶体管T2断开。
在第III阶段图3的简化电路图如图7所示,图中将处于打开状态的第一开关晶体管T1、第五开关晶体管T5、第六开关晶体管T6和第七开关晶体管T7用导通的直线代替,产生的电流方向如图中的箭头方向所示。此时,将数据电压Vdata写入驱动模块23,即本发明具体实施例中的第二节点N2的电压为数据电压Vdata。另外,本发明具体实施例中第一电容C1的一端接地,电压为0V,另一端与高电压电平信号端(对应高电压电平信号VDD)相连,电压为高电平电压Vdd。
如图3和图4所示,在IV阶段,第二扫描信号Scan2为低电平;初始化信号Reset、第一扫描信号Scan1和补偿信号EM均为高电平;此时,图3中的第五开关晶体管T5、第六开关晶体管T6和第七开关晶体管T7均打开;第一开关晶体管T1、第三开关晶体管T3和第四开关晶体管T4均断开;另外,由于第二开关晶体管T2与反相器M相连,因此,第二开关晶体管T2断开。
在第IV阶段图3的简化电路图如图8所示,图中将处于打开状态的第五开关晶体管T5、第六开关晶体管T6和第七开关晶体管T7用导通的直线代替,产生的电流方向如图中的箭头方向所示。此时,第一电容C1进行放电,由于第二节点N2的电压为Vdata,第一电容C1放电后的a端的电压为Vdata+Vth,Vth为驱动晶体管DTFT的阈值电压。第一电容C1的b端由于接地,b端的电压为0V,此时,第一电容C1两端的压差为Vdata+Vth。
如图3和图4所示,在V阶段,补偿信号EM为低电平;初始化信号Reset、第一扫描信号Scan1和第二扫描信号Scan2均为高电平;此时,图3中的第一开关晶体管T1打开;第三开关晶体管T3、第四开关晶体管T4、第五开关晶体管T5、第六开关晶体管T6和第七开关晶体管T7均断开;另外,由于第二开关晶体管T2与反相器M相连,因此,第二开关晶体管T2打开。
在第V阶段图3的简化电路图如图9所示,图中将处于打开状态的第一开关晶体管T1用导通的直线代替,产生的电流方向如图中的箭头方向所示。此时,第一电容C1的a端与高电压电平信号端(对应高电压电平信号VDD)相连,电压为高电平电压Vdd;第一电容C1的b端浮接,由于第一电容C1要保持原来的压差,因此会发生等压跳变,由于在第IV阶段第一电容C1两端的压差为Vdata+Vth,因此,此时第一电容C1的b端的电压发生跳变后为:Vdd-Vdata-Vth,即第二节点N2的电压为Vdd-Vdata-Vth。
如图9所示,根据饱和电流公式,输出到输出信号线10的电流大小为:
I=K(VGS-Vth)2=K[Vdd-(Vdd-Vdata-Vth)-Vth]2=K*Vdata2
其中,K为预设常数,VGS为驱动晶体管DTFT的栅源电压差。
从上面的公式可以看出,此时工作电流I不受驱动晶体管DTFT的阈值电压Vth的影响,而Vdata由光电二极管的光照产生,解决了驱动晶体管由于工艺制程及长时间的操作造成阈值电压发生漂移的问题,因此可以起到补偿作用,从而能够很好的保证信号数据的准确性。
本发明具体实施例还提供了一种半导体摄像头检测电路,该半导体摄像头检测电路包括本发明具体实施例提供的上述像素电路,具体地,本发明具体实施例中的半导体摄像头检测电路为CMOS摄像头检测电路。
本发明具体实施例还提供了一种显示装置,该显示装置包括本发明具体实施例提供的上述半导体摄像头检测电路,该显示装置可以为液晶面板、液晶显示器、液晶电视、有机发光二极管(Organic Light Emitting Diode,OLED)面板、OLED显示器、OLED电视或电子纸等显示装置。
综上所述,本发明具体实施例提供一种像素电路,包括:光电二极管、驱动模块、初始化模块、传输模块、电压写入模块和补偿模块;光电二极管的一端与接地端电连接,另一端与传输模块电连接;初始化模块与初始化信号端和初始化电压端电连接,用于在初始化信号端的控制下,将第一节点的电压拉至初始化电压端输入的初始化电压;传输模块与初始化模块和第一扫描信号端电连接,用于在第一扫描信号端的控制下,将第一节点的电压从初始化电压拉低至数据电压;数据电压的值随着光电二极管接收到的光照强度的增加而减小;电压写入模块与第一节点、驱动模块、补偿模块、接地端和第二扫描信号端电连接,用于在第二扫描信号端的控制下,对驱动模块写入数据电压;以及,输出接地电压给补偿模块;补偿模块与驱动模块、高电压电平信号端、补偿信号端和第二扫描信号端电连接,用于在补偿信号端和第二扫描信号端的控制下,对驱动模块进行阈值电压补偿;其中,第一节点为初始化模块、传输模块和所电压写入模块的交点。由于本发明具体实施例中的传输模块用于在第一扫描信号端的控制下,将第一节点的电压从初始化电压拉低至数据电压;数据电压的值随着光电二极管接收到的光照强度的增加而减小;电压写入模块用于在第二扫描信号端的控制下,对驱动模块写入数据电压;补偿模块用于在补偿信号端和第二扫描信号端的控制下,对驱动模块进行阈值电压补偿,因此,本发明具体实施例写入驱动模块的数据电压仅与光电二极管接收到的光照强度有关,而补偿模块对驱动模块进行阈值电压补偿,解决了现有技术由于驱动晶体管的阈值电压发生漂移导致的输出电流的大小和实际光照产生的电流的大小存在差异的问题。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (10)
1.一种像素电路,包括:光电二极管、驱动模块、初始化模块和传输模块,其中,所述光电二极管的一端与接地端电连接,另一端与所述传输模块电连接;
所述初始化模块与初始化信号端和初始化电压端电连接,用于在所述初始化信号端的控制下,将第一节点的电压拉至所述初始化电压端输入的初始化电压;
所述传输模块与所述初始化模块和第一扫描信号端电连接,用于在所述第一扫描信号端的控制下,将所述第一节点的电压从所述初始化电压拉低至数据电压;所述数据电压的值随着所述光电二极管接收到的光照强度的增加而减小;
其特征在于,还包括:电压写入模块和补偿模块;
所述电压写入模块与所述第一节点、所述驱动模块、所述补偿模块、接地端和第二扫描信号端电连接,用于在所述第二扫描信号端的控制下,对所述驱动模块写入所述数据电压;以及,输出接地电压给补偿模块;
所述补偿模块与所述驱动模块、高电压电平信号端、补偿信号端和所述第二扫描信号端电连接,用于在所述补偿信号端和所述第二扫描信号端的控制下,对所述驱动模块进行阈值电压补偿;
其中,所述第一节点为所述初始化模块、所述传输模块和所述电压写入模块的交点。
2.根据权利要求1所述的像素电路,其特征在于,所述补偿模块包括第一电容、第一开关晶体管、第二开关晶体管和反相器;
所述第一电容的一端与所述电压写入模块电连接,另一端与所述驱动模块电连接;
所述第一开关晶体管的栅极与所述补偿信号端电连接,另外两极分别与所述高电压电平信号端和所述驱动模块电连接;
所述反相器的一端与所述第二扫描信号端电连接,另一端与所述第二开关晶体管的栅极电连接;
所述第二开关晶体管的另外两极分别与所述电压写入模块和所述驱动模块电连接。
3.根据权利要求1所述的像素电路,其特征在于,所述初始化模块包括第三开关晶体管和第二电容;
所述第二电容的一端与所述第一节点电连接,另一端与接地端电连接;
所述第三开关晶体管的栅极与所述初始化信号端电连接,另外两极分别与所述初始化电压端和所述第一节点电连接。
4.根据权利要求1所述的像素电路,其特征在于,所述传输模块包括第四开关晶体管,所述第四开关晶体管的栅极与所述第一扫描信号端电连接,另外两极分别与所述光电二极管和所述第一节点电连接。
5.根据权利要求1所述的像素电路,其特征在于,所述电压写入模块包括第五开关晶体管、第六开关晶体管和第七开关晶体管;
所述第五开关晶体管的栅极与所述第二扫描信号端电连接,另外两极分别与接地端和所述补偿模块电连接;
所述第六开关晶体管的栅极与所述第二扫描信号端电连接,另外两极分别与所述第一节点和所述驱动模块电连接;
所述第七开关晶体管的栅极与所述第二扫描信号端电连接,另外两极分别与接地端和所述驱动模块电连接。
6.根据权利要求2-5任一权利要求所述的像素电路,其特征在于,所述第一开关晶体管、所述第二开关晶体管、所述第三开关晶体管、所述第四开关晶体管、所述第五开关晶体管、所述第六开关晶体管和所述第七开关晶体管均为P型薄膜晶体管。
7.根据权利要求1所述的像素电路,其特征在于,所述驱动模块包括一驱动晶体管,所述驱动晶体管的栅极与所述补偿模块和所述电压写入模块电连接,源极与所述补偿模块电连接,漏极与所述电压写入模块和输出信号线电连接。
8.根据权利要求7所述的像素电路,其特征在于,所述驱动晶体管为P型薄膜晶体管。
9.一种半导体摄像头检测电路,其特征在于,包括权利要求1-8任一权利要求所述的像素电路。
10.一种显示装置,其特征在于,包括权利要求9所述的半导体摄像头检测电路。
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US15/568,996 US10205900B2 (en) | 2016-06-30 | 2017-04-28 | Pixel circuit, semiconductor camera detection circuit and display device |
PCT/CN2017/082327 WO2018000927A1 (zh) | 2016-06-30 | 2017-04-28 | 像素电路、半导体摄像头检测电路以及显示装置 |
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CN109870470B (zh) * | 2017-06-30 | 2024-07-16 | 京东方科技集团股份有限公司 | 探测像素电路、探测面板和光电检测装置 |
CN108766361A (zh) * | 2018-05-31 | 2018-11-06 | 京东方科技集团股份有限公司 | 像素电路及其驱动方法、显示装置 |
CN109410844B (zh) * | 2018-10-29 | 2023-12-29 | 武汉华星光电技术有限公司 | 像素驱动电路及显示装置 |
CN110797364B (zh) * | 2019-11-08 | 2022-01-11 | 京东方科技集团股份有限公司 | 一种探测基板、探测面板及光电检测装置 |
CN113763870B (zh) * | 2020-06-03 | 2024-06-04 | 原相科技股份有限公司 | 像素电路及像素阵列 |
KR20220015112A (ko) * | 2020-07-30 | 2022-02-08 | 엘지디스플레이 주식회사 | 표시장치와 이를 포함한 모바일 단말기 |
CN112532899B (zh) * | 2020-11-27 | 2023-06-30 | 京东方科技集团股份有限公司 | 光电转换电路、驱动方法、光电检测基板、光电检测装置 |
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CN103152531A (zh) * | 2013-02-27 | 2013-06-12 | 天津大学 | 用于抗辐射cmos图像传感器的有源像素结构 |
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