CN105897264B - Fast turn-off/on source follower - Google Patents

Fast turn-off/on source follower Download PDF

Info

Publication number
CN105897264B
CN105897264B CN201610312801.0A CN201610312801A CN105897264B CN 105897264 B CN105897264 B CN 105897264B CN 201610312801 A CN201610312801 A CN 201610312801A CN 105897264 B CN105897264 B CN 105897264B
Authority
CN
China
Prior art keywords
source follower
circuit
switching
signal
turn
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201610312801.0A
Other languages
Chinese (zh)
Other versions
CN105897264A (en
Inventor
曹淑新
张莉莉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Weihao Integrated Circuit Design Co ltd
Original Assignee
Howell Analog Integrated Circuit Beijing Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Howell Analog Integrated Circuit Beijing Co ltd filed Critical Howell Analog Integrated Circuit Beijing Co ltd
Priority to CN201610312801.0A priority Critical patent/CN105897264B/en
Publication of CN105897264A publication Critical patent/CN105897264A/en
Application granted granted Critical
Publication of CN105897264B publication Critical patent/CN105897264B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/002—Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/1245—Details of sampling arrangements or methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Electronic Switches (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

The present invention relates to a source follower that is turned off/on quickly. The source follower includes: the source follower, the cut-off/on circuit and the bias circuit are used for receiving signal sampling time information/signal conversion time information through the cut-off/on circuit, starting the process of cutting off/on the source follower according to a display result and outputting a corresponding cut-off/on signal to the bias circuit for accelerating the process of cutting off/on the source follower so as to realize the excellent performance of low power consumption. The source follower starts the process of switching on/off the source follower through the display result of the switching on/off circuit and outputs the corresponding switching on/off signal to the biasing circuit for accelerating the process of switching on/off the source follower, so that the source follower has the advantages of high speed and stability and low power consumption.

Description

Fast turn-off/on source follower
Technical Field
The invention relates to the field of microelectronic technical design, in particular to a source follower capable of being switched off/on quickly and equipment for realizing the source follower capable of being switched off/on quickly.
Background
Existing analog-to-digital converters are an important interface between analog and digital signals. With the development of processes and technologies, there is an increasing demand for analog-to-digital converters with low power consumption, small volume, medium resolution, and medium-to-high speed.
In order to obtain a high performance analog to digital converter, the prior art uses a wideband source follower as a buffer for the analog input signal. In this way, the analog voltage signal is buffered by the broadband source follower to obtain the analog signal to be converted with a certain driving capability and good linearity.
The bottleneck of the development of the existing high-speed analog-to-digital converter is mainly represented by: in high-speed applications of analog-to-digital converters, a source follower of a bandwidth matching the high-speed requirements is required. Accordingly, a wider bandwidth source follower has a faster sampling rate. Accordingly, the operation at the high-speed sampling rate consumes a large amount of power, and if excessive heat cannot be timely dissipated, the normal operation of the high-speed analog-to-digital converter can be slowed down, even the high-speed analog-to-digital converter can be damaged, and the service life of the high-speed analog-to-digital converter is shortened.
Disclosure of Invention
The embodiment of the invention provides a source follower capable of being quickly switched off/on and equipment thereof, wherein the source follower is started to be switched off/on through a display result of a switching-off/on circuit and outputs a corresponding switching-off/on signal to a biasing circuit for accelerating the switching-off/on process of the source follower so as to realize low power consumption.
In a first aspect, an embodiment of the present invention provides a fast turn-off/turn-on source follower, including: a source follower, a cut-off/on circuit, and a bias circuit,
the cut-off/on circuit receives signal sampling time information corresponding to a signal sampling process performed in the source follower, starts a process of cutting off the source follower when the signal sampling time information shows that the signal sampling process is finished, and outputs a corresponding cut-off signal to the bias circuit for accelerating the process of cutting off the source follower, wherein the sampling time information corresponds to a sampling clock of the cut-off/on circuit; or alternatively, the process may be performed,
the turn-off/turn-on circuit receives signal conversion time information corresponding to a signal conversion process performed in the analog-to-digital converter, and starts a process of turning on the source follower when the signal conversion time information indicates that the signal conversion process is ended and outputs a corresponding turn-on signal to the bias circuit for accelerating the process of turning on the source follower, the signal conversion time information corresponding to a conversion clock of the turn-off/turn-on circuit.
Preferably, the off/on circuit includes:
the switch implements a switching process of turning the source follower off/on,
the precharge capacitor performs a process of accelerating the turn-off/turn-on of the source follower and outputs a corresponding turn-off/turn-on signal.
Preferably, the source follower is a source follower with a P-type MOS transistor.
Preferably, the bias circuit includes:
the source electrode of the P-type MOS tube is connected with the power supply voltage, the grid electrode of the P-type MOS tube is connected with the drain electrode of the P-type MOS tube and one end of the current source to generate corresponding bias voltage, and the other end of the current source is grounded.
Preferably, the source follower is a source follower with an N-type MOS transistor.
Preferably, the sampling clock of the cut-off/on circuit multiplexes the sampling clock of the analog-to-digital converter.
Preferably, the switching clock of the off/on circuit multiplexes the switching clock of the analog-to-digital converter.
Preferably, the sampling clock and the conversion clock of the off/on circuit multiplex the sampling clock and the conversion clock of the analog-to-digital converter, respectively.
In a second aspect, embodiments of the present invention provide a device for implementing a fast turn-off/turn-on source follower, comprising a device of any of the circuits described in the first aspect.
The fast cut-off/on source follower and the device thereof provided by the embodiment of the invention receive the signal sampling time information/signal conversion time information through the cut-off/on circuit, start the process of cutting off/on the source follower according to the display result and output the corresponding cut-off/on signal to the bias circuit for accelerating the process of cutting off/on the source follower so as to realize the excellent performance of low power consumption.
Drawings
Fig. 1 is a schematic diagram of a source follower with fast turn-off/on configuration according to an embodiment of the present invention;
FIG. 2 is a circuit schematic of a fast turn-off/on source follower fast turn-off process according to an embodiment of the present invention;
FIG. 3 is a circuit schematic of a fast turn-off/on source follower fast turn-on process according to an embodiment of the present invention;
fig. 4a is an equivalent schematic diagram of a fast turn-off circuit of a fast turn-off/turn-on source follower according to an embodiment of the present invention, and fig. 4b is an equivalent schematic diagram of a fast turn-on circuit of a fast turn-off/turn-on source follower according to an embodiment of the present invention;
fig. 5 is a timing diagram of the fast turn-off and fast turn-on process of the fast turn-off/turn-on source follower of the embodiment of the present invention.
Detailed Description
The technical scheme of the invention is further described in detail through the drawings and the embodiments.
Fig. 1 is a schematic diagram of a source follower with fast turn-off/turn-on configuration according to an embodiment of the present invention. Illustrated in fig. 1 is: 101. source follower 102, off/on circuit 103, bias circuit 104.
As shown in fig. 1, a P-type source follower is formed by a P-type MOS (Metal Oxide Semiconductor ) tube M1, a P-type MOS tube M2 and a P-type MOS tube M3; the source electrode of the MOS transistor M3 is connected to VDD, where VDD is a power supply Voltage, the gate electrode is connected to VB (Bias Voltage) generated by the Bias circuit, that is, VBP1, the drain electrode is connected to the source electrode of the MOS transistor M2, the gate electrode of the M2 is connected to the Bias Voltage VX, the drain electrode is connected to the source electrode of the MOS transistor M1, and is used as an output end of the source follower and output to the analog-to-digital converter, the gate electrode of the MOS transistor M1 is connected to VIN (Input Voltage Signal ), and the drain electrode is grounded.
The off/on circuit includes: switches S1 to S10, precharge capacitor C X And C Y The method comprises the steps of carrying out a first treatment on the surface of the Wherein one end of S1 is connected with VBP2 generated by the bias circuit, the other end is connected with the grid electrode of the P-type MOS tube M2 and one end of S2, the other end of S2 is connected with VDD, one end of S3 is grounded, the other end is connected with one end of S4, and the other end is connected with a capacitor C X The other end of S4 is connected with one end of S5, the other end of S5 and one end of S6 are connected with a capacitor C Y One end of S6 is connected to VDD, the other end of the capacitor CX is connected to one end of S7 and S8, the other end of S7 is connected to one end of S9 and the other end of S9 is connected to C Y The other end of S10 is grounded, S1, S4, S6, S8, S10 are controlled by CLKS (Sampling Clock) of the analog-to-digital converter core, S2 is controlled by a reverse Clock of CLKS, and S3, S5, S7, S9 are controlled by CLKH (Holding Clock) of the analog-to-digital converter core.
The bias circuit includes: p type MOS pipe M4, P type MOS pipe M5, current source I1 and current source I2. The source electrode of the P-type MOS tube M4 is connected with the VDD, the grid electrode is connected with one end of the drain electrode and one end of the current source I1 to generate bias voltage VBP1, the other end of the current source I1 is grounded, the source electrode of the P-type MOS tube M5 is connected with the VDD, the grid electrode is connected with one end of the drain electrode and one end of the current source I2 to generate bias voltage VBP2, and the other end of the current source I2 is grounded.
The input end of the analog-to-digital converter is connected with the output end of the source follower. It should be noted that the analog-to-digital converter is a basic analog-to-digital converter, and not only can complete the sampling process of the analog signal, but also can realize the conversion process of the data.
It can be seen from the schematic structure of the source follower which is turned on/off rapidly as shown in fig. 1: the process of switching on/off the source follower is started by the display result of the switching on/off circuit and a corresponding switching on/off signal is outputted to the bias circuit for accelerating the process of switching on/off the source follower, so that the source follower has the advantages of high speed stability and low power consumption.
Further, the control clock of the off/on circuit multiplexes the sample clock and the hold clock of the analog-to-digital converter core. Since the control clock of the off/on circuit does not need a clock generation circuit which is additionally configured by itself, the complexity of the design of the off/on circuit is reduced.
Further, since the source follower provided by the embodiment of the invention is designed to introduce a cut-off/on circuit.
Switching off/on the circuit has the following advantages. First, when the source follower is not required to operate, i.e., after the analog-to-digital converter completes the sampling process and then enters the process of converting the analog signal into the digital signal, the turn-off/on circuit can start the process of rapidly turning off the source follower and output a corresponding turn-off signal to the bias circuit for accelerating the process of turning off the source follower, thus saving the power consumption consumed by the source follower and enabling the source follower to have the advantage of low power consumption.
Second, when the analog-to-digital converter finishes the conversion process from the analog signal to the digital signal, and enters the next sampling process, the cut-off/on circuit can start the process of quickly switching on the source follower, so that the source follower quickly recovers from the previous cut-off state to the working state of the source follower. In this way, the off/on circuit starts a process of rapidly switching on the source follower and outputs a corresponding on signal to the bias circuit for accelerating the process of switching on the source follower, which makes the source follower have an advantage of high-speed stability.
It is further noted that the off/on circuit of the multiplexed analog-to-digital converter clock can be applied in the design of P-type MOS source follower and N-type MOS source follower.
In the source follower capable of being rapidly switched off/on, the source follower, the switching-off/on circuit and the biasing circuit form a low-power-consumption dynamic source follower multiplexing analog-to-digital converter clock.
The cut-off/on circuit receives signal sampling time information corresponding to a signal sampling process performed in the source follower, starts a process of cutting off the source follower when the signal sampling time information shows that the signal sampling process is finished, and outputs a corresponding cut-off signal to the bias circuit for accelerating the process of cutting off the source follower, wherein the sampling time information corresponds to a sampling clock of the cut-off/on circuit; or alternatively, the process may be performed,
the turn-off/turn-on circuit receives signal conversion time information corresponding to a signal conversion process performed in the analog-to-digital converter, and starts a process of turning on the source follower when the signal conversion time information indicates that the signal conversion process is ended and outputs a corresponding turn-on signal to the bias circuit for accelerating the process of turning on the source follower, the signal conversion time information corresponding to a conversion clock of the turn-off/turn-on circuit.
As an embodiment of the present invention, the off/on circuit includes a switch and a precharge capacitor. The switch realizes the switching process of switching on/off the source follower, and the precharge capacitor realizes the accelerating switching on/off process of the source follower and outputs corresponding switching on/off signals.
As an embodiment of the present invention, the source follower may be a source follower having a P-type MOS transistor.
As an embodiment of the present invention, a bias circuit includes: the source electrode of the P-type MOS tube is connected with the power supply voltage, the grid electrode of the P-type MOS tube is connected with the drain electrode of the P-type MOS tube and one end of the current source to generate corresponding bias voltage, and the other end of the current source is grounded.
As an embodiment of the present invention, the source follower may also be a source follower with an N-type MOS transistor.
As an embodiment of the present invention, the sampling clock of the off/on circuit multiplexes the sampling clock of the analog-to-digital converter.
As an embodiment of the present invention, the conversion clock of the off/on circuit multiplexes the conversion clock of the analog-to-digital converter.
As an embodiment of the present invention, the sampling clock and the conversion clock of the off/on circuit multiplex the sampling clock and the conversion clock of the analog-to-digital converter, respectively.
The source follower capable of being turned off/on quickly starts the process of turning off/on the source follower through the display result of the turn-off/on circuit and outputs the corresponding turn-off/on signal to the bias circuit for accelerating the process of turning off/on the source follower, so that the source follower has the advantages of high speed and stability and low power consumption.
Fig. 2 is a schematic circuit diagram of a fast turn-off/on source follower fast turn-off process according to an embodiment of the present invention.
As can be seen from fig. 2, CLKH controls the closing of switches S3, S5, S7, S9; the reverse clock of CLKS controls the closing of switch S2 with the remaining switches being in an open state. At this time, the gate bias voltage VX of the MOS transistor M2 is connected to VDD and is applied to the capacitor C X Charging is performed. Capacitor C during source follower fast turn-off X Is charged to (VDD-GND), where GND (Ground).
During the fast turn-off of the source follower by the turn-off/turn-on circuit, VX is connected to VDD due to the precharge capacitor C Y Through the function of the MOS transistor, VX can reach VDD faster, and the MOS transistor M2 can be cut off rapidly, so that the power consumption consumed by the source follower is saved, and the source follower has the advantage of low power consumption.
Fig. 3 is a schematic circuit diagram of a fast turn-on/fast turn-off source follower according to an embodiment of the present invention.
As can be seen from fig. 3, CLKS controls the closing of switches S1, S4, S6, S8, S10, with the remaining switches being in an open state. At this time, the gate bias voltage VX of the MOS transistor M2 is connected to VBP2 and simultaneously corresponds to the capacitor C Y Charging is performed. Capacitor C during the fast on period of the source follower Y Is charged to (VDD-GND), where GND (Ground).
Precharge capacitor C during fast turn-on of source follower by turn-off/turn-on circuit X The parasitic capacitance Cp of the grid electrode of the MOS tube M2 is used for rapidly distributing charges, meanwhile, the bias voltage VBP2 of the MOS tube M2 can also start to charge the Cp, and under the combined action of the parasitic capacitance Cp and the MOS tube, the rapid switching-on process of the low-power consumption dynamic source follower is quickened, so that the source follower is rapidly recovered to the working state of the source follower from the previous switching-off state, and the source follower has the advantage of high speed and stability.
Fig. 4a is an equivalent schematic diagram of a fast turn-off circuit of a fast turn-off/turn-on source follower of an embodiment of the present invention, and fig. 4b is an equivalent schematic diagram of a fast turn-off/turn-on circuit of a fast turn-on source follower of an analog-to-digital converter of an embodiment of the present invention.
As can be seen from fig. 4a, during the fast turn-off of the source follower by the turn-off/on circuit, due to the precharge capacitor C Y Through the function of the MOS transistor, VX can reach VDD faster, and the MOS transistor M2 can be cut off rapidly, so that the power consumption consumed by the source follower is saved, and the source follower has the advantage of low power consumption.
As can be seen from fig. 4b, the capacitor C is precharged during the fast on-state of the source follower by the off/on circuit X And meanwhile, the bias voltage VBP2 of the MOS tube M2 can start to charge Cp, so that the process of quickly recovering the source follower from the previous cut-off state to the working state of the source follower is accelerated.
Fig. 5 is a timing diagram of the fast turn-off and fast turn-on process of the fast turn-off/turn-on source follower of the embodiment of the present invention.
From FIG. 5, it can be seen thatIt is seen that: capacitor C during source follower fast turn-off X Is charged to (VDD-GND), VX is connected to VDD, due to the precharge capacitor C Y Through the function of (2), VX can reach VDD faster, and the MOS tube M2 can be cut off rapidly, wherein GND (Ground).
In contrast, during the fast turn-on of the source follower, the capacitor C Y Is charged to (VDD-GND), precharging capacitor C X And meanwhile, the bias voltage VBP2 of the MOS tube M2 can start to charge Cp, so that the process of quickly recovering the source follower from the previous cut-off state to the working state of the source follower is accelerated.
It should be further noted that the precharge capacitor C X The magnitude of the precharge capacitor C can be determined by the following equation (1) X Wherein the on-resistance of the switch is not taken into account: v (V) X, initial value ＝VDD，V X, final value ＝VBP2，V CX, prefill ＝VDD-GND，V CX, end value ＝VDD-VBP2，
By conservation of the electric charge,
Q initial value of ＝VDD×C P +(VDD-GND)×C X ＝Q Final value of ＝(VDD-VBP2)×C X +VBP2×C P ，
The following formula (1) is obtained from the above derivation:
Figure BDA0000986944990000081
as shown in the above formula, it should be noted that, in the source follower provided in the embodiment of the present invention, the capacitor C is precharged X The size of the (C) can be accurately calculated through the formula so as to meet different requirements of users. Compared with the prior art, the source follower provided by the embodiment of the invention can more accurately control the precharge capacitor C X So that the source follower further has the advantage of precise controllability.
The cut-off/on circuit of the source follower which is cut-off/on rapidly in the embodiment of the invention is used for accelerating the cut-off/on process of the source follower by rapidly starting the cut-off/on process of the source follower and outputting the corresponding cut-off/on signal to the bias circuit, so that the source follower has the advantages of low power consumption and high speed stability.
In practical applications, the source follower may also be used to prepare a device including the source follower, and specific details refer to corresponding details of the source follower, which are not described herein.
The foregoing description of the embodiments has been provided for the purpose of illustrating the general principles of the invention, and is not meant to limit the scope of the invention, but to limit the invention to the particular embodiments, and any modifications, equivalents, improvements, etc. that fall within the spirit and principles of the invention are intended to be included within the scope of the invention.

Claims (8)

1. A fast turn-off/turn-on source follower, comprising: a source follower, a cut-off/on circuit, and a bias circuit,
the cut-off/on circuit receives signal sampling time information corresponding to a signal sampling process performed in the analog-to-digital converter, and starts a process of cutting off the source follower and outputs a corresponding cut-off signal to the bias circuit for accelerating the process of cutting off the source follower when the signal sampling time information shows that the signal sampling process is finished, wherein the sampling time information corresponds to a sampling clock of the cut-off/on circuit; or alternatively, the process may be performed,
the off/on circuit receives signal conversion time information corresponding to a signal conversion process performed in the analog-to-digital converter, and starts a process of turning on the source follower and outputs a corresponding on signal to the bias circuit for accelerating the process of turning on the source follower when the signal conversion time information shows that the signal conversion process is ended, the signal conversion time information corresponding to a conversion clock of the off/on circuit;
the switching-off/switching-on circuit comprises a switch for realizing the switching-off/switching-on process of the source follower, a precharge capacitor for realizing the accelerating switching-off/switching-on process of the source follower and outputting corresponding switching-off/switching-on signals; the off/on circuit includes two pre-charge capacitors.
2. The fast turn-off/on source follower as defined in claim 1, wherein,
the source follower is a source follower with a P-type MOS tube.
3. The fast turn-off/on source follower as defined in claim 2 wherein the biasing circuit comprises:
the source electrode of the P-type MOS tube is connected with the power supply voltage, the grid electrode of the P-type MOS tube is connected with the drain electrode of the P-type MOS tube and one end of the current source to generate corresponding bias voltage, and the other end of the current source is grounded.
4. The fast turn-off/on source follower as defined in claim 1, wherein,
the source follower is a source follower with an N-type MOS tube.
5. The fast turn-off/on source follower as defined in claim 1, wherein,
the sampling clock of the off/on circuit multiplexes the sampling clock of the analog-to-digital converter.
6. The fast turn-off/on source follower as defined in claim 1, wherein,
the switching clock of the off/on circuit multiplexes the switching clock of the analog-to-digital converter.
7. The fast turn-off/on source follower as defined in claim 1, wherein,
the sampling clock and the conversion clock of the switching-off/switching-on circuit respectively multiplex the sampling clock and the conversion clock of the analog-to-digital converter.
8. A device for realizing a fast turn-off/turn-on source follower, characterized by comprising the device of any one of claims 1-7.
CN201610312801.0A 2016-05-11 2016-05-11 Fast turn-off/on source follower Active CN105897264B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610312801.0A CN105897264B (en) 2016-05-11 2016-05-11 Fast turn-off/on source follower

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610312801.0A CN105897264B (en) 2016-05-11 2016-05-11 Fast turn-off/on source follower

Publications (2)

Publication Number Publication Date
CN105897264A CN105897264A (en) 2016-08-24
CN105897264B true CN105897264B (en) 2023-06-02

Family

ID=56703627

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610312801.0A Active CN105897264B (en) 2016-05-11 2016-05-11 Fast turn-off/on source follower

Country Status (1)

Country Link
CN (1) CN105897264B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106489778A (en) * 2016-09-27 2017-03-15 四川森迪科技发展股份有限公司 A kind of pouity dwelling place automatic exhaust system based on follow circuit
CN106472323A (en) * 2016-09-27 2017-03-08 四川森迪科技发展股份有限公司 A kind of soft start pouity dwelling place automatic exhaust system based on follow circuit
CN106404193A (en) * 2016-10-11 2017-02-15 四川森迪科技发展股份有限公司 Source-follower-circuit-based signal amplification type remote temperature monitoring system for barton
CN106353005A (en) * 2016-10-11 2017-01-25 四川森迪科技发展股份有限公司 Chicken farm remote temperature monitoring system based on source electrode follower circuit

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3039809B2 (en) * 1990-05-31 2000-05-08 株式会社日立製作所 Analog / digital converter, sampling pulse generation circuit, and current switch circuit
CN103986467A (en) * 2013-02-07 2014-08-13 陈启星 Multi-level parallel type ADC and DAC based on voltage following switch
CN105071806B (en) * 2015-08-28 2019-01-15 西安启微迭仪半导体科技有限公司 High linearity buffer input signal device applied to high-speed AD converter

Also Published As

Publication number Publication date
CN105897264A (en) 2016-08-24

Similar Documents

Publication Publication Date Title
CN102761337B (en) Tracking system with the method for following the tracks of and operating is performed to input signal
CN105897264B (en) Fast turn-off/on source follower
US8610422B2 (en) Dynamic biasing of an amplifier using capacitive driving of internal bias voltages
CN105071806B (en) High linearity buffer input signal device applied to high-speed AD converter
CN102185596A (en) Bootstrapping sampling switch applied to high-speed and high-linearity analog-to-digital converter
CN101860368B (en) Negative-voltage effective transmission circuit suitable for standard CMOS process
CN111245413A (en) High-speed high-linearity grid voltage bootstrap switch circuit
CN101986570B (en) Analog-to-digital converter (ADC) and sample-and-hold circuit thereof
CN103279162B (en) Low-power-consumption reference voltage buffer based on assembly line ADC
CN113783563A (en) Negative voltage low leakage current switch circuit
CN101350621A (en) A/D converter
CN102447248A (en) Pull-down current input output circuit
CN100464504C (en) A sampling device for analog signal
CN104202022A (en) Novel low-power-consumption comparator
CN109586695B (en) Circuit of high-speed dynamic comparator
US20160352312A1 (en) Level conversion circuit and apparatus
CN104539292B (en) A kind of low voltage, high-speed sampling hold circuit
CN104052489B (en) Current-type DAC applied to silicon-based OLED micro-display driver chip
CN115378409A (en) Low insertion loss high-power radio frequency switch fast switching circuit
CN114866088A (en) Low-power-consumption integrator circuit based on dynamic access inverter and working method thereof
CN114696810A (en) Grid bootstrap switch circuit and control method thereof
CN212785316U (en) Bootstrap switch structure without influencing service life of device
CN114374388A (en) Two-step-established bootstrap sampling switch circuit and integrated circuit
CN110690820B (en) A last tube grid source voltage sampling circuit for Buck circuit
CN110690900B (en) Time domain ADC full-swing front-end circuit

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
TA01 Transfer of patent application right
TA01 Transfer of patent application right

Effective date of registration: 20201223

Address after: 100094 Room 601, unit 3, 6 / F, building 2, yard 9, FengHao East Road, Haidian District, Beijing

Applicant after: Beijing Weihao integrated circuit design Co.,Ltd.

Address before: Room 2701-1, building 2, TEDA service outsourcing park, 19 Xinhuan West Road, Tianjin Development Zone, Binhai New Area, Tianjin, 300457

Applicant before: INTERNATIONAL GREEN CHIP (TIANJIN) Co.,Ltd.

CB02 Change of applicant information
CB02 Change of applicant information

Address after: 100094 Room 601, unit 3, 6 / F, building 2, yard 9, FengHao East Road, Haidian District, Beijing

Applicant after: Howell analog integrated circuit (Beijing) Co.,Ltd.

Address before: 100094 Room 601, unit 3, 6 / F, building 2, yard 9, FengHao East Road, Haidian District, Beijing

Applicant before: Beijing Weihao integrated circuit design Co.,Ltd.

GR01 Patent grant
GR01 Patent grant