CN105867515A - Solar cell array maximum power tracking hardware circuit - Google Patents
Solar cell array maximum power tracking hardware circuit Download PDFInfo
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- CN105867515A CN105867515A CN201610251206.0A CN201610251206A CN105867515A CN 105867515 A CN105867515 A CN 105867515A CN 201610251206 A CN201610251206 A CN 201610251206A CN 105867515 A CN105867515 A CN 105867515A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/66—Regulating electric power
- G05F1/67—Regulating electric power to the maximum power available from a generator, e.g. from solar cell
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/56—Power conversion systems, e.g. maximum power point trackers
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Abstract
A solar cell array maximum power tracking hardware circuit comprises a differential module, a voltage division module, a switch energy storage module, a voltage comparison module, a setting and resetting module, a logic selection module and a filter module. The differential module is electrically connected with solar array output voltage VSA and solar array output current ISA, the voltage division module is electrically connected with the differential module, the switch energy storage module is electrically connected with the voltage division module, the voltage comparison module is electrically connected with the switch energy storage module, and the filter module is electrically connected with the setting and resetting module and the logic selection module. On the basis of inherent characteristics of a solar array output characteristic curve, voltage and current are disturbed alternately, maximum power tracking can be realized simply, quickly and efficiently; an algorithm has no direct relation with power, multiply-divide operation is not needed, and the hardware circuit is easy to realized; disturbance is continuous, and the hardware circuit has better reliability, so that anti-radiation characteristics of MPPT algorithm control signals are improved; the hardware circuit has autonomy and high accuracy, can quickly and accurately track maximum power point and adapts to space application needs.
Description
Technical field
The present invention relates to space power and control technical field, be specifically related to a kind of solar battery array maximal power tracing hardware circuit.
Background technology
Power transmission techniques is an important component part of spatial overlay technology.Power transfer relation has DIRECT ENERGY (DET) transmission means and maximal power tracing (MPPT) transmission means.MPPT mode can utilize the power output of sun battle array to greatest extent.MPPT algorithm is the important component part of MPPT mode.
Traditional MPPT algorithm, the general method of perturbation used as shown in Figure 1, or use increment conductance method as shown in Figure 2, from Fig. 1 and Fig. 2, traditional MPPT algorithm needs to gather the output voltage of sun battle array, electric current, carry out a series of Logic judgment after calculating power output and produce MPPT control signal, traditional MPPT algorithm needs multiplier-divider, applicable software mode realizes, the application demand under space radiation environment cannot be adapted to, and there is △ V step disturbance in traditional MPPT algorithm, it is impossible to adapt to space high reliability application demand.
Traditional MPPT algorithm is due to its Flouride-resistani acid phesphatase and poor reliability, it is impossible to adapt to space application demand.Therefore hardware MPPT algorithm is achieved in that one of MPPT technique space application problem demanding prompt solution.
Summary of the invention
The present invention provides a kind of solar battery array maximal power tracing hardware circuit, based on sun battle array output characteristic curve intrinsic characteristic, disturbance voltage and current alternately, simple and quick can realize maximal power tracing efficiently, algorithm is not directly dependent upon with power, there is no multiplication and division computing, therefore easily realize with hardware circuit, and disturbance is continuous, disturbance is got on the rank that there is not traditional algorithm, there is more preferable reliability, improve MPPT algorithm control signal radiation-resisting performance, there is independence and high accuracy, and maximum power point can be tracked fast and accurately, adapt to the demand of space application.
In order to achieve the above object, the present invention provides a kind of solar battery array maximal power tracing hardware circuit, comprise the difference block being electrically connected with signal source, it is electrically connected with the division module of difference block, it is electrically connected with the energy storing of switch module of division module, it is electrically connected with the voltage comparison module of energy storing of switch module, set-reset module, it is electrically connected with energy storing of switch module, the logic of voltage comparison module and set-reset module selects module, and it is electrically connected with set-reset module and the filtration module of logic selection module, described signal source comprises two paths of signals, one tunnel is the first signal source, i.e. sun battle array output voltage VSA, another road is secondary signal source, i.e. sun battle array output electric current ISA.
Described difference block comprises the first difference channel and the second difference channel, the circuit structure of the first difference channel and the second difference channel is consistent, the input of the first difference channel connects the first signal source, the input of the second difference channel connects secondary signal source, this first difference channel and the second difference channel difference output the first signal source and secondary signal source respectively；
The first described difference channel comprises the first operational amplifier, the positive level input of this first operational amplifier connects the first signal source by the first resistance, and by the 3rd resistance eutral grounding, the negative level input of the first operational amplifier passes through the second resistance eutral grounding, and is connected the output of the first operational amplifier by the 4th resistance；The second described difference channel comprises the second operational amplifier, the positive level input of this second operational amplifier connects secondary signal source by the 5th resistance, and by the 7th resistance eutral grounding, the negative level input of the second operational amplifier passes through the 6th resistance eutral grounding, and is connected the output of the second operational amplifier by the 8th resistance.
Described division module comprises the first bleeder circuit and the second bleeder circuit, the circuit structure of the first bleeder circuit and the second bleeder circuit is consistent, the input of the first bleeder circuit connects the output of the first difference channel, the input of the second bleeder circuit connects the output of the second difference channel, and this first bleeder circuit and the second bleeder circuit dividing potential drop respectively export the first signal source and the differential output signal in secondary signal source；
The first described bleeder circuit comprises the first divider resistance and second divider resistance of series connection, the anode of the first divider resistance connects the output of described first operational amplifier, the negative terminal of the first divider resistance and the anode of the second divider resistance connect, the negativing ending grounding of the second divider resistance, the differential output signal of the first signal source is exported by the negative terminal of the first divider resistance after the first divider resistance and the second divider resistance dividing potential drop；
The second described bleeder circuit comprises the 3rd divider resistance and the 4th divider resistance of series connection, the anode of the 3rd divider resistance connects the output of described second operational amplifier, the negative terminal of the 3rd divider resistance and the anode of the 4th divider resistance connect, the negativing ending grounding of the 4th divider resistance, the differential output signal in secondary signal source is exported by the negative terminal of the 3rd divider resistance after the 3rd divider resistance and the 4th divider resistance dividing potential drop.
Described energy storing of switch module comprises the first energy storing of switch circuit and second switch accumulator, first energy storing of switch circuit is consistent with the circuit structure of second switch accumulator, the input of the first energy storing of switch circuit connects the output of the first bleeder circuit, and the input of second switch accumulator connects the output of the second bleeder circuit；
The first described energy storing of switch circuit comprises the first switching device and the first storage capacitor, the input of the first switching device connects the negative terminal of the first divider resistance in the first bleeder circuit, the output of the first switching device connects the anode of the first storage capacitor, the control end of the first switching device connects logic and selects module, the negativing ending grounding of the first storage capacitor；
Described second switch accumulator comprises second switch device and the second storage capacitor, the input of second switch device connects the negative terminal of the 3rd divider resistance in the second bleeder circuit, the output of second switch device connects the anode of the second storage capacitor, the control end of second switch device connects logic and selects module, the second storage capacitor negativing ending grounding.
The first described switching device and second switch device are low level conduction device.
Described voltage comparison module comprises the first voltage comparator and the second voltage comparator；
The electrode input end of the first described voltage comparator connects the output of the first switching device in the first energy storing of switch circuit, the negative input of the first voltage comparator connects the output of the first operational amplifier in the first difference channel, the signal of the positive-negative input end of the first voltage comparator differs from a switch periods on a timeline, and due to division module and the existence of energy storing of switch module, the positive-negative input end of the first voltage comparator numerically has a dynamic change procedure, and the output of the first voltage comparator exports the comparison signal of its positive-negative input end；
The electrode input end of the second described voltage comparator connects the output of second switch device in second switch accumulator, the negative input of the second voltage comparator connects the output of the second operational amplifier in the second difference channel, the signal of the positive-negative input end of the second voltage comparator differs from a switch periods on a timeline, and due to division module and the existence of energy storing of switch module, the positive-negative input end of the second voltage comparator numerically has a dynamic change procedure, and the output of the second voltage comparator exports the comparison signal of its positive-negative input end.
Described set-reset module comprises tertiary voltage comparator, the 4th voltage comparator, the first isolating diode and the second isolating diode, and set-reset module carries out set-reset to system when system is opened or time abnormal；
The electrode input end of described tertiary voltage comparator connects the first reference signal, negative input connects the MPPT control signal of filtration module output, output connects the anode of the first isolating diode, the negative terminal of the first isolating diode connects logic and selects module, reset signal is exported and selects module to logic；
The electrode input end of the 4th described voltage comparator connects the MPPT control signal of filtration module output, negative input connects the second reference signal, output connects the anode of the second isolating diode, the negative terminal of the second isolating diode connects logic and selects module, is exported by set signal and selects module to logic.
Described logic selects module to comprise the first NAND gate, the second NAND gate, the 3rd NAND gate and the 4th NAND gate；
Two inputs of the first described NAND gate connect the negative terminal of the first isolating diode in the output of the first voltage comparator in voltage comparison module and set-reset module respectively, and the output of the first NAND gate connects the input of the 3rd NAND gate；
Two inputs of the second described NAND gate connect the negative terminal of the second isolating diode in the output of the second voltage comparator in voltage comparison module and set-reset module respectively, and the output of the second NAND gate connects the input of the 4th NAND gate；
The output of the 3rd described NAND gate connects another input of the 4th NAND gate, the output of the 4th described NAND gate connects another input of the 3rd NAND gate, the control end of second switch device in the output connecting valve energy-storage module of the 3rd NAND gate, control its turn-on and turn-off, the control end of the first switching device in the output connecting valve energy-storage module of the 4th NAND gate, control its turn-on and turn-off, form the first signal source and the staggered selection of secondary signal source signal control access；
Described the first NAND gate, the second NAND gate, the 3rd NAND gate and the 4th NAND gate are two input nand gate devices.
Described filtration module comprises filter resistance, filter capacitor and the 3rd operational amplifier；
The input of described filter resistance connects logic and selects the output of the 3rd NAND gate in module, the output of filter resistance connects the anode of filter capacitor, the negativing ending grounding of filter capacitor, the combinational circuit of filter resistance and filter capacitor achieves the high-frequency signal to the 3rd NAND gate output and is filtered as low frequency signal, i.e. MPPT control signal；
The output of filter resistance is simultaneously connected with the electrode input end of the 3rd operational amplifier, the output of the 3rd operational amplifier connects the negative input of the 3rd operational amplifier, constitute feedback circuit, the output output MPPT control signal of the 3rd operational amplifier, forming the isolation of MPPT control signal and follow output, the output of the 3rd operational amplifier connects negative input and the electrode input end of the 4th voltage comparator of tertiary voltage comparator in set-reset module respectively simultaneously.
The present invention is based on sun battle array output characteristic curve intrinsic characteristic, disturbance voltage and current alternately, simple and quick can realize maximal power tracing efficiently, algorithm is not directly dependent upon with power, there is no multiplication and division computing, therefore easily realize with hardware circuit, and disturbance is continuous, disturbance is got on the rank that there is not traditional algorithm, there is more preferable reliability, improve MPPT algorithm control signal radiation-resisting performance, there is independence and high accuracy, and maximum power point can be tracked fast and accurately, adapt to the demand of space application.
Accompanying drawing explanation
Fig. 1 is the flow chart utilizing method of perturbation to carry out maximal power tracing in background technology.
Fig. 2 is the flow chart utilizing increment conductance method to carry out maximal power tracing in background technology.
Fig. 3 is the hardware circuit diagram of a kind of solar battery array maximal power tracing hardware circuit that the present invention provides.
Fig. 4 is the physical circuit figure of a kind of solar battery array maximal power tracing hardware circuit that the present invention provides.
Detailed description of the invention
Below according to Fig. 3 and Fig. 4, illustrate presently preferred embodiments of the present invention.
As shown in Figure 3, the present invention provides a kind of solar battery array maximal power tracing hardware circuit, comprise: signal source 1, it is electrically connected with the difference block 2 of signal source 1, it is electrically connected with the division module 3 of difference block 2, it is electrically connected with the energy storing of switch module 4 of division module 3, it is electrically connected with the voltage comparison module 5 of energy storing of switch module 4, set-reset module 6, the logic being electrically connected with energy storing of switch module 4, voltage comparison module 5 and set-reset module 6 selects module 7, and is electrically connected with set-reset module 6 and the filtration module 8 of logic selection module 7.
As shown in Figure 4, in one embodiment of the invention, the input input sun battle array output voltage VSA of the solar battery array maximal power tracing hardware circuit that the present invention provides and sun battle array output electric current ISA signal, output output MPPT control signal, to external power circuit, controls external power circuit and tracks the maximum power point of sun battle array.
Described signal source comprises two paths of signals, and a road is the first signal source VSA(sun battle array output voltage), another road is secondary signal source ISA(sun battle array output electric current).
Described difference block comprises the first difference channel and the second difference channel, the circuit structure of the first difference channel and the second difference channel is consistent, the input of the first difference channel connects the first signal source VSA, the input of the second difference channel connects secondary signal source ISA, this first difference channel and the second difference channel difference output the first signal source VSA and secondary signal source ISA respectively.
The first described difference channel comprises the first operational amplifier U1, the positive level input of this first operational amplifier U1 connects the first signal source VSA by the first resistance R1, and by the 3rd resistance R3 ground connection, the negative level input of the first operational amplifier U1 passes through the second resistance R2 ground connection, and is connected the output of the first operational amplifier U1 by the 4th resistance R4；The second described difference channel comprises the second operational amplifier U2, the positive level input of this second operational amplifier U connects secondary signal source ISA by the 5th resistance R1 ', and by the 7th resistance R3 ' ground connection, the negative level input of the second operational amplifier U2 passes through the 6th resistance R2 ' ground connection, and is connected the output of the second operational amplifier U2 by the 8th resistance R4 '.In the present embodiment, resistance R1, R2, R3, R4, R1 in difference block ', R2 ', R3 ', R4 ' span be 100K Ω and more than.
Described division module comprises the first bleeder circuit and the second bleeder circuit, the circuit structure of the first bleeder circuit and the second bleeder circuit is consistent, the input of the first bleeder circuit connects the output of the first difference channel, the input of the second bleeder circuit connects the output of the second difference channel, and this first bleeder circuit and the second bleeder circuit dividing potential drop respectively export the first signal source VSA and the differential output signal of secondary signal source ISA.
The first described bleeder circuit comprises the first divider resistance R5 and the second divider resistance R6 of series connection, the anode of the first divider resistance R5 connects the output of described first operational amplifier U1, the negative terminal of the first divider resistance R5 and the anode of the second divider resistance R6 connect, the negativing ending grounding of the second divider resistance R6, the differential output signal of the first signal source VSA is exported by the negative terminal of the first divider resistance R5 after the first divider resistance R5 and the second divider resistance R6 dividing potential drop；The second described bleeder circuit comprises the 3rd divider resistance R5 ' and the 4th divider resistance R6 ' of series connection, the anode of the 3rd divider resistance R5 ' connects the output of described second operational amplifier U2, the negative terminal of the 3rd divider resistance R5 ' and the anode of the 4th divider resistance R6 ' connect, the negativing ending grounding of the 4th divider resistance R6 ', the differential output signal of secondary signal source ISA is exported by the negative terminal of the 3rd divider resistance R5 ' after the 3rd divider resistance R5 ' and the 4th divider resistance R6 ' dividing potential drop.In the present embodiment, within the value of R5/R6 can be 0.1, R6 span be 100K ohm and more than, within the value of R5 '/R6 ' can be 0.1, R6 ' span be 100K ohm and more than.
Described energy storing of switch module comprises the first energy storing of switch circuit and second switch accumulator, first energy storing of switch circuit is consistent with the circuit structure of second switch accumulator, the input of the first energy storing of switch circuit connects the output of the first bleeder circuit, and the input of second switch accumulator connects the output of the second bleeder circuit.
The first described energy storing of switch circuit comprises the first switching device M1 and the first storage capacitor C1, first switching device M1 has three signal ports, the input of the first switching device M1 connects the negative terminal (i.e. connecting the first signal source VSA differential output signal after dividing potential drop) of the first divider resistance R5 in the first bleeder circuit, the output of the first switching device M1 connects the anode of the first storage capacitor C1, the control end of the first switching device M1 connects logic and selects module, the negativing ending grounding of the first storage capacitor C1, module is selected to control turning on and off of the first switching device M1 by logic, first switching device M1 is low level conduction device；Described second switch accumulator comprises second switch device M2 and the second storage capacitor C2, second switch device M2 has three signal ports, the input of second switch device M2 connects the negative terminal (i.e. connecting the secondary signal source ISA differential output signal after dividing potential drop) of the 3rd divider resistance R5 ' in the second bleeder circuit, the output of second switch device M2 connects the anode of the second storage capacitor C2, the control end of second switch device M2 connects logic and selects module, second storage capacitor C2 negativing ending grounding, module is selected to control turning on and off of second switch device M2 by logic, second switch device M2 is low level conduction device.
Described voltage comparison module comprises the first voltage comparator U3 and the second voltage comparator U4.The electrode input end of the first described voltage comparator U3 connects the output of the first switching device M1 in the first energy storing of switch circuit, the negative input of the first voltage comparator U3 connects the output of the first operational amplifier U1 in the first difference channel, the signal of the positive-negative input end of the first voltage comparator U3 differs from a switch periods on a timeline, and due to division module and the existence of energy storing of switch module, the positive-negative input end of the first voltage comparator U3 numerically has a dynamic change procedure, the output of the first voltage comparator U3 exports the comparison signal of its positive-negative input end；The electrode input end of the second described voltage comparator U4 connects the output of second switch device M2 in second switch accumulator, the negative input of the second voltage comparator U4 connects the output of the second operational amplifier U2 in the second difference channel, the signal of the positive-negative input end of the second voltage comparator U4 differs from a switch periods on a timeline, and due to division module and the existence of energy storing of switch module, the positive-negative input end of the second voltage comparator U4 numerically has a dynamic change procedure, the output of the second voltage comparator U4 exports the comparison signal of its positive-negative input end.
Described set-reset module comprises tertiary voltage comparator U5, the 4th voltage comparator U6, the first isolating diode D1 and the second isolating diode D2, and set-reset module carries out set-reset to system when system is opened or time abnormal.The electrode input end of described tertiary voltage comparator U5 connects the first reference signal V1, negative input connects the output of filtration module, i.e. connect MPPT control signal, output connects the anode of the first isolating diode D1, the negative terminal of isolating diode D1 connects logic and selects module, reset signal Reset is exported and selects module to logic；The electrode input end of the 4th described voltage comparator U6 connects the output of filtration module, i.e. connect MPPT control signal, negative input connects the second reference signal V2, output connects the anode of the second isolating diode D2, the negative terminal of the second isolating diode D2 connects logic and selects module, is exported by set signal Set and selects module to logic.In the present embodiment, the first reference signal V1 can value be about 1V, and the second reference signal V2 can value be about 11V.
Described logic selects module to comprise the first NAND gate U7, the second NAND gate U8, the 3rd NAND gate U9 and the 4th NAND gate U10, and they are 2 input nand gate circuit.Two inputs of the first described NAND gate U7 connect the negative terminal of the first isolating diode D1 in the output of the first voltage comparator U3 in voltage comparison module and set-reset module respectively, and the output of the first NAND gate U7 connects the input of the 3rd NAND gate U9；Two inputs of the second described NAND gate U8 connect the negative terminal of the second isolating diode D2 in the output of the second voltage comparator U4 in voltage comparison module and set-reset module respectively, and the output of the second NAND gate U8 connects the input of the 4th NAND gate U10；The output of the 3rd described NAND gate U9 connects another input of the 4th NAND gate U10, the output of the 4th described NAND gate U10 connects another input of the 3rd NAND gate U9, the control end of second switch device M2 in the output connecting valve energy-storage module of the 3rd NAND gate U9, control its turn-on and turn-off, the control end of the first switching device M1 in the output connecting valve energy-storage module of the 4th NAND gate U10, control its turn-on and turn-off, form the first signal source VSA and the staggered selection of ISA signal control access, secondary signal source.
Described filtration module comprises filter resistance R7, filter capacitor C3 and the 3rd operational amplifier U11.nullThe input of described filter resistance R7 connects logic and selects the output of the 3rd NAND gate U9 in module，The output of filter resistance R7 connects the anode of filter capacitor C3，The negativing ending grounding of filter capacitor C3，The combinational circuit of filter resistance R7 and filter capacitor C3 achieves the high-frequency signal to the 3rd NAND gate U9 output and is filtered as low frequency signal，I.e. MPPT control signal，The output of filter resistance R7 is simultaneously connected with the electrode input end of the 3rd operational amplifier U11，The output of the 3rd operational amplifier U11 connects the negative input of the 3rd operational amplifier U11，Constitute feedback circuit，The output output MPPT control signal of the 3rd operational amplifier U11，Form the isolation of MPPT control signal and follow output，The output of the 3rd operational amplifier U11 connects the electrode input end with the 4th voltage comparator U6 of the negative input of tertiary voltage comparator U5 in set-reset module respectively simultaneously，MPPT control signal is exported to tertiary voltage comparator U5 and the 4th voltage comparator U6.In the present embodiment, the value of filter resistance R7 can be 10K ohm level, and the value of filter capacitor C3 can be 1uf magnitude.
nullThe MPPT algorithm hardware circuit that the present invention provides is by using division module、Energy storing of switch module、Voltage comparison module、Set-reset module、Logic selects module etc. to cooperatively form the first signal source VSA and the staggered selection of ISA signal control access, secondary signal source and disturbance，Form MPPT control signal and control external power circuit，Change sun battle array operating point，And tend to maximum power point，Finally stablize near maximum power point in the case of outside ambient stable，This algorithm has higher precision，And intrinsic characteristic based on the output of sun battle array，All circuit are built by analog circuit，Algorithm is not directly dependent upon with power，There is no multiplication and division computing，Therefore easily realize with hardware circuit，Its radiation-resisting performance is significantly better than the MPPT algorithm that software realizes，And disturbance is continuous，This hardware circuit has higher reliability，Meet the demand of space application.
Although present disclosure has been made to be discussed in detail by above preferred embodiment, but it should be appreciated that the description above is not considered as limitation of the present invention.After those skilled in the art have read foregoing, multiple amendment and replacement for the present invention all will be apparent from.Therefore, protection scope of the present invention should be limited to the appended claims.
Claims (9)
1. a solar battery array maximal power tracing hardware circuit, it is characterized in that, comprise the difference block being electrically connected with signal source, it is electrically connected with the division module of difference block, it is electrically connected with the energy storing of switch module of division module, it is electrically connected with the voltage comparison module of energy storing of switch module, set-reset module, it is electrically connected with energy storing of switch module, the logic of voltage comparison module and set-reset module selects module, and it is electrically connected with set-reset module and the filtration module of logic selection module, described signal source comprises two paths of signals, one tunnel is the first signal source, i.e. sun battle array output voltage VSA, another road is secondary signal source, i.e. sun battle array output electric current ISA.
2. solar battery array maximal power tracing hardware circuit as claimed in claim 1, it is characterized in that, described difference block comprises the first difference channel and the second difference channel, the circuit structure of the first difference channel and the second difference channel is consistent, the input of the first difference channel connects the first signal source, the input of the second difference channel connects secondary signal source, this first difference channel and the second difference channel difference output the first signal source and secondary signal source respectively；
The first described difference channel comprises the first operational amplifier, the positive level input of this first operational amplifier connects the first signal source by the first resistance, and by the 3rd resistance eutral grounding, the negative level input of the first operational amplifier passes through the second resistance eutral grounding, and is connected the output of the first operational amplifier by the 4th resistance；The second described difference channel comprises the second operational amplifier, the positive level input of this second operational amplifier connects secondary signal source by the 5th resistance, and by the 7th resistance eutral grounding, the negative level input of the second operational amplifier passes through the 6th resistance eutral grounding, and is connected the output of the second operational amplifier by the 8th resistance.
3. solar battery array maximal power tracing hardware circuit as claimed in claim 2, it is characterized in that, described division module comprises the first bleeder circuit and the second bleeder circuit, the circuit structure of the first bleeder circuit and the second bleeder circuit is consistent, the input of the first bleeder circuit connects the output of the first difference channel, the input of the second bleeder circuit connects the output of the second difference channel, and this first bleeder circuit and the second bleeder circuit dividing potential drop respectively export the first signal source and the differential output signal in secondary signal source；
The first described bleeder circuit comprises the first divider resistance and second divider resistance of series connection, the anode of the first divider resistance connects the output of described first operational amplifier, the negative terminal of the first divider resistance and the anode of the second divider resistance connect, the negativing ending grounding of the second divider resistance, the differential output signal of the first signal source is exported by the negative terminal of the first divider resistance after the first divider resistance and the second divider resistance dividing potential drop；
The second described bleeder circuit comprises the 3rd divider resistance and the 4th divider resistance of series connection, the anode of the 3rd divider resistance connects the output of described second operational amplifier, the negative terminal of the 3rd divider resistance and the anode of the 4th divider resistance connect, the negativing ending grounding of the 4th divider resistance, the differential output signal in secondary signal source is exported by the negative terminal of the 3rd divider resistance after the 3rd divider resistance and the 4th divider resistance dividing potential drop.
4. solar battery array maximal power tracing hardware circuit as claimed in claim 3, it is characterized in that, described energy storing of switch module comprises the first energy storing of switch circuit and second switch accumulator, first energy storing of switch circuit is consistent with the circuit structure of second switch accumulator, the input of the first energy storing of switch circuit connects the output of the first bleeder circuit, and the input of second switch accumulator connects the output of the second bleeder circuit；
The first described energy storing of switch circuit comprises the first switching device and the first storage capacitor, the input of the first switching device connects the negative terminal of the first divider resistance in the first bleeder circuit, the output of the first switching device connects the anode of the first storage capacitor, the control end of the first switching device connects logic and selects module, the negativing ending grounding of the first storage capacitor；
Described second switch accumulator comprises second switch device and the second storage capacitor, the input of second switch device connects the negative terminal of the 3rd divider resistance in the second bleeder circuit, the output of second switch device connects the anode of the second storage capacitor, the control end of second switch device connects logic and selects module, the second storage capacitor negativing ending grounding.
5. solar battery array maximal power tracing hardware circuit as claimed in claim 4, it is characterised in that the first switching device and second switch device are low level conduction device.
6. solar battery array maximal power tracing hardware circuit as claimed in claim 5, it is characterised in that described voltage comparison module comprises the first voltage comparator and the second voltage comparator；
The electrode input end of the first described voltage comparator connects the output of the first switching device in the first energy storing of switch circuit, the negative input of the first voltage comparator connects the output of the first operational amplifier in the first difference channel, the signal of the positive-negative input end of the first voltage comparator differs from a switch periods on a timeline, and due to division module and the existence of energy storing of switch module, the positive-negative input end of the first voltage comparator numerically has a dynamic change procedure, and the output of the first voltage comparator exports the comparison signal of its positive-negative input end；
The electrode input end of the second described voltage comparator connects the output of second switch device in second switch accumulator, the negative input of the second voltage comparator connects the output of the second operational amplifier in the second difference channel, the signal of the positive-negative input end of the second voltage comparator differs from a switch periods on a timeline, and due to division module and the existence of energy storing of switch module, the positive-negative input end of the second voltage comparator numerically has a dynamic change procedure, and the output of the second voltage comparator exports the comparison signal of its positive-negative input end.
7. solar battery array maximal power tracing hardware circuit as claimed in claim 6, it is characterized in that, described set-reset module comprises tertiary voltage comparator, the 4th voltage comparator, the first isolating diode and the second isolating diode, and set-reset module carries out set-reset to system when system is opened or time abnormal；
The electrode input end of described tertiary voltage comparator connects the first reference signal, negative input connects the MPPT control signal of filtration module output, output connects the anode of the first isolating diode, the negative terminal of the first isolating diode connects logic and selects module, reset signal is exported and selects module to logic；
The electrode input end of the 4th described voltage comparator connects the MPPT control signal of filtration module output, negative input connects the second reference signal, output connects the anode of the second isolating diode, the negative terminal of the second isolating diode connects logic and selects module, is exported by set signal and selects module to logic.
8. solar battery array maximal power tracing hardware circuit as claimed in claim 7, it is characterised in that described logic selects module to comprise the first NAND gate, the second NAND gate, the 3rd NAND gate and the 4th NAND gate；
Two inputs of the first described NAND gate connect the negative terminal of the first isolating diode in the output of the first voltage comparator in voltage comparison module and set-reset module respectively, and the output of the first NAND gate connects the input of the 3rd NAND gate；
Two inputs of the second described NAND gate connect the negative terminal of the second isolating diode in the output of the second voltage comparator in voltage comparison module and set-reset module respectively, and the output of the second NAND gate connects the input of the 4th NAND gate；
The output of the 3rd described NAND gate connects another input of the 4th NAND gate, the output of the 4th described NAND gate connects another input of the 3rd NAND gate, the control end of second switch device in the output connecting valve energy-storage module of the 3rd NAND gate, control its turn-on and turn-off, the control end of the first switching device in the output connecting valve energy-storage module of the 4th NAND gate, control its turn-on and turn-off, form the first signal source and the staggered selection of secondary signal source signal control access；
Described the first NAND gate, the second NAND gate, the 3rd NAND gate, the 4th NAND gate are two input nand gate devices.
9. solar battery array maximal power tracing hardware circuit as claimed in claim 8, it is characterised in that described filtration module comprises filter resistance, filter capacitor and the 3rd operational amplifier；
The input of described filter resistance connects logic and selects the output of the 3rd NAND gate in module, the output of filter resistance connects the anode of filter capacitor, the negativing ending grounding of filter capacitor, the combinational circuit of filter resistance and filter capacitor achieves the high-frequency signal to the 3rd NAND gate output and is filtered as low frequency signal, i.e. MPPT control signal；
The output of filter resistance is simultaneously connected with the electrode input end of the 3rd operational amplifier, the output of the 3rd operational amplifier connects the negative input of the 3rd operational amplifier, constitute feedback circuit, the output output MPPT control signal of the 3rd operational amplifier, forming the isolation of MPPT control signal and follow output, the output of the 3rd operational amplifier connects tertiary voltage comparator negative input and the electrode input end of the 4th voltage comparator in set-reset module respectively simultaneously.
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| CN201610251206.0A CN105867515A (en) | 2016-04-21 | 2016-04-21 | Solar cell array maximum power tracking hardware circuit |
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| CN201610251206.0A CN105867515A (en) | 2016-04-21 | 2016-04-21 | Solar cell array maximum power tracking hardware circuit |
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