CN105717966A - Reference voltage generating circuit and method, and integrated circuit - Google Patents

Abstract

The invention discloses a reference voltage generating circuit. The reference voltage generating circuit receives a constant input voltage, and comprises an operational amplifier output circuit and a voltage adjustment circuit, wherein the voltage adjustment circuit adjusts the input voltage of a first input end of the operational amplifier output circuit; the operational amplifier output circuit outputs a constant voltage according to the adjusted input voltage of the first input end and the input voltage of a second input end of the operational amplifier output circuit. The invention further discloses an integrated circuit and a reference voltage generating method.

Description

Reference voltage generating circuit, method and integrated circuit

Technical field

The present invention relates to reference voltage techniques, particularly relate to a kind of reference voltage generating circuit, method and integrated circuit.

Background technology

Reference voltage generating circuit, it is also possible to be called generating circuit from reference voltage, it is common that refer to be used as in circuit the voltage source of the high stability of reference voltage.Along with the continuous increase of footprint, the development of the especially system integration (SOC) technology, reference voltage generating circuit also becomes on a large scale, indispensable basic circuit module in super large-scale integration and nearly all digital simulator system.

Precision measuring instrument instruments and meters and wide variety of digital communication system are all often used as systematic survey and school reference of reference reference voltage.Therefore, reference voltage generating circuit occupies critically important status in Analogous Integrated Electronic Circuits, and it directly affects performance and the precision of electronic system.

Desirable reference voltage generating circuit should not be subject to the impact of power supply and temperature, is provided that stable voltage in circuit, and " benchmark " this term is just illustrating that the numerical value of reference voltage source should have higher precision and stability than general power supply.

Summary of the invention

The embodiment of the present invention provides a kind of reference voltage generating circuit, method and integrated circuit.

Embodiments providing a kind of reference voltage generating circuit, described reference voltage generating circuit is configured to receive constant input voltage, and described reference voltage generating circuit includes: operational amplifier output circuit and voltage-regulating circuit；Wherein,

Described voltage-regulating circuit, is configured to adjust the input voltage of the first input end of described operational amplifier output circuit；

Described operational amplifier output circuit, is configured to the input voltage of the second input of the input voltage according to the first input end after adjusting and described operational amplifier output circuit, exports constant voltage.

The embodiment of the present invention additionally provides a kind of integrated circuit, described integrated circuit includes reference voltage generating circuit, described reference voltage generating circuit is configured to receive constant input voltage, and described reference voltage generating circuit includes: operational amplifier output circuit and voltage-regulating circuit；Wherein,

Described voltage-regulating circuit, is configured to adjust the input voltage of the first input end of described operational amplifier output circuit；

Described operational amplifier output circuit, is configured to the input voltage of the second input of the input voltage according to the first input end after adjusting and described operational amplifier output circuit, exports constant voltage.

The embodiment of the present invention provides again a kind of method of generating reference voltage, and reference voltage generating circuit receives constant input voltage；Described method also includes:

The voltage-regulating circuit of described reference voltage generating circuit adjusts the input voltage of the operational amplifier output circuit first input end of described reference voltage generating circuit；

The described operational amplifier output circuit input voltage according to the input voltage of first input end after adjusting and the second input, exports constant voltage.

The embodiment of the present invention additionally provides a kind of method of generating reference voltage, including:

Reference voltage generating circuit receives constant input voltage；

The voltage that the output of described reference voltage generating circuit is constant；Wherein,

Output voltage values is determined by described input voltage completely.

Reference voltage generating circuit, method and the integrated circuit that the embodiment of the present invention provides, reference voltage generating circuit receives constant input voltage, voltage-regulating circuit adjusts the input voltage of the first input end of operational amplifier output circuit, the operational amplifier output circuit input voltage according to the input voltage of first input end after adjusting and the second input of operational amplifier output circuit, exports constant voltage；So, it is possible to improve degree of stability and the precision of the reference voltage that reference voltage generating circuit produces, eliminate process deviation or the temperature impact on reference voltage.

Accompanying drawing explanation

Fig. 1 is a kind of reference voltage generating circuit structural representation；

Fig. 2 is the first reference voltage generating circuit structural representation of the embodiment of the present invention；

Fig. 3 is embodiment of the present invention the second reference voltage generating circuit structural representation；

Fig. 4 is the embodiment of the present invention one reference voltage generating circuit structural representation；

Fig. 5 is the embodiment of the present invention two reference voltage generating circuit structural representation；

Fig. 6 is the embodiment of the present invention three reference voltage generating circuit structural representation；

Fig. 7 is the embodiment of the present invention four reference voltage generating circuit structural representation；

Fig. 8 is the embodiment of the present invention five reference voltage generating circuit structural representation；

Fig. 9 is the embodiment of the present invention six reference voltage generating circuit structural representation；

Figure 10 A is the embodiment of the present invention the first DC level switching circuit structural representation；

Figure 10 B is the embodiment of the present invention the second DC level switching circuit structural representation；

Figure 11 A is the bucking voltage adopting the reference voltage generating circuit shown in Fig. 1 variation diagram with sampling number；

Figure 11 B is the bucking voltage variation diagram with sampling number of the reference voltage generating circuit adopting the embodiment of the present invention one.

Detailed description of the invention

Fig. 1 is a kind of reference voltage generating circuit schematic diagram, and by the impact of circuitry process technology and temperature, the reference voltage that this reference voltage generating circuit produces not is a constant magnitude of voltage, but the magnitude of voltage that a change is very big.The inconstant analysis of causes of reference voltage produced is as follows:

In the reference voltage generating circuit shown in Fig. 1, the V of the first P-channel metal-oxide-semiconductor field effect transistor (PMOS) MP1 and the 2nd PMOSMP2_gsIdentical, the V of the first audion Q1 and the second audion Q2_beIdentical, the resistance ratio of the first resistance R1 and the second resistance R2 is 1: N；Wherein, V_gsRepresent the gate source voltage of PMOS, V_beRepresenting the voltage between base stage and the emitter stage of audion, N is generally positive integer.Describing in order to convenient, the voltage of the input connected by the 2nd PMOSMP2 grid is called V_in, the voltage of the first audion Q1 and the first resistance R1 junction point formed is called V₂, the voltage of operational amplifier A 0 in-phase input end is called V_IP, the voltage of operational amplifier A 0 inverting input is called V_IN, the voltage that operational amplifier A 0 exports is called V_ref。

In the reference voltage generating circuit shown in Fig. 1, there is following relation:

V₂=V_gs-V_be=Δ V (1)

V_IP=V_IN(2)

V_IP=V_in+(V_gs-V_be)(3)

V_ref-V_IN=N (V_IN-V₂)(4)

Formula (1) is merged to formula (4), replaces, then can obtain:

V_ref=(N+1) V_in+ Δ V=(N+1) V_in+(V_gs-V_be)(5)

Work as V_inWhen=0, then have:

V_ref=V_gs-V_be(6)

From formula (6) it can be seen that operational amplifier A 0 output voltage V_refIt is and V_gsAnd V_beClosely-related, particularly: work as V_inWhen=0, V_ref=V_gs-V_be, the voltage V of operational amplifier A 0 output_refIt is entirely by V_gsAnd V_beDetermined.In the ideal case, V_refShould be a constant value, but, by the impact of circuitry process technology and temperature, V_gsAnd V_beValue can change, and V_gsWith V_beVariation tendency inconsistent, so, resulted in V_refIt not a constant value, but the value that a meeting changes, this will be substantially reduced reference voltage V_refDegree of stability and precision.Wherein, V_gsWith V_beVariation tendency inconsistent refer to: V_gsWith V_beVariable quantity at synchronization differs, and gives an example, it is assumed that with the V in the first moment_gsV is calculated for benchmark_gsAt the variable quantity in other moment, with the V in the first moment_beV is calculated for benchmark_beAt the variable quantity in other moment, and assume V_gsVariable quantity in the second moment is Δ 1, V_beVariable quantity in the second moment is Δ 2, then have Δ 1 to be not equal to Δ 2, so, according to formula (6), then cause the V in the first moment_refV with the second moment_refDiffer；Here, Δ 1 can be positive number, it is possible to be negative, it is also possible to be zero；Correspondingly, Δ 2 can be positive number, it is possible to be negative, it is also possible to be zero.

Based on this, in the following various embodiments of the present invention: when the input voltage of reference voltage generating circuit is constant, the voltages keep constant of operational amplifier output circuit output, output voltage values is determined by described input voltage completely.

Below in conjunction with drawings and the specific embodiments, the present invention is described in further detail.

It should be noted that used herein first, second ... only representing the element of diverse location, parameter or function to element are not defined.

The reference voltage generating circuit that the embodiment of the present invention provides, receives constant input voltage；As in figure 2 it is shown, this reference voltage generating circuit includes: voltage-regulating circuit 21 and operational amplifier output circuit 22；Wherein,

Voltage-regulating circuit 21 keeps the voltage constant that operational amplifier output circuit 22 exports.

Here, when practical application, the voltage constant of described maintenance operational amplifier output circuit 22 output refers to: during practical application, in circuit design, and the change of the voltage of operational amplifier output circuit 22 output is in the scope allowing change.Wherein, refer in the described scope allowing change: the excursion of the voltage of operational amplifier output circuit 22 output meets instructions for use.

Specifically, voltage-regulating circuit 21 adjusts the input voltage of the first input end of operational amplifier output circuit 22, the operational amplifier output circuit 22 input voltage according to the input voltage of first input end after adjusting and the second input of operational amplifier output circuit 22, exports constant voltage.

In one embodiment, as it is shown on figure 3, this reference voltage generating circuit also includes: the first DC level conversion (DCshift) circuit 31 and the second DC level switching circuit 32；Wherein,

In the process of operational amplifier output circuit 22 output voltage, first DC level switching circuit 31 exports the first input end of operational amplifier output circuit 22 after the voltage of input self is carried out the first displacement, second DC level switching circuit 32 exports the second input of operational amplifier output circuit 22 after the voltage of input self is carried out the second displacement, so that the transistor of the first operational amplifier output stage in operational amplifier output circuit 22 is operated in inelastic region, to ensure the fidelity of output signal；When operational amplifier output circuit 22 output voltage, and in the first input end correspondence operational amplifier output circuit 22 of operational amplifier output circuit 22 during the in-phase input end of the first operational amplifier, voltage-regulating circuit 21 adjusts the input voltage of the first DC level switching circuit 31, thus have adjusted the input voltage of the first input end of operational amplifier output circuit 22, the operational amplifier output circuit 22 input voltage according to the input voltage of first input end after adjusting and the second input, exports constant voltage.Here, during practical application, the first displacement can be equal to the second displacement, and the first displacement can also be not equal to the second displacement.

By adjusting the input voltage of the first DC level switching circuit 31, specifically, the input voltage of the first input end of operational amplifier output circuit 22 is carried out dividing potential drop by voltage-regulating circuit 21, and Voltage Feedback dividing potential drop obtained gives the first DC level switching circuit 31, eliminate process deviation and the temperature impact on operational amplifier output circuit 22 output voltage of device in the first DC level switching circuit 31 and the second DC level switching circuit 32, so that the voltages keep constant of operational amplifier output circuit 22 output.

Here, in described elimination the first DC level switching circuit 31 process deviation of components and parts and temperature on the impact of the input voltage of described first input end mainly in the first DC level switching circuit 31 field effect transistor and audion be subject to process deviation and when temperature affects, make the change of the bias voltage of field effect transistor and audion in the first DC level switching circuit 31 no longer affect the input voltage of the first input end of operational amplifier output circuit 22, and then no longer affect reference voltage.

In one embodiment, when operational amplifier output circuit 22 output voltage, and in the first input end correspondence operational amplifier output circuit 22 of operational amplifier output circuit 22 during the inverting input of the first operational amplifier, the input voltage of the first input end of operational amplifier output circuit 22 is carried out dividing potential drop by voltage-regulating circuit 21, thus the process deviation of the device eliminated in the first DC level switching circuit 31 and the second DC level switching circuit 32 and the temperature impact on operational amplifier output circuit 22 output voltage, so that the voltages keep constant of operational amplifier output circuit 22 output.

Embodiment one

In the present embodiment, as shown in Figure 4, the first DC level switching circuit 31 may include that a PMOSMP1 and the first audion Q1；Second DC level switching circuit 32 may include that the 2nd PMOSMP2 and the second audion Q2；Voltage-regulating circuit 21 may include that the 3rd resistance R3 and the 4th resistance R4, and the resistance ratio of the 3rd resistance R3 and the four resistance R4 is: N: 1；Operational amplifier output circuit 22 may include that the first resistance R1, the second resistance R2 and the first operational amplifier A 0, and the resistance ratio of the first resistance R1 and the second resistance R2 is: 1: N.

In the reference voltage generating circuit shown in Fig. 4, the V of PMOSMP1 and the two PMOSMP2_gsIdentical, the V of the first audion Q1 and the second audion Q2_beIdentical, during practical application, the first audion Q1 and the second audion Q2 can be all NPN type triode.Wherein, V_gsRepresent the gate source voltage of PMOS, V_beRepresenting the voltage between base stage and the emitter stage of audion, N is generally positive integer.

The operation principle of the reference voltage generating circuit shown in Fig. 4 is:

Describe in order to convenient, in the following description, the input voltage of reference voltage generating circuit is called V_RGin, the input voltage of the first DC level switching circuit 31 is called V_1in, the output voltage of the first DC level switching circuit 31 is called V_1o, the input voltage of the second DC level switching circuit 32 is called V_2in, the output voltage of the second DC level switching circuit 32 is called V_2o, the voltage of a junction point PMOSMP1, the 3rd resistance R3 and the 4th resistance R4 formed is called V₁, the voltage of the junction point the first audion Q1, the 3rd resistance R3 and the first resistance R1 formed is called V₂, the voltage of the first operational amplifier A 0 in-phase input end is called V_IP, the voltage of the first operational amplifier A 0 inverting input is called V_IN, the voltage that the first operational amplifier A 0 exports is called V_ref。

When reference voltage generating circuit works, then there is following relation:

V_1o=V_1in+V_gs-V_be(7)

V_1in=V₁(8)

V_1o=V₂(9)

V₂=(N+1) V₁(10)

Δ V=V_gs-V_be(11)

Merged by formula (7) to formula (11), replacement etc. operates, then can obtain:

$V_2=(1+\frac{1}{N})\mathrm{\ΔV}---\left(12\right)$

Further, the reference voltage generating circuit shown in Fig. 4 there is also following relation:

V_ref=(N+1) V_IN-NV₂(13)

V_IP=V_IN(14)

V_IP=V_2o(15)

V_2o=V_2in+V_gs-V_be(16)

V_2in=V_RGin(17)

Merged by formula (11) to formula (17), replacement etc. operates, then can obtain:

$V_{\mathrm{ref}}=(N+1)V_{\mathrm{RGin}}+(N+1)\mathrm{\ΔV}-N(1+\frac{1}{N})\mathrm{\ΔV}$

V_ref=(N+1) V_RGin(18)

From formula (18) it can be seen that first operational amplifier A 0 output voltage V_refSize, namely operational amplifier output circuit 22 output voltage swing, with the input voltage V of reference voltage generating circuit_RGinAnd the size of N is relevant；When circuit is determined, the voltage swing of operational amplifier output circuit 22 output, only with the input voltage V of reference voltage generating circuit_RGinSize be correlated with, and with the gate source voltage of a PMOSMP1 and the 2nd PMOSMP2, voltage between base stage and the emitter stage of the first audion Q1 and the second audion Q2 is unrelated, in other words, by adjusting the input voltage of the first DC level switching circuit 31, eliminate device parameters and the transistor parameter impact on operational amplifier output circuit 22 output voltage of the first DC level switching circuit 31 and the second DC level switching circuit 32, that is: the impact on operational amplifier output circuit 22 output voltage of circuitry process technology and temperature is eliminated, when circuit is determined, the output voltage making operational amplifier output circuit 22 is only relevant to the input voltage of reference voltage generating circuit, so that the output voltage of operational amplifier output circuit 22 keeps constant；Further, as the input voltage V of reference voltage generating circuit_RGinWhen being zero, the output voltage V of operational amplifier output circuit 22_refAlso it is zero.

Embodiment two

In the present embodiment, as it is shown in figure 5, the first DC level switching circuit 31 may include that a PMOSMP1 and the first audion Q1；Second DC level switching circuit 32 may include that the 2nd PMOSMP2 and the second audion Q2；Voltage-regulating circuit 21 may include that the 3rd resistance R3, the 4th resistance R4 and the first reference current source I1, and the resistance ratio of the 3rd resistance R3 and the four resistance R4 is: N: 1；Operational amplifier output circuit 22 may include that the first resistance R1, the second resistance R2 and the first operational amplifier A 0, and the resistance ratio of the first resistance R1 and the second resistance R2 is: 1: N.

In the reference voltage generating circuit shown in Fig. 5, the V of PMOSMP1 and the two PMOSMP2_gsIdentical, the V of the first audion Q1 and the second audion Q2_beIdentical, during practical application, the first audion Q1 and the second audion Q2 can be all NPN type triode.Wherein, V_gsRepresent the gate source voltage of PMOS, V_beRepresenting the voltage between base stage and the emitter stage of audion, N is generally positive integer.

The operation principle of the reference voltage generating circuit shown in Fig. 5 is:

Describe in order to convenient, in the following description, the input voltage of reference voltage generating circuit is called V_RGin, the input voltage of the first DC level switching circuit 31 is called V_1in, the output voltage of the first DC level switching circuit 31 is called V_1o, the input voltage of the second DC level switching circuit 32 is called V_2in, the output voltage of the second DC level switching circuit 32 is called V_2o, the voltage of a junction point PMOSMP1, the 3rd resistance R3 and the 4th resistance R4 formed is called V₁, the voltage of the junction point the first audion Q1, the 3rd resistance R3 and the first resistance R1 formed is called V₂, the electric current of the first reference current source is called I₁, the resistance of the 4th resistance R4 is R, and the voltage of the first operational amplifier A 0 in-phase input end is called V_IP, the voltage of the first operational amplifier A 0 inverting input is called V_IN, the voltage that the first operational amplifier A 0 exports is called V_ref。

When reference voltage generating circuit works, then there is following relation:

V_1o=V_1in+V_gs-V_be(7)

V_1in=V₁(8)

V_1o=V₂(9)

Δ V=V_gs-V_be(11)

V₂=(N+1) V₁+NI₁R(19)

Formula (7) to formula (9), formula (11) and formula (19) are merged, replacement etc. operates, then can obtain:

$V_2=(1+\frac{1}{N})\mathrm{\ΔV}-I_{1}R---\left(20\right)$

Further, the reference voltage generating circuit shown in Fig. 5 there is also following relation:

V_ref=(N+1) V_IN-NV₂(13)

V_IP=V_IN(14)

V_IP=V_2o(15)

V_2o=V_2in+V_gs-V_be(16)

V_2in=V_RGin(17)

Formula (11), formula (13) to formula (17) and formula (20) are merged, the operation such as replacement, then can obtain:

$V_{\mathrm{ref}}=(N+1)V_{\mathrm{RGin}}+(N+1)\mathrm{\ΔV}-N(1+\frac{1}{N})\mathrm{\ΔV}+{\mathrm{NI}}_{1}R$

V_ref=(N+1) V_RGin+NI₁R(21)

From formula (21) it can be seen that first operational amplifier A 0 output voltage V_refSize, namely operational amplifier output circuit 22 output voltage swing, with the input voltage V of reference voltage generating circuit_RGin, the first reference current source electric current I₁, the 4th resistance R4 resistance R and N size be correlated with；When circuit is determined, the voltage swing of operational amplifier output circuit 22 output, only with input voltage V_RGinSize, the first reference current source electric current I₁And the 4th resistance R4 resistance R be correlated with, and with the gate source voltage of a PMOSMP1 and the 2nd PMOSMP2, voltage between base stage and the emitter stage of the first audion Q1 and the second audion Q2 is unrelated, in other words, by adjusting the input voltage of the first DC level switching circuit 31, eliminate device parameters and the transistor parameter impact on operational amplifier output circuit 22 output voltage of the first DC level switching circuit 31 and the second DC level switching circuit 32, that is: the impact on operational amplifier output circuit 22 output voltage of circuitry process technology and temperature is eliminated, when circuit is determined, make the output voltage of operational amplifier output circuit 22 and the input voltage of reference voltage generating circuit, the electric current of the first reference current source I1 and the resistance of the 4th resistance R4 are correlated with, so that the output voltage of operational amplifier output circuit 22 keeps constant；Further, as the input voltage V of reference voltage generating circuit_RGinWhen being zero, the output voltage V of operational amplifier output circuit 22_refFor NI₁R, in this manner it is possible to according to needing, by adjusting the electric current of the first reference current source I1 between the input and the ground that are connected to the first DC level switching circuit 31, obtaining the size of the output voltage needed accurately, thus meeting user's request, promoting Consumer's Experience.

Embodiment three

In the present embodiment, as shown in Figure 6, the first DC level switching circuit 31 may include that a PMOSMP1 and the first audion Q1；Second DC level switching circuit 32 may include that the 2nd PMOSMP2 and the second audion Q2；Voltage-regulating circuit 21 may include that the 3rd resistance R3, the 4th resistance R4 and the second reference current source I2, and the resistance ratio of the 3rd resistance R3 and the four resistance R4 is: N: 1；Operational amplifier output circuit 22 may include that the first resistance R1, the second resistance R2 and the first operational amplifier A 0, and the resistance ratio of the first resistance R1 and the second resistance R2 is: 1: N.

In the reference voltage generating circuit shown in Fig. 6, the V of PMOSMP1 and the two PMOSMP2_gsIdentical, the V of the first audion Q1 and the second audion Q2_beIdentical, during practical application, the first audion Q1 and the second audion Q2 can be all NPN type triode.Wherein, V_gsRepresent the gate source voltage of PMOS, V_beRepresenting the voltage between base stage and the emitter stage of audion, N is generally positive integer.

The operation principle of the reference voltage generating circuit shown in Fig. 6 is:

Describe in order to convenient, in the following description, the input voltage of reference voltage generating circuit is called V_RGin, the input voltage of the first DC level switching circuit 31 is called V_1in, the output voltage of the first DC level switching circuit 31 is called V_1o, the input voltage of the second DC level switching circuit 32 is called V_2in, the output voltage of the second DC level switching circuit 32 is called V_2o, the voltage of a junction point PMOSMP1, the 3rd resistance R3 and the 4th resistance R4 formed is called V₁, the voltage of the junction point the first audion Q1, the 3rd resistance R3 and the first resistance R1 formed is called V₂, the electric current of the second reference current source is called I₂, the resistance of the 4th resistance R4 is R, and the voltage of the first operational amplifier A 0 in-phase input end is called V_IP, the voltage of the first operational amplifier A 0 inverting input is called V_IN, the voltage that the first operational amplifier A 0 exports is called V_ref。

When reference voltage generating circuit works, then there is following relation:

V_1o=V_1in+V_gs-V_be(7)

V_1in=V₁(8)

V_1o=V₂(9)

Δ V=V_gs-V_be(11)

V₂=(N+1) V₁-NI₂R(22)

Formula (7) to formula (9), formula (11) and formula (22) are merged, replacement etc. operates, then can obtain:

$V_2=(1+\frac{1}{N})\mathrm{\ΔV}+I_{2}R---\left(23\right)$

Further, the reference voltage generating circuit shown in Fig. 6 there is also following relation:

V_ref=(N+1) V_IN-NV₂(13)

V_IP=V_IN(14)

V_IP=V_2o(15)

V_2o=V_2in+V_gs-V_be(16)

V_2in=V_RGin(17)

Formula (11), formula (13) to formula (17) and formula (23) are merged, the operation such as replacement, then can obtain:

$V_{\mathrm{ref}}=(N+1)V_{\mathrm{RGin}}+(N+1)\mathrm{\ΔV}-N(1+\frac{1}{N})\mathrm{\ΔV}-{\mathrm{NI}}_{2}R$

V_ref=(N+1) V_RGin-NI₂R(24)

From formula (24) it can be seen that first operational amplifier A 0 output voltage V_refSize, namely operational amplifier output circuit 22 output voltage swing, with the input voltage V of reference voltage generating circuit_RGin, the second reference current source electric current I₂, the 4th resistance R4 resistance R and N size be correlated with；When circuit is determined, the voltage swing of operational amplifier output circuit 22 output, only with input voltage V_RGinSize, the second reference current source electric current I₂And the 4th resistance R4 resistance R be correlated with, and with the gate source voltage of a PMOSMP1 and the 2nd PMOSMP2, voltage between base stage and the emitter stage of the first audion Q1 and the second audion Q2 is unrelated, in other words, by adjusting the input voltage of the first DC level switching circuit 31, eliminate device parameters and the transistor parameter impact on operational amplifier output circuit 22 output voltage of the first DC level switching circuit 31 and the second DC level switching circuit 32, that is: the impact on operational amplifier output circuit 22 output voltage of circuitry process technology and temperature is eliminated, when circuit is determined, make the output voltage of operational amplifier output circuit 22 and the input voltage of reference voltage generating circuit, the electric current of the second reference current source I2 and the resistance of the 4th resistance R4 are correlated with, so that the output voltage of operational amplifier output circuit 22 keeps constant；Further, as the input voltage V of reference voltage generating circuit_RGinWhen being zero, the output voltage V of operational amplifier output circuit 22_refFor-NI₂R, in this manner it is possible to according to needing, by adjusting the electric current of the second reference current source I2 between the input and the power supply that are connected to the first DC level switching circuit 31, obtaining the size of the output voltage needed accurately, thus meeting user's request, promoting Consumer's Experience.

It should be understood that the reference voltage generating circuit of the reference voltage generating circuit of embodiment two and embodiment three is different in that: adopt the reference voltage generating circuit of embodiment two, the reference voltage of the input voltage more than N+1 times can be obtained, adopt the reference voltage generating circuit of embodiment three, then can yield less than the reference voltage of the input voltage of N+1 times.When practical application, user can as desired to determine the reference voltage generating circuit of reference voltage generating circuit or the embodiment three adopting embodiment two.

In embodiment one to embodiment three, the second displacement that the voltage of input self is carried out by the first displacement that the voltage of input self is carried out by the first DC level switching circuit 31 equal to the second DC level switching circuit 32.

Embodiment four

In the present embodiment, as it is shown in fig. 7, the first DC level switching circuit 31 may include that a PMOSMP1 and the first audion Q1；Second DC level switching circuit 32 may include that the 2nd PMOSMP2 and the second audion Q2；Voltage-regulating circuit 21 may include that the 3rd resistance R3 and the 4th resistance R4, and the resistance ratio of the 3rd resistance R3 and the four resistance R4 is: A: 1；Operational amplifier output circuit 22 may include that the first resistance R1, the second resistance R2 and the first operational amplifier A 0, and the resistance ratio of the first resistance R1 and the second resistance R2 is: 1: N.

Here, during practical application, A, N are generally positive integer.

The operation principle of the reference voltage generating circuit shown in Fig. 7 is:

Describe in order to convenient, in the following description, the input voltage of reference voltage generating circuit is called V_RGin, the input voltage of the first DC level switching circuit 31 is called V_1in, the output voltage of the first DC level switching circuit 31 is called V_1o, the first displacement of the first DC level switching circuit 31 is called Δ V₁, the input voltage of the second DC level switching circuit 32 is called V_2in, the output voltage of the second DC level switching circuit 32 is called V_2o, the second displacement of the second DC level switching circuit 32 is called Δ V₂, the voltage of a junction point PMOSMP1, the 3rd resistance R3 and the 4th resistance R4 formed is called V₁, the voltage of the junction point the first audion Q1, the 3rd resistance R3 and the first resistance R1 formed is called V₂, the voltage of the first operational amplifier A 0 in-phase input end is called V_IP, the voltage of the first operational amplifier A 0 inverting input is called V_IN, the voltage that the first operational amplifier A 0 exports is called V_ref。

When reference voltage generating circuit works, then there is following relation:

V_1o=V_1in+ΔV₁(25)

V_1in=V₁(8)

V_1o=V₂(9)

V₂=(A+1) V₁(26)

Merged by these formula above-mentioned, replacement etc. operates, then can obtain:

$V_2=(1+\frac{1}{A}){\mathrm{\ΔV}}_1---\left(27\right)$

Further, the reference voltage generating circuit shown in Fig. 7 there is also following relation:

V_ref=(N+1) V_IN-NV₂(13)

V_IP=V_IN(14)

V_IP=V_2o(15)

V_2o=V_2in+ΔV₂(28)

V_2in=V_RGin(17)

Formula (11) to formula (15), formula (27) and formula (28) are merged, replacement etc. operates, then can obtain:

$V_{\mathrm{ref}}=(N+1)V_{\mathrm{RGin}}+(N+1){\mathrm{\ΔV}}_2-N(1+\frac{1}{A}){\mathrm{\ΔV}}_1---\left(29\right)$

From formula (29) it can be seen that work as the voltage V of the first operational amplifier A 0 output_refSize, namely operational amplifier output circuit 22 output voltage constant time, say, that when first operational amplifier A 0 output voltage V_refSize, with the input voltage V of reference voltage generating circuit_RGin, N and A size be correlated with；When circuit is determined, the voltage swing of operational amplifier output circuit 22 output, only with the input voltage V of reference voltage generating circuit_RGinSize be correlated with, and time unrelated with the voltage between base stage and the emitter stage of a PMOSMP1 and the gate source voltage of the 2nd PMOSMP2, the first audion Q1 and the second audion Q2, then have only to meet?；It is to say, when circuit is determined, and Δ V₁≠ΔV₂Time, as long as meetingThe voltage V of the first operational amplifier A 0 output can be realized_refSize, only with the input voltage V of reference voltage generating circuit_RGinSize be correlated with.

Need exist for illustrating: the structure of the reference voltage generating circuit that the present embodiment provides is identical with the structure of the reference voltage generating circuit that embodiment one provides, institute the difference is that: in the present embodiment, first displacement is not equal to the second displacement, and the resistance ratio of the 3rd resistance R3 and the four resistance R4 is: A: 1；And in embodiment one, the first displacement is equal to the second displacement, the resistance ratio of the 3rd resistance R3 and the four resistance R4 is: 1: N.

Embodiment five

In the present embodiment, as shown in Figure 8, the first DC level switching circuit 31 may include that a PMOSMP1 and the first audion Q1；Second DC level switching circuit 32 may include that the 2nd PMOSMP2 and the second audion Q2；Voltage-regulating circuit 21 may include that the 3rd resistance R3 and the 4th resistance R4, and the resistance ratio of the 3rd resistance R3 and the four resistance R4 is: 1: N；Operational amplifier output circuit 22 may include that the first resistance R1, the second resistance R2 and the first operational amplifier A 0, and the resistance ratio of the first resistance R1 and the second resistance R2 is: 1: N.

In the reference voltage generating circuit shown in Fig. 8, the V of PMOSMP1 and the two PMOSMP2_gsIdentical, the V of the first audion Q1 and the second audion Q2_beIdentical, during practical application, the first audion Q1 and the second audion Q2 can be all NPN type triode.Wherein, V_gsRepresent the gate source voltage of PMOS, V_beRepresenting the voltage between base stage and the emitter stage of audion, N is generally positive integer.

The operation principle of the reference voltage generating circuit shown in Fig. 8 is:

Describe in order to convenient, in the following description, the first input voltage of reference voltage generating circuit is called V_1RGin, the second input voltage of reference voltage generating circuit is called V_2RGin, the input voltage of the first DC level switching circuit 31 is called V_1in, the output voltage of the first DC level switching circuit 31 is called V_1o, the input voltage of the second DC level switching circuit 32 is called V_2in, the output voltage of the second DC level switching circuit 32 is called V_2o, the voltage of the junction point the 3rd resistance R3, the 4th resistance R4 and the first operational amplifier A 0 in-phase input end formed is called V₁, the voltage of the first operational amplifier A 0 in-phase input end is called V_IP, the voltage of the first operational amplifier A 0 inverting input is called V_IN, the voltage that the first operational amplifier A 0 exports is called V_ref。

When reference voltage generating circuit works, then there is following relation:

V_1o=V_1in+V_gs-V_be(7)

V_1in=V_1RGin(30)

$V_{1o}=(1+\frac{1}{N})V_1---\left(31\right)$

Δ V=V_gs-V_be(11)

Formula (7), formula (11), formula (30) and formula (31) are merged, replacement etc. operates, then can obtain:

$V_1=\frac{N}{N+1}\mathrm{\ΔV}+\frac{N}{N+1}{V}_{1\mathrm{RGin}}---\left(32\right)$

Further, the reference voltage generating circuit shown in Fig. 8 there is also following relation:

V_ref=(N+1) V_IN-NV_2o(33)

V_IP=V_IN(14)

V_2o=V_2in+V_gs-V_be(16)

V_2in=V_2RGin(34)

V_IP=V₁(35)

Formula (11), formula (14), formula (16) and formula (32) to (35) are merged, replacement etc. operates, then can obtain:

$V_{\mathrm{ref}}=-N{V}_{2\mathrm{RGin}}+(N+1)\frac{N}{N+1}{V}_{1\mathrm{RGin}}+(N+1)\frac{N}{N+1}\mathrm{\ΔV}-\mathrm{N\ΔV}$

V_ref=-NV_2RGin+NV_1RGin(36)

From formula (36) it can be seen that first operational amplifier A 0 output voltage V_refSize, namely operational amplifier output circuit 22 output voltage swing, with the first input voltage V of quasi-voltage generation circuit_1RGin, the second input voltage V_2RGinAnd the size of N is relevant；When circuit is determined, the voltage swing of operational amplifier output circuit 22 output, only with the first input voltage V of reference voltage generating circuit_1RGinAnd the second input voltage V_2RGinSize be correlated with, and with the gate source voltage of a PMOSMP1 and the 2nd PMOSMP2, voltage between base stage and the emitter stage of the first audion Q1 and the second audion Q2 is unrelated, in other words, by adjust the first operational amplifier A 0 in-phase input end input voltage, eliminate device parameters and the transistor parameter impact on operational amplifier output circuit 22 output voltage of the first DC level switching circuit 31 and the second DC level switching circuit 32, that is: the impact on operational amplifier output circuit 22 output voltage of circuitry process technology and temperature is eliminated, when circuit is determined, the output voltage making operational amplifier output circuit 22 is only relevant to the input voltage of reference voltage generating circuit, so that the output voltage of operational amplifier output circuit 22 keeps constant；Further, as the first input voltage V of reference voltage generating circuit_1RGinAnd the second input voltage V_2RGinWhen being zero, the output voltage V of operational amplifier output circuit 22_refAlso it is zero.

In the reference voltage generating circuit that the present embodiment provides, the second displacement that the voltage of input self is carried out by the first displacement that the voltage of input self is carried out by the first DC level switching circuit 31 equal to the second DC level switching circuit 32.

During practical application, the first displacement can also be without being equal to the second displacement, in this case, it is assumed that the first displacement by the first DC level switching circuit 31 is called Δ V₁, the input voltage of the second DC level switching circuit 32 is called V_2in, now, the resistance ratio of the 3rd resistance R3 and the four resistance R4 is: 1: A, then have:

$\begin{array}{c}{V}_{\mathrm{ref}}=(N+1)\×(\frac{A}{A+1}{\mathrm{\ΔV}}_1+\frac{A}{A+1}{V}_{1\mathrm{RGin}})-N\×(V_{2\mathrm{RGin}}+{\mathrm{\ΔV}}_2)\\ =-{\mathrm{NV}}_{2\mathrm{RGin}}+\frac{(N+1)A}{A+1}{V}_{1\mathrm{RGin}}+\frac{(N+1)A}{A+1}{\mathrm{\ΔV}}_1-\mathrm{N\Δ}{V}_2\end{array}---\left(37\right)$

From formula (37) it can be seen that work as the voltage V of the first operational amplifier A 0 output_refSize, namely operational amplifier output circuit 22 output voltage constant time, say, that when circuit is determined, and the first operational amplifier A 0 output voltage V_refSize only with the first input voltage V of reference voltage generating circuit_1RGinAnd the second input voltage V_2RGinSize be correlated with, and time unrelated with the voltage between base stage and the emitter stage of a PMOSMP1 and the gate source voltage of the 2nd PMOSMP2, the first audion Q1 and the second audion Q2, then have only to meet?；It is to say, as Δ V₁≠ΔV₂Time, as long as meetingThe voltage V of the first operational amplifier A 0 output can be realized_refSize, only with the first input voltage V of reference voltage generating circuit_1RGinAnd the second input voltage V_2RGinSize be correlated with.

Embodiment six

In the present embodiment, as it is shown in figure 9, the first DC level switching circuit 31 may include that a PMOSMP1 and the first audion Q1；Second DC level switching circuit 32 may include that the 2nd PMOSMP2 and the second audion Q2；Voltage-regulating circuit 21 may include that the 3rd resistance R3, the 4th resistance R4 and the 3rd reference current source I1, and the resistance ratio of the 3rd resistance R3 and the four resistance R4 is: 1: N；Operational amplifier output circuit 22 may include that the first resistance R1, the second resistance R2 and the first operational amplifier A 0, and the resistance ratio of the first resistance R1 and the second resistance R2 is: 1: N.

In the reference voltage generating circuit shown in Fig. 9, the V of PMOSMP1 and the two PMOSMP2_gsIdentical, the V of the first audion Q1 and the second audion Q2_beIdentical, during practical application, the first audion Q1 and the second audion Q2 can be all NPN type triode.Wherein, V_gsRepresent the gate source voltage of PMOS, V_beRepresenting the voltage between base stage and the emitter stage of audion, N is generally positive integer.

The operation principle of the reference voltage generating circuit shown in Fig. 9 is:

Describe in order to convenient, in the following description, the first input voltage of reference voltage generating circuit is called V_1RGin, the second input voltage of reference voltage generating circuit is called V_2RGin, the input voltage of the first DC level switching circuit 31 is called V_1in, the output voltage of the first DC level switching circuit 31 is called V_1o, the input voltage of the second DC level switching circuit 32 is called V_2in, the output voltage of the second DC level switching circuit 32 is called V_2o, the voltage of the junction point the 3rd resistance R3, the 4th resistance R4 and the first operational amplifier A 0 in-phase input end formed is called V₁, the resistance of the 3rd resistance R3 is R, and the electric current of the 3rd reference current source is called I₃, the voltage of the first operational amplifier A 0 in-phase input end is called V_IP, the voltage of the first operational amplifier A 0 inverting input is called V_IN, the voltage that the first operational amplifier A 0 exports is called V_ref。

When reference voltage generating circuit works, then there is following relation:

V_1o=V_1in+V_gs-V_be(7)

V_1in=V_1RGin(30)

$V_{1o}=(1+\frac{1}{N})V_1-I_{3}R---\left(38\right)$

Δ V=V_gs-V_be(11)

Formula (7), formula (11), formula (30) and formula (38) are merged, replacement etc. operates, then can obtain:

$V_1=\frac{N}{N+1}\mathrm{\ΔV}+\frac{N}{N+1}{V}_{1\mathrm{RGin}}+\frac{{\mathrm{NI}}_{3}R}{N+1}---\left(39\right)$

Further, the reference voltage generating circuit shown in Fig. 9 there is also following relation:

V_ref=(N+1) V_IN-NV_2o(33)

V_IP=V_IN(14)

V_2o=V_2in+V_gs-V_be(16)

V_2in=V_2RGin(34)

V_IP=V₁(35)

By operations such as formula (11), formula (14), formula (16), formula (33) to (35) and formula (39) merges, replacements, then can obtain:

$V_{\mathrm{ref}}=-{\mathrm{NV}}_{2\mathrm{RGin}}+(N+1)\frac{N}{N+1}{V}_{1\mathrm{RGin}}+(N+1)\frac{N}{N+1}\mathrm{\ΔV}-\mathrm{N\ΔV}+{\mathrm{NI}}_{3}R$

V_ref=-NV_2RGin+NV_1RGin+NI₃R(40)

From formula (40) it can be seen that first operational amplifier A 0 output voltage V_refSize, namely operational amplifier output circuit 22 output voltage swing, with the first input voltage V of reference voltage generating circuit_1RGin, the second input voltage V_2RGin, the 3rd reference current source electric current I₃, the 3rd resistance R3 resistance R and N size be correlated with；When circuit is determined, the voltage swing of operational amplifier output circuit 22 output, only with the first input voltage V of reference voltage generating circuit_1RGin, the second input voltage V_2RGin, the 3rd reference current source electric current I₃And the 3rd resistance R3 resistance R size be correlated with, and with the gate source voltage of a PMOSMP1 and the 2nd PMOSMP2, voltage between base stage and the emitter stage of the first audion Q1 and the second audion Q2 is unrelated, in other words, by adjust the first operational amplifier A 0 in-phase input end input voltage, eliminate device parameters and the transistor parameter impact on operational amplifier output circuit 22 output voltage of the first DC level switching circuit 31 and the second DC level switching circuit 32, that is: the impact on operational amplifier output circuit 22 output voltage of circuitry process technology and temperature is eliminated, when circuit is determined, make the output voltage of operational amplifier output circuit 22 and the first input voltage V of reference voltage generating circuit_1RGin, the second input voltage V_2RGinSize is relevant, the electric current I of the 3rd reference current source₃And the 3rd resistance R3 resistance R be correlated with so that operational amplifier output circuit 22 output voltage keep constant；Further, as the first input voltage V of reference voltage generating circuit_1RGinAnd the second input voltage V_2RGinWhen being zero, the output voltage V of operational amplifier output circuit 22_refFor NI₃R, so, just can according to needs, by adjusting the electric current of the 3rd reference current source I3 being connected between the in-phase input end of the first operational amplifier A 0 in power supply Vcc and operational amplifier output circuit 22, obtain the size of the output voltage needed accurately, thus meeting user's request, promote Consumer's Experience.

For the reference voltage generating circuit of embodiment one to embodiment six, when practical application, as shown in figs. 10 a and 10b, the first DC level switching circuit 31 and the second DC level switching circuit 32 all also include auxiliary circuit.

As shown in Figure 10 A, when practical application, the first DC level switching circuit 31 may include that a PMOSMP1, the first audion Q1, the second operational amplifier A the 1, first N-channel metal oxide semiconductor field effect tube (NMOS) MN1, the 4th reference current source I4 and the 5th reference current source I5；Wherein, auxiliary circuit includes: a NMOSMN1, the 4th reference current source I4, the 5th reference current source I5 and the second operational amplifier A 1.

The effect of the auxiliary circuit in the first DC level switching circuit 31 shown in Figure 10 A is: ensure that the gate source voltage of a PMOSMP1 is constant, and ensure the voltage constant between base stage and the emitter stage of the first audion Q1, and then make the voltage constant that operational amplifier output circuit 22 exports；Specifically, the gate source voltage of a PMOSMP1 is constant to adopt the 4th reference current source I4 to ensure, adopts the negative feedback of the second operational amplifier A 1 and a NMOSMN1 and the 5th reference current source I5 to ensure the voltage constant between base stage and the emitter stage of the first audion Q1.

Correspondingly, as shown in Figure 10 B, when practical application, the second DC level switching circuit 32 may include that the 2nd PMOSMP2, the second audion Q2, the 3rd operational amplifier A the 2, the 2nd NMOSMN2, the 6th reference current source I6 and the 7th reference current source I7；Wherein, auxiliary circuit includes: the 2nd NMOSMN2, the 6th reference current source I6, the 7th reference current source I7 and the 3rd operational amplifier A 2.

The effect of the auxiliary circuit in the second DC level switching circuit 32 shown in Figure 10 B is: ensure that the gate source voltage of the 2nd PMOSMP2 is constant, and ensure the voltage constant between base stage and the emitter stage of the second audion Q2, and then make the voltage constant that operational amplifier output circuit 22 exports；Specifically, the gate source voltage of the 2nd PMOSMP2 is constant to adopt the 6th reference current source I6 to ensure, the negative feedback of employing the 3rd operational amplifier A 2 and the 2nd NMOSMN2 and the 7th reference current source I7 ensure the voltage constant between base stage and the emitter stage of the second audion Q2.

Based on the reference voltage generating circuit of above-described embodiment, the embodiment of the present invention also provides for a kind of integrated circuit, and this integrated circuit includes above-mentioned reference voltage generating circuit.

Described integrated circuit can be the simulator arbitrarily needing accurate reference voltage, as: the equipment etc. of reference voltage generator, sensor, video filter and use operational amplifier.

Reference voltage generating circuit based on above-described embodiment, the embodiment of the present invention additionally provides a kind of method of generating reference voltage, and the method includes: the voltage-regulating circuit of reference voltage generating circuit keeps the voltage constant of the operational amplifier output circuit output of reference voltage generating circuit.

Specifically, reference voltage generating circuit receives constant input voltage；

Voltage-regulating circuit adjusts the input voltage of operational amplifier output circuit first input end, the operational amplifier output circuit input voltage according to the input voltage of first input end after adjusting and operational amplifier output circuit the second input, exports constant voltage.

Wherein, the input voltage of described voltage-regulating circuit adjustment operational amplifier output circuit first input end specifically includes: voltage-regulating circuit adjusts the input voltage of the first DC level switching circuit of reference voltage generating circuit；Or, the input voltage of the first input end of operational amplifier output circuit is carried out dividing potential drop by voltage-regulating circuit.

Here, described voltage-regulating circuit adjusts the input voltage of the first DC level switching circuit of reference voltage generating circuit, particularly as follows:

The input voltage of the first input end of operational amplifier output circuit is carried out dividing potential drop by voltage-regulating circuit, and Voltage Feedback dividing potential drop obtained gives the first DC level switching circuit；

The input voltage of input self is carried out the first displacement by described first DC level switching circuit, forms the input voltage of the first input end of described operational amplifier output circuit.

Correspondingly, the input voltage of input self is carried out the second displacement by the second DC level switching circuit, form the input voltage of the second input of described operational amplifier output circuit, so that the input voltage that operational amplifier output circuit is according to the input voltage of first input end after adjusting and the second input, export constant voltage.

Here, during practical application, the first displacement can be equal to the second displacement, and the first displacement can also be not equal to the second displacement.

In one embodiment, the input voltage of the first input end of operational amplifier output circuit can be carried out dividing potential drop by the mode of resistant series dividing potential drop by voltage-regulating circuit.

In one embodiment, the input voltage of the first input end of operational amplifier output circuit can be carried out dividing potential drop by resistant series dividing potential drop in conjunction with the mode of current source dividing potential drop by voltage-regulating circuit.

In one embodiment, when realizing, by when voltage-regulating circuit the input voltage of the first input end of operational amplifier output circuit being carried out the mode of dividing potential drop, the input voltage of first input end that voltage-regulating circuit adjusts operational amplifier output circuit, the input voltage of input self is carried out the first displacement by described first DC level switching circuit, forms the input voltage of the first input end of described operational amplifier output circuit；Correspondingly, the input voltage of input self is carried out the second displacement by described second DC level switching circuit, forms the input voltage of the second input of described operational amplifier output circuit.

In various embodiments of the present invention, the voltages keep constant of described operational amplifier output circuit output refers to: the standard deviation of the bucking voltage of described reference voltage generating circuit is less than or equal to 13.5mV.

Simultaneously, in order to the technical scheme that adopt the embodiment of the present invention is better described, the voltage of output can keep constant, the reference voltage generating circuit that reference voltage generating circuit shown in Fig. 1 and the embodiment of the present invention one are also provided by the present invention has carried out Experimental comparison, experiment condition is: temperature 30 DEG C, to bucking voltage V_offsetSample 200 times；Wherein, V_offset=V_ref-V_in, V_refRepresent the voltage of reference voltage generating circuit output, V_inRepresent the input voltage of reference voltage generating circuit, the input voltage that namely the second DC level switching circuit receives.

Figure 11 A is the bucking voltage V of reference voltage generating circuit shown in Fig. 1_offsetWith the variation diagram of sampling number, sampled by 200 times, and the bucking voltage V that 200 samplings is obtained_offsetCarry out standard deviation calculation can obtain: sample the bucking voltage V of 200 times_offsetStandard deviation be 31.6mV；The bucking voltage V of the reference voltage generating circuit that Figure 11 B provides for the embodiment of the present invention one_offsetWith the variation diagram of sampling number, sampled by 200 times, and the bucking voltage V that 200 samplings is obtained_offsetCarry out standard deviation calculation can obtain: sample the bucking voltage V of 200 times_offsetStandard deviation be 13.5mV.Wherein, the computing formula of standard deviation is:When calculating, n=200, l_iRepresent the bucking voltage V obtained that every time samples_offset。

From experimental result it can be seen that the bucking voltage V of the provided reference voltage generating circuit of the embodiment of the present invention_offsetStandard deviation be far smaller than the bucking voltage V of reference voltage generating circuit shown in Fig. 1_offsetStandard deviation, this shows: the provided reference voltage generating circuit of the embodiment of the present invention produce reference voltage more stable.

The above, be only presently preferred embodiments of the present invention, is not intended to limit protection scope of the present invention.

Claims (18)

1. a reference voltage generating circuit, it is characterised in that described reference voltage generating circuit is configured to receive constant input voltage, and described reference voltage generating circuit includes: operational amplifier output circuit and voltage-regulating circuit；Wherein,

Described voltage-regulating circuit, is configured to adjust the input voltage of the first input end of described operational amplifier output circuit；

Described operational amplifier output circuit, is configured to the input voltage of the second input of the input voltage according to the first input end after adjusting and described operational amplifier output circuit, exports constant voltage.

2. circuit according to claim 1, it is characterised in that described reference voltage generating circuit also includes: the first DC level switching circuit and the second DC level switching circuit；Wherein,

Described first DC level switching circuit, is configured to the input voltage by input self and carries out the first displacement, form the input voltage of the first input end of described operational amplifier output circuit；

Described second DC level switching circuit, is configured to the input voltage by input self and carries out the second displacement, form the input voltage of the second input of described operational amplifier output circuit.

3. circuit according to claim 2, it is characterised in that described voltage-regulating circuit, is configured to adjust the input voltage of described first DC level switching circuit.

4. circuit according to claim 3, it is characterized in that, described voltage-regulating circuit, is configured to the input voltage of described operational amplifier output circuit first input end is carried out dividing potential drop, and Voltage Feedback dividing potential drop obtained gives described first DC level switching circuit.

5. circuit according to claim 2, it is characterised in that described voltage-regulating circuit, is configured to the input voltage of described operational amplifier output circuit first input end is carried out dividing potential drop.

6. an integrated circuit, described integrated circuit includes reference voltage generating circuit, it is characterized in that, described reference voltage generating circuit is configured to receive constant input voltage, and described reference voltage generating circuit includes: operational amplifier output circuit and voltage-regulating circuit；Wherein,

Described voltage-regulating circuit, is configured to adjust the input voltage of the first input end of described operational amplifier output circuit；

Described operational amplifier output circuit, is configured to the input voltage of the second input of the input voltage according to the first input end after adjusting and described operational amplifier output circuit, exports constant voltage.

7. integrated circuit according to claim 6, it is characterised in that described reference voltage generating circuit also includes: the first DC level switching circuit and the second DC level switching circuit；Wherein,

Described first DC level switching circuit, is configured to the input voltage by input self and carries out the first displacement, form the input voltage of the first input end of described operational amplifier output circuit；

Described second DC level switching circuit, is configured to the input voltage by input self and carries out the second displacement, form the input voltage of the second input of described operational amplifier output circuit.

8. integrated circuit according to claim 7, it is characterised in that described voltage-regulating circuit, is configured to adjust the input voltage of described first DC level switching circuit.

9. integrated circuit according to claim 8, it is characterized in that, described voltage-regulating circuit, is configured to the input voltage of described operational amplifier output circuit first input end is carried out dividing potential drop, and Voltage Feedback dividing potential drop obtained gives described first DC level switching circuit.

10. integrated circuit according to claim 7, it is characterised in that described voltage-regulating circuit, is configured to the input voltage of described operational amplifier output circuit first input end is carried out dividing potential drop.

11. a method of generating reference voltage, it is characterised in that described method includes:

Reference voltage generating circuit receives constant input voltage；

The voltage-regulating circuit of described reference voltage generating circuit adjusts the input voltage of the operational amplifier output circuit first input end of described reference voltage generating circuit；

The described operational amplifier output circuit input voltage according to the input voltage of first input end after adjusting and the second input, exports constant voltage.

12. method according to claim 11, it is characterised in that the voltage-regulating circuit of described reference voltage generating circuit adjusts the input voltage of the operational amplifier output circuit first input end of described reference voltage generating circuit, including:

Described voltage-regulating circuit adjusts the input voltage of the first DC level switching circuit of described reference voltage generating circuit.

13. method according to claim 12, it is characterised in that described voltage-regulating circuit adjusts the input voltage of the first DC level switching circuit of described reference voltage generating circuit, for:

The input voltage of described operational amplifier output circuit first input end is carried out dividing potential drop by described voltage-regulating circuit, and Voltage Feedback dividing potential drop obtained gives the first DC level switching circuit of described reference voltage generating circuit；

The input voltage of input self is carried out the first displacement by described first DC level switching circuit, forms the input voltage of the first input end of described operational amplifier output circuit；

Correspondingly, the input voltage of input self is carried out the second displacement by the second DC level switching circuit of described reference voltage generating circuit, forms the input voltage of the second input of described operational amplifier output circuit.

14. method according to claim 11, it is characterised in that the voltage-regulating circuit of described reference voltage generating circuit adjusts the input voltage of the operational amplifier output circuit first input end of described reference voltage generating circuit, including:

The input voltage of the first input end of described operational amplifier output circuit is carried out dividing potential drop by described voltage-regulating circuit.

15. the method according to claim 13 or 14, it is characterised in that the input voltage of the first input end of described operational amplifier output circuit is carried out dividing potential drop by the mode of resistant series dividing potential drop by described voltage-regulating circuit；Or, the input voltage of the first input end of described operational amplifier output circuit is carried out dividing potential drop by resistant series dividing potential drop in conjunction with the mode of current source dividing potential drop by described voltage-regulating circuit.

16. method according to claim 14, it is characterised in that described method also includes:

The input voltage of input self is carried out the first displacement by the first DC level switching circuit of described reference voltage generating circuit, forms the input voltage of the first input end of described operational amplifier output circuit；

The input voltage of input self is carried out the second displacement by the second DC level switching circuit of described reference voltage generating circuit, forms the input voltage of the second input of described operational amplifier output circuit.

17. a method of generating reference voltage, it is characterised in that described method includes:

Reference voltage generating circuit receives constant input voltage；

The voltage that the output of described reference voltage generating circuit is constant；Wherein,

Output voltage values is determined by described input voltage completely.

18. method according to claim 17, it is characterised in that described reference voltage generating circuit exports constant voltage and is: the standard deviation of the bucking voltage of described reference voltage generating circuit is less than or equal to 13.5mV.