CN105677245A - Method for prolonging SSD service life based on WL multithreads - Google Patents

Method for prolonging SSD service life based on WL multithreads Download PDF

Info

Publication number
CN105677245A
CN105677245A CN201511031254.0A CN201511031254A CN105677245A CN 105677245 A CN105677245 A CN 105677245A CN 201511031254 A CN201511031254 A CN 201511031254A CN 105677245 A CN105677245 A CN 105677245A
Authority
CN
China
Prior art keywords
data
state
thread
service life
cold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201511031254.0A
Other languages
Chinese (zh)
Other versions
CN105677245B (en
Inventor
叶红兵
韩道静
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ramaxel Technology Shenzhen Co Ltd
Original Assignee
Ramaxel Technology Shenzhen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ramaxel Technology Shenzhen Co Ltd filed Critical Ramaxel Technology Shenzhen Co Ltd
Priority to CN201511031254.0A priority Critical patent/CN105677245B/en
Publication of CN105677245A publication Critical patent/CN105677245A/en
Application granted granted Critical
Publication of CN105677245B publication Critical patent/CN105677245B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • G06F3/0616Improving the reliability of storage systems in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The invention discloses a method for prolonging the SSD service life based on WL multithreads. The method is characterized in that a service life balancing finite-state machine is added in an SSD firmware and used for responding to read-write commands from a host-side, and data blocks are divided into cold data, heat data and routine data according to the access frequency attributes of the operated data blocks included in the read-write commands; a heat data processing thread, a cold data processing thread and a routine data processing thread are simultaneously set in the SSD firmware and are all coordinated, triggered and executed by the service life balancing finite-state machine in a unified mode, and final read-write operations of the host-side are completed. The read-write operations of the cold data, the heat data and the routine data are respectively achieved by adding the service life balancing finite-state machine and designing the multithreads based on the service life balancing finite-state machine, NVMe SSD write amplification is effectively reduced, and meanwhile the NAND flash erase times are efficiently balanced so as to prolong the service life of solid-state disks.

Description

A kind of method improving SSD service life based on WL multithreading
Technical field
The present invention relates to area information storage, particularly relate to a kind of method improving SSD service life based on WL multithreading.
Background technology
TLCNANDflash is the flash type that storage has 3 bit in a kind of each memory element (memorycell), and its higher memory density has at solid state hard disc and memory area and is more and more widely applied.
In 3 bit information of each memory element of TLCNANDflash, it is belonging respectively to different packets, relative to the concept of page in MLC and SLC, three packets in TLC are called sub-page, what wherein store low level bit is called lowpage, the middle bit of storage is called middlepage, and the high-order bit of storage is called uppage. And namely the same WordLine (WL) belonging to three sub-page is relative to the existence of page in MLC and SLC.
The service life of SSD is particularly paid close attention to by consumer level and enterprise-class tools, is also the important indicator weighing SSD. The erasing times of TLCNANDFLASH is only hundreds of, and therefore the service life of SSD is just focused more on by user.
Prior art exists based on single-threaded WL (WearLeveling, the life-span is balanced, is hereafter all called for short with WL) functional module Scheduling Design, and WL, as a functional module of solid state hard disc, is designed as passive scheduling mechanism. Being triggered by inside modules mechanism, the module that is scheduled is planned as a whole scheduling and is used. Single-threaded Scheduling Design has a disadvantage in that cold and hot data are distributed in identical block, it is impossible to efficiently separate cold and hot data, causes sizable writing amplification, does not reach life-span balanced long term object.
Prior art there is also the WL functional module Scheduling Design based on dual-thread, and WL, as a functional module of solid state hard disc, is designed as passive scheduling mechanism. Being triggered by inside modules mechanism, the module that is scheduled is planned as a whole scheduling and is used. WL is distributed in independent thread, only allows to write cold data, do not allow to include other all write operations of host;Host is also configured as an independent thread, host thread realize the differentiation of cold data and dsc data. So can efficiently separate the cold and hot data precipitated for a long time, improve the service life of solid state hard disc. But there is also following shortcoming: the new features of NVMe can not be played, it is necessary to actively distinguished the access frequency writing data by host thread, cause and extra write scale-up problem.
Summary of the invention
For disadvantages described above, present invention aim at proposing how effectively utilizing in NVMe agreement, from system level, user data access frequency carried out the characteristic of classification, efficient balance SSD erasing times, effectively reduces and writes amplification, improve the service life of SSD on the whole.
To achieve these goals, the invention provides a kind of method improving SSD service life based on WL multithreading, it is characterized in that in SSD firmware, increase life-span equilibrium finite state machine, for responding the read write command of host end, the access frequency attribute of the data block operated by comprising in the read write command according to host end, is divided into data block: cold data, dsc data and routine data; In SSD firmware, it is provided with three threads is simultaneously respectively as follows: dsc data process thread, cold data processing threads and routine data process thread, the access frequency attribute of described three threads data block operated by comprising in the life-span equilibrium finite state machine read write command according to its State Transferring flow process and host end triggers execution respectively, and completes the last read-write operation of host end.
The described method improving SSD service life based on WL multithreading, it is characterised in that described life-span equilibrium finite state machine defines WL0, four kinds of states of WL1, WL2 and WL3:
State WL0 is defined as WL init state, its trigger condition for powering on, resetting, WL3 state call initialization, it is opened, and dsc data processes thread, cold data processing threads and routine data process thread;
State WL1 is defined as WL and triggers state, and it is triggered by WL0 state and calls, and opens dsc data and processes thread and cold data processing threads;
State WL2 is defined as state during WL processes, and it is triggered by WL1 state and calls, and opens dsc data and processes thread and cold data processing threads;
State WL3 is defined as WL and has processed state, and it is triggered by WL2 state and calls or occur in WL1 execution that abnormal conditions triggering is directly entered WL and has processed state, opens dsc data process thread and routine data processes thread.
The described method improving SSD service life based on WL multithreading, it is characterised in that described dsc data processes thread for responding the Host dsc data write;
Described cold data processing threads is for responding the routine data that Host writes and firmware task writes; Firmware task module refers to that SSD internal data moves module, but does not include WL module;
Described routine data processes thread for responding the cold data that Host writes and life-span equilibrium is write.
The present invention is by increasing life-span equilibrium finite state machine and multithreading realizes the read-write operation of cold data, dsc data and routine data respectively based on this state machine design, that effectively reduces NVMeSSD writes amplification, the simultaneously erasing times of balanced NANDflash efficiently, to extend the service life of solid state hard disc.
Accompanying drawing explanation
Fig. 1 is life-span equilibrium finite state machine status transition diagram;
Fig. 2 is three thread definition schematic diagrams;
Fig. 3 is the command process mode schematic diagram under WL0 pattern;
Fig. 4 is the command process mode schematic diagram under WL1 pattern;
Fig. 5 is the command process mode schematic diagram under WL2 pattern;
Fig. 6 is the command process mode schematic diagram under WL3 pattern.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only a part of embodiment of the present invention, rather than whole embodiments. Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art obtain under not making creative work premise, broadly fall into the scope of protection of the invention.
In order to quickly promote SSD, corresponding NVMe (NVMExpress) agreement supporting PCIe interface to be born. The access frequency of user data has been carried out classification from system level by NVMe agreement, can be effectively switched into SSD internal firmware design correlation module, then can play data balancing characteristic more efficiently.
Fig. 1 is life-span equilibrium finite state machine status transition diagram, and this finite state machine defines WL0, four kinds of states of WL1, WL2 and WL3, devises the life-span equilibrium finite state machine scheduling mechanism as SSD firmware design, gives full play to life-span equalization characteristic. Finite state machine is switching under four kinds of different operating states of life-span equilibrium, and the strict trigger condition such as the definition of table 1 below life-span equilibrium finite state machine synopsis of switching of state triggers, and dispatches the thread that unlatching is corresponding.
State WL0 is defined as WL init state, and its trigger condition is the Poweron that powers on, reset Reset, WL3 state calls initialization InitfromWL3, and it opens following thread Hot_Thread, MediumThread, Cold_Thread.
State WL1 is defined as WL and triggers state, and it is triggered by WL0 state and calls WListriggeredfromWL0, opens following thread Hot_Thread, Cold_Thread.
State WL2 is defined as state during WL processes, and it is triggered by WL1 state and calls WLisinprocessingfromWL1, opens following thread Hot_Thread, Cold_Thread.
State WL3 is defined as WL and has processed state, it is triggered by WL2 state and calls or occur in WL1 execution that abnormal conditions triggering is directly entered WL and has processed state WLisdonefromWL2, orAbnormalhandlefromWL1, opens following thread Hot_Thread, Cold_Thread.
Table 1: life-span equilibrium finite state machine synopsis
Fig. 2 is three thread definition schematic diagrams, and SSD firmware design is from including three below thread less by the present embodiment:
Hot_thread, for responding the Host dsc data write;
Medium_Thread, for responding the routine data that Host writes and firmware task writes; Firmware task module refers to that SSD internal data moves module, but does not include WL module.
Cold_Thread, is used for responding the cold data that Host writes and WL (wearleveling, the life-span is balanced) writes.
Initial and the end of each data block operation has added a time stamp TsAnd Te, the data for distinguishing different pieces of information block are new and old.
Table 2
Table 2 is to define about the access frequency between current write order counterlogic block address LBA band in NVMExpressRevision1.2 agreement, this agreement is labelled with the access frequency between current write order correspondence LBA band, the cold and hot grade of data of SSD firmware design can be corresponded to: Hot, Medium, Cold. As being that 0000b and 0001b is defined as Medium grade by numerical value, 0010b and 0110b is defined as Cold grade, and other is defined as Hot grade.
Table 1 enumerates out life-span equilibrium finite state machine synopsis, therefrom can find the switching condition between different conditions and the related linear program opened. Below based on the definition of table 1 with table 2, provide the abstract host order out handling process under different conditions machine.
Fig. 3 is the command process mode schematic diagram under WL0 pattern; Under WL0 pattern, the order that host sends is sent to the thread of correspondence by cold and hot grade. For long-term for line service, Medium_Thread also can adulterate a firmware task operation, for instance garbage reclamation.
Fig. 4 is the command process mode schematic diagram under WL1 pattern; Under WL1 pattern, life-span balance module is triggered. Owing to Medium thread is between Hot and Cold, the coupling of MARG is relatively strong, so active shield Medium_Thread. Host data block 4 and 5 writes Hot_Thread, and data block 6 writes Cold_Thread.
Fig. 5 is the command process mode schematic diagram under WL2 pattern; Under WL2 pattern, life-span balance module is currently running, and Medium_Thread is still shielded. Host data block 7 and 8 writes Hot_Thread, and data block 9 writes Cold_Thread. Life-span balance module also can write a cold data (a) precipitated for a long time to Cold_Thread.
Fig. 6 is the command process mode schematic diagram under WL3 pattern, and under WL3 pattern, life-span balance module has run through into, and Medium_Thread is also turned on again. Hot_Thread writes has expired the host dsc data issued and intermediate data, and Medium_Thread is filled with host and issues and the intermediate data of firmware task module, and data block corresponding for Cold_Thread has write completely cold data.
To sum up process, by the mode of the cold and hot grade write different threads of data, it is possible to that effectively reduces NVMeSSD writes amplification.
Cold data block 3,6,9 and 12 write once that host issues, to Cold_Thread, does not need life-span balance module pro-active intervention. This writing mode, it is possible to what be substantially reduced NVMeSSD writes amplification.
The intermediate data block 2 and 11 that host issues also is that write once is to Medium_Thread, it is not necessary to pro-active intervention that firmware task module (herein, refers mainly to garbage reclamation). This writing mode, it is also possible to that effectively reduces NVMeSSD writes amplification.
Above disclosed it is only an embodiment of the present invention, certainly the interest field of basis can not be limited with this, one of ordinary skill in the art will appreciate that all or part of flow process realizing above-described embodiment, and according to the equivalent variations that the claims in the present invention are made, still fall within the scope that the present invention contains.

Claims (3)

1. the method improving SSD service life based on WL multithreading, it is characterized in that in SSD firmware, increase life-span equilibrium finite state machine, for responding the read write command of host end, the access frequency attribute of the data block operated by comprising in the read write command according to host end, is divided into data block: cold data, dsc data and routine data; In SSD firmware, it is provided with three threads is simultaneously respectively as follows: dsc data process thread, cold data processing threads and routine data process thread, the access frequency attribute of described three threads data block operated by comprising in the life-span equilibrium finite state machine read write command according to its State Transferring flow process and host end triggers execution respectively, and completes the last read-write operation of host end.
2. the method improving SSD service life based on WL multithreading according to claim 1, it is characterised in that described life-span equilibrium finite state machine defines WL0, four kinds of states of WL1, WL2 and WL3:
State WL0 is defined as WL init state, its trigger condition for powering on, resetting, WL3 state call initialization, it is opened, and dsc data processes thread, cold data processing threads and routine data process thread;
State WL1 is defined as WL and triggers state, and it is triggered by WL0 state and calls, and opens dsc data and processes thread and cold data processing threads;
State WL2 is defined as state during WL processes, and it is triggered by WL1 state and calls, and opens dsc data and processes thread and cold data processing threads;
State WL3 is defined as WL and has processed state, and it is triggered by WL2 state and calls or occur in WL1 execution that abnormal conditions triggering is directly entered WL and has processed state, opens dsc data process thread and routine data processes thread.
3. the method improving SSD service life based on WL multithreading according to claim 2, it is characterised in that described dsc data processes thread for responding the Host dsc data write;
Described cold data processing threads is for responding the routine data that Host writes and firmware task writes; Firmware task module refers to that SSD internal data moves module, but does not include WL module;
Described routine data processes thread for responding the cold data that Host writes and life-span equilibrium is write.
CN201511031254.0A 2015-12-31 2015-12-31 A method of SSD service life is improved based on service life equilibrium WL multithreading Expired - Fee Related CN105677245B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201511031254.0A CN105677245B (en) 2015-12-31 2015-12-31 A method of SSD service life is improved based on service life equilibrium WL multithreading

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201511031254.0A CN105677245B (en) 2015-12-31 2015-12-31 A method of SSD service life is improved based on service life equilibrium WL multithreading

Publications (2)

Publication Number Publication Date
CN105677245A true CN105677245A (en) 2016-06-15
CN105677245B CN105677245B (en) 2018-11-20

Family

ID=56298515

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201511031254.0A Expired - Fee Related CN105677245B (en) 2015-12-31 2015-12-31 A method of SSD service life is improved based on service life equilibrium WL multithreading

Country Status (1)

Country Link
CN (1) CN105677245B (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107908358A (en) * 2017-10-25 2018-04-13 记忆科技(深圳)有限公司 A kind of method of reduction NVMe solid state disk writes amplification
CN107943715A (en) * 2017-10-12 2018-04-20 记忆科技(深圳)有限公司 A kind of method of lifting NVMe solid state hard discs read buffer hit
CN109408401A (en) * 2017-08-18 2019-03-01 旺宏电子股份有限公司 The management system and management method of memory device
CN110618794A (en) * 2019-09-20 2019-12-27 苏州浪潮智能科技有限公司 Method and system for accessing NandFlash by SSD firmware
CN111831228A (en) * 2020-07-06 2020-10-27 山东华芯半导体有限公司 SSD (solid State disk) cold and hot data separation method based on out-of-band interaction
CN113010091A (en) * 2019-12-20 2021-06-22 华为技术有限公司 Method for writing data into solid state disk, and method and device for garbage collection

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102799534A (en) * 2012-07-18 2012-11-28 上海宝存信息科技有限公司 Storage system and method based on solid state medium and cold-hot data identification method
CN103246609A (en) * 2013-04-24 2013-08-14 深圳市江波龙电子有限公司 Method and device for cold-hot data discrimination management in flash memory device
CN103777905A (en) * 2014-02-14 2014-05-07 华中科技大学 Software-defined fusion storage method for solid-state disc
CN104156317A (en) * 2014-08-08 2014-11-19 浪潮(北京)电子信息产业有限公司 Wiping and writing management method and system for non-volatile flash memory

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102799534A (en) * 2012-07-18 2012-11-28 上海宝存信息科技有限公司 Storage system and method based on solid state medium and cold-hot data identification method
CN103246609A (en) * 2013-04-24 2013-08-14 深圳市江波龙电子有限公司 Method and device for cold-hot data discrimination management in flash memory device
CN103777905A (en) * 2014-02-14 2014-05-07 华中科技大学 Software-defined fusion storage method for solid-state disc
CN104156317A (en) * 2014-08-08 2014-11-19 浪潮(北京)电子信息产业有限公司 Wiping and writing management method and system for non-volatile flash memory

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109408401A (en) * 2017-08-18 2019-03-01 旺宏电子股份有限公司 The management system and management method of memory device
CN109408401B (en) * 2017-08-18 2023-03-24 旺宏电子股份有限公司 Management system and management method of memory device
CN107943715A (en) * 2017-10-12 2018-04-20 记忆科技(深圳)有限公司 A kind of method of lifting NVMe solid state hard discs read buffer hit
CN107943715B (en) * 2017-10-12 2021-10-01 记忆科技(深圳)有限公司 Method for improving read cache hit of NVMe solid state disk
CN107908358A (en) * 2017-10-25 2018-04-13 记忆科技(深圳)有限公司 A kind of method of reduction NVMe solid state disk writes amplification
CN110618794A (en) * 2019-09-20 2019-12-27 苏州浪潮智能科技有限公司 Method and system for accessing NandFlash by SSD firmware
CN113010091A (en) * 2019-12-20 2021-06-22 华为技术有限公司 Method for writing data into solid state disk, and method and device for garbage collection
CN111831228A (en) * 2020-07-06 2020-10-27 山东华芯半导体有限公司 SSD (solid State disk) cold and hot data separation method based on out-of-band interaction
CN111831228B (en) * 2020-07-06 2024-06-07 山东华芯半导体有限公司 SSD cold and hot data separation method based on out-of-band interaction

Also Published As

Publication number Publication date
CN105677245B (en) 2018-11-20

Similar Documents

Publication Publication Date Title
CN105677245A (en) Method for prolonging SSD service life based on WL multithreads
US20200393974A1 (en) Method of detecting read hotness and degree of randomness in solid-state drives (ssds)
TWI425357B (en) Method for performing block management, and associated memory device and controller thereof
CN104934066B (en) Reading interference processing in nand flash memory
CN107741913B (en) Method for managing a memory device, memory device and controller
TWI471862B (en) Flash memory controller
TWI630540B (en) Data storage device and method for operating non-volatile memory
CN107391389B (en) Method for managing a memory device, memory device and controller
US9268487B2 (en) Method and apparatus for restricting writes to solid state memory when an end-of life condition is reached
KR102515137B1 (en) Data storage device and operating method thereof
US9881682B1 (en) Fine grained data retention monitoring in solid state drives
CN102298543A (en) Memory management method and memory management device
US9123443B2 (en) Memory device, memory management device, and memory management method
US20090027796A1 (en) Information recording device and control method therefor
CN105630699B (en) A kind of solid state hard disk and read-write cache management method using MRAM
US8954662B2 (en) SSD controller, and method for operating an SSD controller
Feng et al. Mapping granularity adaptive ftl based on flash page re-programming
CN206331414U (en) A kind of solid state hard disc
CN102160038A (en) Method and an apparatus to manage non-volatile disl cache
CN107765989B (en) Storage device control chip, storage device and storage device management method
CN104461754B (en) A kind of method and apparatus for monitoring eMMC
CN105653468B (en) A kind of storage device using MRAM
TWI502591B (en) Method for managing a memory apparatus, and associated memory apparatus thereof and associated controller thereof
US20240241642A1 (en) Storage device including non-volatile memory device and operating method of storage device
US11016686B2 (en) Apparatus and method of bad location management for storage class memory using distributed pointers

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20181120

CF01 Termination of patent right due to non-payment of annual fee