CN105633138A - Gallium-arsenide-based dual-heterojunction bipolar transistor structure and preparation method thereof - Google Patents
Gallium-arsenide-based dual-heterojunction bipolar transistor structure and preparation method thereof Download PDFInfo
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- 229910001218 Gallium arsenide Inorganic materials 0.000 title claims abstract description 62
- 238000002360 preparation method Methods 0.000 title claims abstract description 11
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 title abstract description 47
- 239000000463 material Substances 0.000 claims abstract description 67
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 238000013461 design Methods 0.000 claims abstract description 21
- 239000002019 doping agent Substances 0.000 claims abstract description 13
- 238000009792 diffusion process Methods 0.000 claims abstract description 6
- 125000006850 spacer group Chemical group 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 claims description 39
- 238000000171 gas-source molecular beam epitaxy Methods 0.000 claims description 17
- 238000005336 cracking Methods 0.000 claims description 16
- 229910000070 arsenic hydride Inorganic materials 0.000 claims description 14
- 229910052733 gallium Inorganic materials 0.000 claims description 12
- 229910052738 indium Inorganic materials 0.000 claims description 12
- 230000008569 process Effects 0.000 claims description 11
- 150000001875 compounds Chemical class 0.000 claims description 8
- 238000003795 desorption Methods 0.000 claims description 8
- 239000011435 rock Substances 0.000 claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 8
- 230000008859 change Effects 0.000 claims description 7
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims description 6
- 239000000203 mixture Substances 0.000 claims description 6
- 229910002058 ternary alloy Inorganic materials 0.000 claims description 6
- 239000013078 crystal Substances 0.000 claims description 5
- 238000007789 sealing Methods 0.000 claims description 5
- 229910052790 beryllium Inorganic materials 0.000 claims description 4
- 238000007872 degassing Methods 0.000 claims description 4
- 238000000407 epitaxy Methods 0.000 claims description 4
- 230000003647 oxidation Effects 0.000 claims description 4
- 238000007254 oxidation reaction Methods 0.000 claims description 4
- 238000002128 reflection high energy electron diffraction Methods 0.000 claims description 4
- 230000001105 regulatory effect Effects 0.000 claims description 4
- ATBAMAFKBVZNFJ-UHFFFAOYSA-N beryllium atom Chemical compound [Be] ATBAMAFKBVZNFJ-UHFFFAOYSA-N 0.000 claims description 3
- 238000009413 insulation Methods 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 125000005842 heteroatom Chemical group 0.000 claims description 2
- 238000012546 transfer Methods 0.000 claims description 2
- CLCPDSJUXHDRGX-UHFFFAOYSA-N 6-(1,3-dihydroxyisobutyl)thymine Chemical compound CC1=C(CC(CO)CO)NC(=O)NC1=O CLCPDSJUXHDRGX-UHFFFAOYSA-N 0.000 claims 2
- 238000005457 optimization Methods 0.000 abstract description 6
- 238000005516 engineering process Methods 0.000 description 8
- 238000002441 X-ray diffraction Methods 0.000 description 7
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 6
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 4
- 238000009826 distribution Methods 0.000 description 4
- 230000004044 response Effects 0.000 description 4
- 239000000956 alloy Substances 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 238000012544 monitoring process Methods 0.000 description 3
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 238000012937 correction Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000000097 high energy electron diffraction Methods 0.000 description 2
- 230000008676 import Effects 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 238000001451 molecular beam epitaxy Methods 0.000 description 2
- 230000000704 physical effect Effects 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000005518 electrochemistry Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000001534 heteroepitaxy Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000004949 mass spectrometry Methods 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 230000007886 mutagenicity Effects 0.000 description 1
- 231100000299 mutagenicity Toxicity 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/737—Hetero-junction transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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Abstract
The invention relates to a gallium-arsenide-based dual-heterojunction bipolar transistor structure and a preparation method thereof. The gallium-arsenide-based dual-heterojunction bipolar transistor structure is characterized in that the structure consists of a semi-insulating single-throw GaAs substrate, a buffer layer, a collector region, a highly-doped collector region, a spacer layer, a base region, a spacer layer, an emission region, a cover layer, a gradient cover layer and a cover layer. Innovation points of the structure are as follows: in order to solve a problem of diffusion of Be as a P type dopant of a base region under a high temperature, the provided structure employs a structural design of inserting the GaAs spacer layers into two sides of the base region, thereby restricting diffusion of the Be under the high temperature. When the thickness of the base region is reduced, the base region is easy to puncture although the frequency characteristic of the device can be improved; and therefore, the thickness of the base region is designed to be 60nm for optimization based on comparison of materials. In terms of doping, the frequency can be improved based on high doping concentration; the puncture voltage also can be reduced; and after comparison, the doping concentration of the baser region is 3E19/cm<3> based on an optimized design.
Description
Technical field
The present invention relates to a kind of novel GaAs based Dual-heterojunction bipolar transistor structure design and preparation method. Carry out material growth by gas source molecular beam epitaxy (GSMBE), realized the preparation of heterojunction bipolar transistor device by compound semiconductor technological process, belong to technical field of material.
Background technology
As far back as nineteen fifty-one, Shockley just first proposed wide emitter junction principle. Nineteen fifty-seven, Kroemer has systematically discussed the principle of HBT further, point out that injection efficiency can be improved in launch site, broad stopband, suppress the inverse injection of base district current carrier, greatly improve current gain, junction capacitance and base district resistance can be reduced by Ji Qu and the slightly low-doped launch site that height adulterates simultaneously, thus improve the frequency response characteristic of transistor. But the restriction due to material growing technology, until earlier 1970s, the talents such as Dumke utilize rheotaxy (LPE) technology successfully to produce AlGaAs/GaAsHBT first time.
After entering the nineties in 20th century, due to the development of MOCVD and MBE technology, and the reaching its maturity of compound-material and heterojunction technique, three end microwave devices obtain the achievement attracted people's attention so that the various device performances of heterojunction bipolar transistor and high electron mobility transistor structure improve year by year. Meanwhile, the MMIC technology formed on this basis is practical, people's commercialization stage of going forward side by side, high-power, high-level efficiency can not only be obtained and also noise figure little. The conventional device of microwave regime has field-effect transistor (FET), High Electron Mobility Transistor (HEMT) and heterojunction bipolar transistor (HBT) etc. FET has ripe technique, and the grid that can realize sub-micrometer scale are long, and cost is lower, and in low-noise simulation circuit and low-power consumption digital circuit, performance is good. HBT is formed primarily of compound semiconductor or alloy semiconductor, it is necessary to the different material of two kinds of energy gaps is respectively as launch site and Ji Qu, and wide bandgap material does launch site, narrow band gap material Zuo Ji district. And in Double Heterojunction Bipolar Transistor (DHBT), collector region and base district material band gap are not identical yet. The circuit application that HBT lays equal stress at high speed, great dynamic range, low harmonics distortion, low phase place noise occupies unique and important status. HBT adopts launch site, broad stopband, allows the height doping of base district, can obtain higher cutoff frequency, high gain, high-level efficiency simultaneously, and have higher voltage breakdown, be very suitable for power magnification circuit application. HBT has the high advantage of the linear lag, it is not necessary to device turns off to make to add drain switch, than being easier to adjustment under low quiescent current state. At present, HBT technology has been widely used in making the driving circuit of laser apparatus and modulator in opticfiber communication cable.
The ternary mixed crystal material of GaAs base Group III-V compound semiconductor and composition thereof, it is possible to regulate the physical properties such as energy gap and lattice parameter by the method for adjustment group part composition, become the key base mateiral of microwave regime. In the design of Group III-V compound semiconductor material and device, by the parameter such as lattice parameter, energy gap is carried out choice and optimization, it is possible to obtain multiple heterogenous junction epitaxy structure. By the optimization of the selection of extensional mode and material growth conditions, the structure design growth of material and device can have very big choice.
Due to the Al of each componentxGa1-xAs material all can realize lattice match with GaAs, and therefore, the launch site of initial GaAsHBT adopts AlxGa1-xAs. But Al is easy to form deep energy level deathnium, makes the performance especially reliability decrease of device. Adopt the In with GaAs lattice match0.49Ga0.51P replaces AlxGa1-xAs, as the launch site of GaAsHBT, can obtain comparing AlxGa1-xThe direct current that As launch site is more superior and frequency response characteristic. And InGaP/GaAsHBT has very high reliability.
Double Heterojunction Bipolar Transistor (DHBT) cut-in voltage is low, breakdown reverse voltage height, and output rating is big, is particularly useful for the circuit such as power magnification, gives full play to the feature of HBT device. But, owing to traditional GaAs base (such as InGaP/GaAs/InGaPDHBT) is by the impact at collector base junction conduction band barrier point peak so that it is I-V output characteristic is deteriorated, and peak power output reduces. In order to reduce the conduction band barrier point peak of collector base junction, DHBT can adopt n type doping interposed layer compound collector base junction, two �� doping interposed layer is gentle becomes the structures such as collector base junction. Consider from the angle of material growth, adulterate the InGaP/GaAs/InGaPDHBT structured material of interposed layer compared with the method at the conduction band barrier point peak of other solution collector base junctions with n type, the stability of this kind of method different batches, repeatability to be got well, it is beneficial to scale operation, can effectively reduce the conduction band barrier point peak of collector base junction, obtain good output characteristic. Inventive design adopts the interposed layer InGaP/GaAs/InGaPDHBT structure with N-type doping.
Document related to the present invention has:
��KroemerH.,RCAReview,1957(9):332-324����H.Kroemer,Heterojunctionbipolartransistorsandintegratedcircuits,ProceedingsofIEEE,1982(1):13-25����S.S.Tan,A.G.Milnes,ConsiderationofthefrequencyperformancepotentialofGaAshomojunctionandheterojunctionn-p-ntransistors,IEEETrans.Electron.Dev.1983(10):1289-1294����H.Howe,MicrowaveIntegratedCircuits--AnHistoricalPerspective.MicrowaveTheoryandTechniques,IEEETransactionson,1984(9):991-996����Tzung-HanWu,Sheng-CheTseng,,Chin-ChunMeng,andGuo-WeiHuang,GaInP/GaAsHBTSub-HarmonicGilbert MixersUsingStacked-LOandLeveled-LOTopologies,IEEETransactionsMicrowaveTheoryandTechniques,2007(5):880-888����YasuoOsone,KazuhiroMochizuki,SeniorMember,IEEE,andKen��ichiTanakaThermalPerformanceofCollector-UpHBTsforSmallHigh-PowerAmplifiersWithaNovelThermalviaStructureUnderneaththeHBTFingersIEEETransactionsonComponentsandPackagingTechnologies,2005(1):34-38����B.-G.Min,J.-M.Lee,Seong-IlKim,K.-H.Lee,C.-W.Ju.CurrentGainImprovementofInGaP/GaAsHBTbyaNewlyDevelopedEmitterLedgeProcess.JournaloftheKoreanPhysicalSociety,2003:S518-S521����KurishimaK,NakajimaH,KobayashiT,etalFabricationandcharacterizationofhigh-performanceInP/InGaAsdouble-heterojunctionbipolartransistors,IEEETransElectronDevices,1994(8):1319-1326����WillenB,WestergrenU,AsonenHHigh-gain,high-speedInP/InGaAsdouble-heterojunctionbipolartransistorswithastep-gradedbase-collectorheterojunction[J],IEEEElectron.DeviceLett,1995(11):479-481��
The present invention intends providing a kind of novel GaAs based Dual-heterojunction bipolar transistor structure and preparation method. The present invention intends utilizing gas source molecular beam epitaxy (GSMBE) technology, grows Dual-heterojunction bipolar transistor structure material, prepare double hetero bipolar transistor material by nanometer technique and etching process in gallium arsenide substrate. And the compound semiconductor materials on Si base can be studied further, such as the GaAsHBT material etc. on Si base, the integrated technology of development and IC process compatible.
Summary of the invention
It is an object of the invention to provide a kind of novel GaAs based Dual-heterojunction bipolar transistor structure and preparation method, described preparation method adopts gas source molecular beam epitaxy (GSMBE) to carry out material growth.
As shown in Figure 1, material structure provided by the invention is as shown in Figure 2 for material growth technique flow process.
Specifically, prepare at GSMBE in the process of GaAs based Dual-heterojunction bipolar transistor structure, adopt half single GaAs (100) substrate thrown of insulation. The first GaAs buffer layer of epitaxy one layer of 500-550nm on gaas substrates, the introducing of GaAs buffer layer can make material have good transition from substrate to structure, reduces and directly carries out defect that hetero epitaxy causes and dislocation etc. Then 500-550nmInGaP collector layer is grown successively, 5-7nmInGaP height doping collector layer, 5-7nmGaAs sealing coat, 60-65nmGaAs Ji Qu, 5-7nmGaAs sealing coat, 80-90nmInGaP emtting electrode; 100-110nmGaAs cap rock, 50-60nmGaAs-InGaAs gradual change cap rock and 50-60nmInGaAs cap rock.
For GaAs substrate, except temperature is 300 DEG C-350 DEG C; Degasification about 30 minutes, can import growth room into after completing. Substrate surface desorb before growth: GaAs substrate is heated to desorption temperature (680 DEG C��700 DEG C) to remove the zone of oxidation on surface under the protection of As atmosphere; The process high energy electron diffraction (RHEED) of desorb is monitored.
By high-purity arsine (AsH3) and phosphine (PH3) As that obtains after cracking2And P2The beam intensity being used separately as As source and P source, arsine and phosphine is controlled by the pipeline pressure of Shu Yuanlu, and the cracking temperature in V pencil of families source is 1000 DEG C. The underlayer temperature of GaAs when GSMBE grows is 620 DEG C, before GaAs grows, adopts line rule to measure the line of Ga, controls the growth velocity of GaAs with this. AsH3Cracking temperature be 1000 DEG C, by regulating AsH in gas circuit3Pressure control the size of As line. In the manufacturing processed of the present invention, gas source stove AsH3Pressure PV=450��550Torr, corresponding growth room pressure is 1.8��2.5 �� 10-5Torr. During growth, substrate rotates with every minute speed of 5 turns, to ensure the homogeneity of epitaxial material. For the three component system material InGaP only containing a kind of V group element, its growth velocity depends primarily on the molecular beam intensity sum of group-III element In and Ga, organizes part and then determines by the molecular beam intensity ratio of In and Ga. Therefore, in order to regulate group part of InGaP epitaxial film to reach design requirements, it is necessary to accurately the line of correction In and Ga compares fIn/fGa. We adopt the mismatch that X-ray diffraction (XRD) measures between epitaxial film and substrate, and calculate group part of ternary-alloy material accordingly.
As mentioned above, it is necessary, gas source molecular beam epitaxy (GSMBE) prepares the method for GaAs based Dual-heterojunction bipolar transistor structure material, its advantage is summarized as follows:
1, on GaAs base DHBT material system is selected, make full use of the ternary mixed crystal material of GaAs base Group III-V compound semiconductor and composition thereof, the physical properties such as energy gap and lattice parameter is regulated by the method for adjustment group part composition, adopting the InGaP mated with GaAs material lattice as collector region and launch site material in DHBT designs, GaAs is as base district material.
2, GSMBE is ultra-high vacuum system, it may also be useful to the molecular beam source of high purity, can obtain high-purity monocrystalline; Growth temperature is relatively low, and the bulk diffusion interference to organizing part and doping concentration distribution is reduced to minimum; Can by the unlatching of the control fast door guard plate of Shu Yuanlu or pass, the many monitoring meanss of monitoring means are many, it is possible to growth is in, by thermodynamics mechanism restriction, the polynary system material not dissolving each other within the scope of gap; MBE belongs to non-equilibrium reaction dynamic process on growth mechanism, easily reaches injection suddenly or terminates the object of molecular beam, thus can obtain group part interface of sudden change and precipitous doping concentration distribution; Monitoring means is many, it is possible to carry out monitor in real time in process of growth, accurately control beam intensity and growth velocity;
3, innovative point is the problem that spreads when high temperature to solve beryllium (Be) as base district P-type dopant, structure design have employed and respectively insert one layer of GaAs in Ji Qu both sides and isolate (Spacer) layer, thus limit the diffusion of Be when high temperature. Although reducing the frequency response characteristic that base district thickness can improve device, but easily puncturing. The optimization design of 60nm it is designed to through base district, Integrated comparative constituency material. In doping, high doping content can improve frequency, but can reduce voltage breakdown equally, and through comparing, base district doping content is 3E19/cm3Optimization design.
Accompanying drawing explanation
Fig. 1 is material growth technique schematic flow sheet;
Fig. 2 is the GaAs based Dual-heterojunction bipolar transistor structure structural representation of the present invention;
The P type doping electrochemistry CV test curve of Tu3Wei Ji district GaAs material;
The XRD that Fig. 4 is InGaP/GaAs epitaxial material waves curve;
The XRD that Fig. 5 is InGaP/GaAsDHBT structured material waves curve;
Fig. 6 is second ion mass spectroscopy (SIMS) the depth profiling measuring result of InGaP/GaAsDHBT structured material.
Embodiment
By specific embodiment, illustrate the substantive distinguishing features of the present invention and significant progress further, but the present invention is only confined to by no means embodiment.
Embodiment 1
The preparation method of the GaAs based Dual-heterojunction bipolar transistor structure shown in Fig. 1 of the present invention for GaAs substrate, except temperature is 300 DEG C-350 DEG C; Degasification about 30 minutes, can import growth room into after completing. Substrate surface desorb before growth: GaAs substrate is heated to desorption temperature (680 DEG C��700 DEG C) to remove the zone of oxidation on surface under the protection of As atmosphere; The process high energy electron diffraction (RHEED) of desorb is monitored.
By high-purity arsine (AsH3) and phosphine (PH3) As that obtains after cracking2And P2The beam intensity being used separately as As source and P source, arsine and phosphine is controlled by the pipeline pressure of Shu Yuanlu, and the cracking temperature in V pencil of families source is 1000 DEG C. The underlayer temperature of GaAs when GSMBE grows is 620 DEG C, before GaAs grows, adopts line rule to measure the line of Ga, controls the growth velocity of GaAs with this. AsH3Cracking temperature be 1000 DEG C, by regulating AsH in gas circuit3Pressure control the size of As line. In the present invention, gas source stove AsH3Pressure PV=450��550Torr, corresponding growth room pressure is 1.8��2.5 �� 10-5Torr. During growth, substrate rotates with every minute speed of 5 turns, to ensure the homogeneity of epitaxial material. For the three component system material InGaP only containing a kind of V group element, its growth velocity depends primarily on the molecular beam intensity sum of group-III element In and Ga, organizes part and then determines by the molecular beam intensity ratio of In and Ga. Therefore, in order to regulate group part of InGaP epitaxial film to reach design requirements, it is necessary to accurately the line of correction In and Ga compares fIn/fGa. For this reason, the present invention adopts the mismatch that X-ray diffraction (XRD) measures between epitaxial film and substrate, and calculates group part of ternary-alloy material accordingly.
Concrete technique is as follows:
(1) GaAs (100) substrate is sent into the pretreatment chamber of gas source molecular beam epitaxy system GSMBE, in 300-350 DEG C of degasification 30 minutes;
(2) by above-mentioned substrate transfer to the growth room of GSMBE, by AsH3Carry out cracking in 1000 DEG C, obtain As2As As source, regulate gas source stove AH3Pressure PVIt is 450��700Torr;
(3) substrate grow under the protection of As atmosphere before surface desorption, underlayer temperature carries out epitaxy at 620 DEG C, and during growth, substrate rotates with every minute speed of 5 turns, to ensure the homogeneity of epitaxial material;
The growth technique condition of GaAs layer is: the growth temperature of Ga is 1050 DEG C, AsH3Cracking pressure be 650Torr, under this condition, the growth velocity of GaAs is 1 ��m/h, for N-type adulterate requirement, adopt Si doping temperature be 1250 DEG C, for P type adulterate requirement, adopt Be doping temperature be 890 DEG C; The technique of substrate surface desorb is that GaAs substrate is heated to desorption temperature 680 DEG C��700 DEG C to remove the zone of oxidation on surface under the protection of As atmosphere, and desorption process RHEED monitors.
The growth technique condition of InGaP layer is: the growth temperature of Ga is 1050 DEG C, and the growth temperature of In is 860 DEG C, PH3Cracking pressure be 650Torr, under this condition, the growth velocity of InGaP is 1.5 ��m/h, for different N type adulterate requirement, the doping temperature of Si is 1100 DEG C and 1070 DEG C; The component of InGaP ternary alloy is that the line by correcting In and Ga compares fIn//fGaRealize, wherein fIn/It is 23.2, fGaBeing 21.3, deviation is �� 5%, and adopts the mismatch between XRD determining epitaxial film and substrate to determine.
The growth technique condition of GaAs-InGaAs component-gradient layer is: the growth temperature of Ga is 1050 DEG C, and the growth temperature of In is 700-890 DEG C of gradual change, AsH3Cracking pressure be 650Torr, average production speed is 1.2 ��m/h; The growth of GaAs-InGaAs component-gradient layer is that the line by correcting In and Ga realizes, fInFor 0-16.4 alternation, fGaBeing 16.9, deviation is �� 5%, and adopts XRD to determine group part of material.
The growth technique condition of InGaAsCap layer is: the growth temperature of Ga is 1050 DEG C, and the growth temperature of In is 890 DEG C, AsH3Cracking pressure be 650Torr, growth velocity is 1.5 ��m/h; The component of InGaAsCap layer ternary alloy is that the line by correcting In and Ga compares fIn//fGa, fIn/It is 16.4, fGaBeing 16.9, deviation is �� 5%, and adopts the mismatch between XRD determining epitaxial film and substrate to determine.
Embodiment 2
It is shown in the design of material structure according to Fig. 2, the innovative point of the present invention is the problem spread when high temperature to solve beryllium (Be) as base district P-type dopant, structure design have employed and insert two layers of GaAs sealing coat in Ji Qu both sides, thus limit the diffusion of Be when high temperature. Although reducing the frequency response characteristic that base district thickness can improve device, but easily puncturing. The optimization design of 60��65nm it is designed to through base district, Integrated comparative constituency material. In doping, high doping content can improve frequency, but can reduce voltage breakdown equally, and through comparing, it is 3E19/cm that Ji Qu optimizes doping content3, thickness is 60nm.
Embodiment 3
According to, shown in Fig. 4, in figure, S is substrate peak, L is lattice mismatch �� a/a=-4.3 �� 10 of extension peak material-4, a is the lattice parameter of substrate material, and �� a is the difference of the lattice parameter of epitaxial material and substrate material. The peak width at half height (FWHM) of epitaxial film diffraction peak was 30.9 arc seconds.
According to, shown in Fig. 5, the peak width at half height of diffraction peak was 42 arc seconds, illustrate that InGaP/GaAsDHBT structured material all has good crystal mass. Can find out that the crystal mass of material is very good from test result, meet design requirement. As can be seen from Figure 6, each Rotating fields and interface are clear precipitous. Can also finding out from the distribution of Si and Be element, the structure of Impurity Distribution and design is very identical. Interface mutagenicity between collector region and base district, between Ji Qu and launch site is very good, it does not have the skew of p-n junction occurs. These results, also demonstrate the requirement that the DHBT material structure grown meets design completely.
Claims (8)
1. the structure of a GaAs based double hetero bipolar transistor design, it is characterised in that described structure is mixed collector region, sealing coat, Ji Qu, sealing coat, launch site, cap rock, gradual change cap rock and cap rock formed by the GaAs substrate of the half single throwing of insulation, buffer layer, collector region, height successively; Wherein,
1. on GaAs base DHBT material system is selected, utilize the ternary mixed crystal material of GaAs base Group III-V compound semiconductor and composition thereof, energy gap and lattice parameter is regulated by the method for adjustment group part composition, adopting the InGaP mated with GaAs material lattice as collector region and launch site material in DHBT designs, GaAs is as base district material;
2. have employed in structure design and respectively insert one layer of GaAs in Ji Qu both sides and isolate Spacer layer, to solve beryllium as the diffusion of base district P-type dopant when high temperature.
2. by structure according to claim 1, it is characterised in that:
1. half insulation single throwing GaAs substrate is (100);
2. cushioning layer material is the GaAs of Si doping, and thickness is 500-550nm, and dopant dose is 3-5E18/cm3;
3. collector region material is the InGaP of Si doping, and thickness is 500-550nm, and dopant dose is 3-5E16/cm3;
4. high collector region material of mixing is the InGaP that Si adulterates, and thickness is 5-7nm, and dopant dose is 2-3E19/cm3;
It is GaAs that ��Ji district respectively inserts both sides a floor insolated layer materials, and thickness is 5-7nm;
��Ji district material is the GaAs of Be doping, and thickness is 60-65nm, Be dopant dose is 2-3E19/cm3;
7. launch site material is the InGaP of Si doping, and thickness is 80-90nm, and dopant dose is 3-4E17/cm3;
8. cover material is the GaAs of Si doping, and thickness is 100-110nm, and dopant dose is 5-6E18/cm3;
9. gradual change cover material is by mixing SiGaAs gradual change to InGaAs; The dopant dose of Si and cap rock are 8. identical, and group part of In is gradient to x=0.5 from x=0;
10. topmost group part of cap rock In is 0.5, and the dopant dose of Si is 1-2E19/cm3��
3. by the structure described in claim 1 or 2, it is characterised in that base district doping content is 3E19/cm3; Base region layer thickness is 60nm.
4. prepare the method for structure as claimed in claim 1 or 2, it is characterised in that preparing GaAs base HBT material in employing gas source molecular beam epitaxy GSMBE technique, adopt Be as P Xing Ji district doping agent in preparation process, concrete preparation process is:
(1) GaAs (100) substrate is sent into the pretreatment chamber of gas source molecular beam epitaxy system GSMBE, in 300-350 DEG C of degasification 30 minutes;
(2) by above-mentioned substrate transfer to the growth room of GSMBE, by AsH3Carry out cracking in 1000 DEG C, obtain As2As As source, regulate gas source stove AH3Pressure PVIt is 450��700Torr;
(3) substrate grow under the protection of As atmosphere before surface desorption, underlayer temperature carries out epitaxy at 620 DEG C, and during growth, substrate rotates with every minute speed of 5 turns, to ensure the homogeneity of epitaxial material;
The growth technique condition of GaAs layer is: the growth temperature of Ga is 1050 DEG C, AsH3Cracking pressure be 650Torr, under this condition, the growth velocity of GaAs is 1 ��m/h, for N-type adulterate requirement, adopt Si doping temperature be 1250 DEG C, for P type adulterate requirement, adopt Be doping temperature be 890 DEG C;
The growth technique condition of InGaP layer is: the growth temperature of Ga is 1050 DEG C, and the growth temperature of In is 860 DEG C, PH3Cracking pressure be 650Torr, under this condition, the growth velocity of InGaP is 1.5 ��m/h, for different N type adulterate requirement, the doping temperature of Si is 1100 DEG C and 1070 DEG C;
The growth technique condition of GaAs-InGaAs component-gradient layer is: the growth temperature of Ga is 1050 DEG C, and the growth temperature of In is 700-890 DEG C of gradual change, AsH3Cracking pressure be 650Torr, average production speed is 1.2 ��m/h;
The growth technique condition of InGaAsCap layer is: the growth temperature of Ga is 1050 DEG C, and the growth temperature of In is 890 DEG C, AsH3Cracking pressure be 650Torr, growth velocity is 1.5 ��m/h.
5. by method according to claim 4; it is characterized in that the technique of the substrate surface desorb in step (3) is that GaAs substrate is heated to desorption temperature 680 DEG C��700 DEG C to remove the zone of oxidation on surface under the protection of As atmosphere, desorption process RHEED monitors.
6. by method according to claim 4, it is characterised in that in step (3), the component of InGaP ternary alloy is that the line by correcting In and Ga compares fIn//fGaRealize, wherein fInIt is 23.2, fGaBeing 21.3, deviation is �� 5%, and adopts the mismatch between XRD determining epitaxial film and substrate to determine.
7. by method according to claim 4, it is characterised in that the growth of the GaAs-InGaAs component-gradient layer in step (3) is that the ratio of the line by correcting In and Ga realizes, fInFor 0-16.4 alternation, fGaBeing 16.9, deviation is �� 5%, and adopts XRD to determine group part of material.
8. by method according to claim 4, it is characterised in that in step (3), the component of InGaAsCap layer ternary alloy is that the line by correcting In and Ga compares fIn//fGa, fIn/It is 16.4, fGaBeing 16.9, deviation is �� 5%, and adopts the mismatch between XRD determining epitaxial film and substrate to determine.
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