CN105610761B - A kind of spaceborne GMSK bit error rate improvement system based on the system-level constraint of application layer - Google Patents
A kind of spaceborne GMSK bit error rate improvement system based on the system-level constraint of application layer Download PDFInfo
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- CN105610761B CN105610761B CN201510945503.0A CN201510945503A CN105610761B CN 105610761 B CN105610761 B CN 105610761B CN 201510945503 A CN201510945503 A CN 201510945503A CN 105610761 B CN105610761 B CN 105610761B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
- H04L27/3845—Demodulator circuits; Receiver circuits using non - coherent demodulation, i.e. not using a phase synchronous carrier
- H04L27/3854—Demodulator circuits; Receiver circuits using non - coherent demodulation, i.e. not using a phase synchronous carrier using a non - coherent carrier, including systems with baseband correction for phase or frequency offset
- H04L27/3872—Compensation for phase rotation in the demodulated signal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/20—Modulator circuits; Transmitter circuits
- H04L27/2032—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner
- H04L27/2053—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases
- H04L27/2057—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases with a separate carrier for each phase state
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/22—Demodulator circuits; Receiver circuits
- H04L27/233—Demodulator circuits; Receiver circuits using non-coherent demodulation
- H04L27/2332—Demodulator circuits; Receiver circuits using non-coherent demodulation using a non-coherent carrier
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
- H04L27/3818—Demodulator circuits; Receiver circuits using coherent demodulation, i.e. using one or more nominally phase synchronous carriers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
- H04L27/3845—Demodulator circuits; Receiver circuits using non - coherent demodulation, i.e. not using a phase synchronous carrier
- H04L27/3854—Demodulator circuits; Receiver circuits using non - coherent demodulation, i.e. not using a phase synchronous carrier using a non - coherent carrier, including systems with baseband correction for phase or frequency offset
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Abstract
The invention discloses a kind of, and the spaceborne GMSK bit error rate based on the system-level constraint of application layer improves system, including AIS receiving antenna, AIS receiver, wherein AIS receiver includes: filter module, low noise amplification module, channelization block, carrier synchronization module, SNR detection module, carrier phase synchronization module, Viterbi demodulation module and application-layer authentication module;Spaceborne AIS system demodulates ground ais signal in order to normally receive, it is necessary to effectively solve two kinds of AIS message slot collision problem.The present invention minimizes the accumulation distance for receiving sequence actual symbol and adjudicating symbol according to prior information and CRC check information using improved Viterbi demodulating algorithm, reduces to understand under identical state of signal-to-noise and adjusts the bit error rate.Compared with traditional GMSK demodulating algorithm, the Viterbi-GMSK demodulating algorithm BER performance based on application layer message constraint has clear improvement, and in signal-to-noise ratio 10dB, BER reaches 10‑4Left and right.
Description
Technical field
The present invention relates to a kind of spaceborne GMSK bit error rate improving environments based on the system-level constraint of application layer, belong to modern logical
Believe design of satellites field.
Background technique
GMSK demodulation techniques are widely used in Modern communications satellites, reconnaissance spacecraft, ship automatic identification system (AIS)
Developed by naval vessel aircraft radio recognition equipment, cooperates global positioning system (GPS) by accommodation, ship's speed, rate of changing course and boat
To ships static datas such as equal Ship dynamic situations combination name of vessel, catchword, drinking water and dangerous cargos from VHF frequency range to Its Adjacent Waters ship
And base station broadcast, have very great help to safety of ship.
Ground AIS system, bank base station can only cover 40 nautical miles or so of distance, it is difficult to meet national economy to off-lying sea activity
Requirement.Satellite-based AIS system can cover wide sea area, extend the detectability to off-lying sea ship, meet big model
The marine vessel monitoring requirements enclosed.Currently, satellite AIS system is also in stage in verification experimental verification stage, used day both at home and abroad
Line technology and receiver technology are all fairly simple, right if receiver uses the GMSK demodulation techniques based on classical Viterbi algorithm
Low signal-to-noise ratio and space radio environmental inadequacies there are information collision.
Summary of the invention
Technology of the invention solves the problems, such as: in view of the deficiencies of the prior art, proposing a kind of system-level based on application layer
The spaceborne GMSK bit error rate of constraint improves system, can improve the bit error rate of AIS system, and then guarantee the AIS frame of different units
Interior slot synchronization.
Technical solution of the invention:
A kind of spaceborne GMSK bit error rate improvement system based on the system-level constraint of application layer, including spaceborne AIS antenna, AIS
Receiver;AIS receiver includes filter module, low noise amplification module, channelization block, AD conversion module, data buffering mould again
Block, carrier synchronization module, positioning synchronous module, carrier phase synchronization module, Viterbi demodulation module and application-layer authentication module;
The ais signal received is sent to AIS receiver by AIS receiving antenna;
Filter module, low noise amplification module, channelization block and AD conversion module in AIS receiver, by what is received
Ais signal carries out low noise amplification, analog filtering, AD conversion and DDC channelizing and is converted to zero intermediate frequency processing, and channelization block will
Zero intermediate frequency signals are sent to data buffering module and are cached;
Carrier synchronization module carries out carrier synchronization to the zero intermediate frequency digital signal cached in data buffer module and carrier wave is mended
Positioning synchronous module is sent to after repaying processing;
Positioning synchronous module and Phase synchronization module are timed synchronous and carry to the data after carrier synchronization resume module
Wave phase synchronization process, is then forwarded to Viterbi demodulation module and application-layer authentication module carries out demodulation process;
Viterbi demodulation module sends treated AIS to Phase synchronization module is received using GMSK modulation signal
Signal is demodulated;Application-layer authentication module completes the verifying of Viterbi demodulation module demodulating information symbol;
The specific implementation of Viterbi demodulation module and application-layer authentication module is as follows:
(31) constraint length, definition signal state and signal condition transfer matrix are set according to GMSK modulation signal characteristic;
(32) signal condition of+1 GMSK modulation signal of kth is calculated, k takes positive integer;
(33) measurement increment of k-th of GMSK modulation signal at+1 GMSK modulation signal of kth is calculated;
(34) more all path increments are chosen maximum path and are increased as survivor path, storing path information and path
Amount;
(35) step (31)-(34) are repeated, enter step (36) until k+1 is greater than constraint length;
(36) path backtracking is carried out by the survivor path that step (34) are selected, finds corresponding initial information symbol;
(37) to the symbol framing of demodulating information including initial information symbol, EOL mark of going forward side by side verifying, CRC
Check information verifying, if verification result correctly if bit demodulation finish, repeat (32)-(36) and carry out next GMSK modulation signal
Processing;If verification result mistake, using in step (34) maximum paths as survivor path, repeats step (36) and return
Demodulation of tracing back is verified correctly yet if secondary maximum path is as survivor path, then it is correct until verifying to find path.
The beneficial effect of the present invention compared with the existing technology is:
(1) improved Viterbi demodulation module is introduced into AIS satellite receiving system by the present invention, relative to differential ference spiral etc.
Conventional method, the present invention can dynamic realtime cook up survivor path, improve data demodulation efficiency, and then improve satellite AIS
The working efficiency of system, ensure that reliability, it is often more important that the method for the present invention is simple and easy, general relatively strong.
(2) the Viterbi demodulation module that the present invention uses is realized by setting constraint length, passes through improved Viterbi solution
Algorithm is adjusted to minimize the accumulation distance for receiving sequence actual symbol and adjudicating symbol according to prior information and CRC check information, when
Maximal survivor paths can be demodulated, in identical state of signal-to-noise there are when problem using the backup path in planning path
Lower reduction, which understands, adjusts the bit error rate, compared with traditional GMSK demodulating algorithm, the Viterbi-GMSK based on application layer message constraint
Demodulating algorithm BER performance has clear improvement, and in signal-to-noise ratio 10dB, BER reaches 10-4Left and right, the invention belongs to initiate both at home and abroad.
Detailed description of the invention
Fig. 1 be the invention solves I type message transition collision schematic diagram;
Fig. 2 be the invention solves II type message transition collision schematic diagram;
Fig. 3 is present system composition schematic diagram;
Fig. 4 is GMSK demodulating algorithm performance simulation figure of the present invention;
Fig. 5 is GMSK bit error rate performance simulation curve of the present invention.
Specific embodiment
The working principle of the invention and system composition are further explained and are illustrated with reference to the accompanying drawing.
Current satellite AIS system advantage is wide coverage, solves the ground network AIS coverage problems.But
UTC (unified time) SOTDMA technology that satellite AIS system uses solves only inside this unit of ground between difference AIS movement station
Slot allocation problem and time-synchronizing communication problem;Difference SOTDMA in the footprint received for satellite AIS system
The ais signal of unit, time slot does not have synchronization mechanism in the AIS frame of these different units, there is overlapping or part weight in time-domain
Folded conflict influences the acquisition of satellite AIS system normal information.Satellite AIS system is primarily present following AIS message collision problem:
(1) message transition collision type I
As shown in Figure 1, the AIS transmitter of difference SOTDMA unit emits in the same slot time.
For satellite AIS system, the coverage area of satellite is much larger than the overlay area of SOTDMA unit, and spaceborne AIS is received
The information that chance receives the ship in different SOTDMA unit coverage areas while sending.Obviously, collision probability determines
In ships quantity in satellite effective coverage range and building berth facility information reporting rates.
(2) message transition collision Type II
As shown in Fig. 2, different SOTDMA unit AIS transmitters are sent out in different time-gap due to satellite reception wide coverage
It penetrates after the different distance propagation delay time in satellite AIS system receiving terminal while reaching, generate conflict.
For ground AIS system, the corresponding different ship informations of two neighboring time slot transmit maximum phase in SOTDMA unit
It is 2ms to time delay.And for satellite AIS system, the transmission range between satellite and ship is much larger than 202 nautical miles, leads to difference
Relative transport time delay in SOTDMA unit between ship is greater than 2ms, causes in different SOTDMA units information between different time-gap
Arrival time overlapping.
Therefore, spaceborne AIS system is in order to normally receiving demodulation ais signal, it is necessary to effectively solve the above two class AIS time slots
Collision problem.The present invention mainly carries out the work in terms of receiver, proposes a kind of novel based on the system-level constraint of application layer
Spaceborne GMSK bit error rate ameliorative way.
As shown in figure 3, a kind of spaceborne GMSK bit error rate based on the system-level constraint of application layer improves system, including spaceborne
AIS antenna, AIS receiver;AIS receiver include again filter module, low noise amplification module, channelization block, AD conversion module,
Data buffering module, carrier synchronization module, positioning synchronous module, carrier phase synchronization module, Viterbi demodulation module and application
Layer authentication module;
The ais signal received is sent to AIS receiver by AIS receiving antenna;
Filter module, low noise amplification module, channelization block and AD conversion module in AIS receiver, by what is received
Ais signal carries out low noise amplification, analog filtering, AD conversion and DDC channelizing and is converted to zero intermediate frequency processing, and channelization block will
Zero intermediate frequency signals are sent to data buffering module and are cached;
Carrier synchronization module carries out carrier synchronization to the zero intermediate frequency digital signal cached in data buffer module and carrier wave is mended
Positioning synchronous module is sent to after repaying processing;The purpose of carrier synchronization makes receiver demodulator needed for receiver end obtains
Carrier information removes interference of the carrier wave garbage to demodulator.This patent carrier auxiliary does not need auxiliary data when realizing, leads to
The mode for crossing the open loop of quadratic loop method realizes carrier synchronization;
Positioning synchronous module and Phase synchronization module are timed synchronous and carry to the data after carrier synchronization resume module
Wave phase synchronization process, is then forwarded to Viterbi demodulation module and application-layer authentication module carries out demodulation process;Timing Synchronization
Purpose be to obtain optimum sampling moment of GMSK to be completed at the same time the extraction of sampled data;Timing Synchronization of the present invention does not need to assist
Data complete each input symbol time phase equivocation by fourth order cumulant nonlinear method, when according to symbol sampler
Carve estimation output respective value.By the value demodulator, completion timing is synchronous in the way of controlling with feedback oscillator.Carrier wave
Carrier phase residual error interferes Demodulation Systems bring after Phase synchronization completes carrier synchronization, by certain observation length when realization
The symbol of degree series carries out phase Estimation of Mean and compensation using 2P- power method;
Viterbi demodulation module sends treated AIS to Phase synchronization module is received using GMSK modulation signal
Signal is demodulated;Application-layer authentication module completes the verifying of Viterbi demodulation module demodulating information symbol;
The specific implementation of Viterbi demodulation module and application-layer authentication module is as follows:
(31) constraint length, definition signal state and signal condition transfer matrix are set according to GMSK modulation signal characteristic;
(32) signal condition of+1 GMSK modulation signal of kth is calculated, k takes positive integer;
(33) measurement increment of k-th of GMSK modulation signal at+1 GMSK modulation signal of kth is calculated;
(34) more all path increments are chosen maximum path and are increased as survivor path, storing path information and path
Amount;
(35) step (31)-(34) are repeated, enter step (36) until k+1 is greater than constraint length;
(36) path backtracking is carried out by the survivor path that step (34) are selected, finds corresponding initial information symbol;
(37) to the symbol framing of demodulating information including initial information symbol, EOL mark of going forward side by side verifying, CRC
Check information verifying, if verification result correctly if bit demodulation finish, repeat (32)-(36) and carry out next GMSK modulation signal
Processing;If verification result mistake, using in step (34) maximum paths as survivor path, repeats step (36) and return
Demodulation of tracing back is verified correctly yet if secondary maximum path is as survivor path, then it is correct until verifying to find path.
The present invention is led to by the SIMULINK of Matlab first when realizing spaceborne AIS system GMSK demodulator design
Letter tool box is built system and is emulated to core demodulating algorithm, and system risk is reduced.It is assumed that 161.975 or 162.025MHz
Ais signal carry out base band signal process and demodulation after being down-converted to zero intermediate frequency, consider Timing Synchronization, carrier synchronization, load
Wave phase is synchronous and the GMSK demodulator based on Viterbi, each module composition of analogue system are as shown in Figure 4.
GMSK signal is a kind of typical CPM (permanent envelope) signal, passes through the demodulation of Maximum likelihood sequence detection (MLSD)
Method can obtain the optimal error performance under AWGN (additive white Gaussian noise) channel, and Viterbi algorithm is to execute maximum seemingly
The optimization algorithm of right Sequence Detection.PAM (pulse width is carried out to CPM signal by Laurent decomposition method when the present invention realizes
Degree modulation) it decomposes, it takes preceding 4 pulse components after decomposing to carry out Viterbi and is calculated apart from cost, remain 99.1944% symbol
Number gross energy is simultaneously because reducing the demands such as a large amount of matched filters and substantially reducing demodulation computational complexity.
By using the related prior information in AIS message in Viterbi demodulator: fixed data, the speed of ship
With position physical characteristic, message periodicity, ship ID etc., variate-value or change in viterbi algorithm correlated variables register are constrained
Change range, bit-errors caused by correcting because of transmission, so as to improve GMSK demodulator BER or PER.
It is as follows: when algorithm optimization using constraint
Viterbi algorithm constrains general information table
Experimental result
The improved Viterbi demodulating algorithm that this patent proposes minimizes Receiving Order according to prior information and CRC check information
Column actual symbol and judgement symbol accumulation distance reduce to understand under identical state of signal-to-noise and adjust the bit error rate.As shown in figure 5, giving
Go out traditional GMSK demodulating algorithm and the Viterbi-GMSK demodulating algorithm BER performance based on application layer message constraint, it can be with
Find out, the algorithm performance of this patent has clear improvement compared with traditional algorithm, and in signal-to-noise ratio 10dB, this patent method BER reaches
To 10-4Left and right.
The present invention is main with National Maritime Bureau " spaceborne AIS load key technology research and its demonstration and verification system research "
Background, solves the watercraft AISs signal problems such as satellite reception sea, river, and watercraft AIS system mainly uses GMSK modulation side
Formula, SOTDMA communication mode carry out data communication.The present invention has already passed through demonstration and verifying, works well.
The undocumented part of the present invention is general knowledge known in this field.
Claims (2)
1. a kind of spaceborne GMSK bit error rate based on the system-level constraint of application layer improves system, it is characterised in that including spaceborne AIS
Antenna, AIS receiver;AIS receiver includes filter module, low noise amplification module, channelization block, AD conversion module, number again
According to buffer module, carrier synchronization module, positioning synchronous module, carrier phase synchronization module, Viterbi demodulation module and application layer
Authentication module;
The ais signal received is sent to AIS receiver by AIS receiving antenna;
Filter module, low noise amplification module, channelization block and AD conversion module in AIS receiver believe the AIS received
Number carry out low noise amplification, analog filtering, AD conversion and DDC channelizing are converted to zero intermediate frequency processing, channelization block will be in zero
Frequency signal is sent to data buffering module and is cached;
Carrier synchronization module carries out at carrier synchronization and carrier compensation the zero intermediate frequency digital signal cached in data buffer module
Positioning synchronous module is sent to after reason;
Positioning synchronous module and carrier phase synchronization module are timed synchronous and carry to the data after carrier synchronization resume module
Wave phase synchronization process, is then forwarded to Viterbi demodulation module and application-layer authentication module carries out demodulation process;
Viterbi demodulation module sends treated AIS to carrier phase synchronization module is received using GMSK modulation signal
Signal is demodulated;Application-layer authentication module completes the verifying of Viterbi demodulation module demodulating information symbol;
The specific implementation of Viterbi demodulation module and application-layer authentication module is as follows:
(31) constraint length, definition signal state and signal condition transfer matrix are set according to GMSK modulation signal characteristic;
(32) signal condition of+1 GMSK modulation signal of kth is calculated, k takes positive integer;
(33) path increment of k-th of GMSK modulation signal at+1 GMSK modulation signal of kth is calculated;
(34) more all path increments choose maximum path as survivor path, storing path information and path increment;
(35) step (31)-(34) are repeated, enter step (36) until k+1 is greater than constraint length;
(36) path backtracking is carried out by the survivor path that step (34) are selected, finds corresponding initial information symbol;
(37) to the symbol framing of demodulating information including initial information symbol, EOL mark of going forward side by side verifying, CRC check
Information Authentication, if verification result correctly if bit demodulation finish, repeat the place that (32)-(36) carry out next GMSK modulation signal
Reason;If verification result mistake, using in step (34) maximum paths as survivor path, repeat step (36) backtracking solution
It adjusts, if secondary maximum path is as survivor path, verifying is not correct yet, then it is correct until verifying to find path.
2. a kind of spaceborne GMSK bit error rate based on the system-level constraint of application layer according to claim 1 improves system,
Be characterized in that: backtracking constraint length takes 9bit in step (36).
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CN106230496B (en) * | 2016-08-03 | 2019-05-07 | 上海交通大学 | Spaceborne AIS receiver demodulation method based on soft output Viterbi demodulating algorithm |
CN106788668A (en) * | 2016-11-22 | 2017-05-31 | 中船航海科技有限责任公司 | A kind of boat-carrying Big Dipper AIS combines reception system |
CN107066693B (en) * | 2017-03-14 | 2020-06-02 | 长沙鼎端电子技术有限公司 | Multichannel multi-target satellite-borne AIS reconnaissance signal simulation system |
CN107395267A (en) * | 2017-08-28 | 2017-11-24 | 王洋 | A kind of AIS multiple antennas multi channel signals simulator |
CN112152758B (en) * | 2020-10-10 | 2023-05-26 | 交通运输部规划研究院 | Navigation communication method and device |
CN112532554B (en) * | 2020-10-29 | 2022-10-28 | 西安空间无线电技术研究所 | One-step backtracking method for Viterbi demodulation of GMSK system |
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