CN102025452B - Miniature variable rate communication module based on system on chip (SOC) and radio frequency integrated circuit (RFIC), and communication method - Google Patents
Miniature variable rate communication module based on system on chip (SOC) and radio frequency integrated circuit (RFIC), and communication method Download PDFInfo
- Publication number
- CN102025452B CN102025452B CN2010105911953A CN201010591195A CN102025452B CN 102025452 B CN102025452 B CN 102025452B CN 2010105911953 A CN2010105911953 A CN 2010105911953A CN 201010591195 A CN201010591195 A CN 201010591195A CN 102025452 B CN102025452 B CN 102025452B
- Authority
- CN
- China
- Prior art keywords
- data
- communication module
- variable rate
- module
- bit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
The invention discloses a miniature variable rate communication module based on a system on chip (SOC) and a radio frequency integrated circuit (RFIC), and a communication method, which belong to the field of space application and aim to solve the problem that the reliability and effectiveness of communication among conventional formation flying satellites cannot be ensured. The variable rate communication module provided by the invention comprises a low-noise amplifier and power amplification module, the radio frequency integrated circuit and an SOC processor. In the module-based communication method, the communication module serving as a transmitter works in a direct mode, and encodes transmitted data according to Manchester codes; the communication module serving as a receiver works in the direct mode; the transmitter transmits the data by calculating the repeat count N0 of each bit according to a bit rate required by the communication and the highest bit rate, modulating each bit, transmitting each bit for N0 times and transmitting the next bit until the transmission of the data of the whole frame is finished; and the receiver receives the data by the steps of demodulation, preprocessing and bit synchronization to obtain the data the same as that of the receiver.
Description
Technical field
The present invention relates to a kind of miniature variable Rate communication module and communication means, belong to the AEROSPACE APPLICATION field based on SOC and RFIC.
Background technology
Small Satellite Formation Flying is a brand-new field of studying both at home and abroad at present, and many Small Satellite Formation Flying are carried out space tasks jointly, accomplishes the task that single large satellite is accomplished, and can improve the interference free performance and the anti-lethality of system widely.In the formation flight process, in order to effectively utilize each moonlet, must set up communication reliably between each microsatellite to accomplish complicated space mission, make multi-satellite form reliable space communication network through inter-satellite link.At present; For reliability and the validity that guarantees to communicate by letter, validity is high when interstellar distance is nearer, again can reliable communication when distance is far away; Can adopt the variable Rate communication plan: when interstellar distance is far away; Adopt low communication speed to communicate, little information such as interaction mode only between star guarantees the reliability of communication; When interstellar distance is nearer, need carry out formation flight, star information interaction amount is bigger, then carries out high bit rate communication, guarantees the validity of communication.For variable Rate communication, only have at present in the satellite of SURREY university development, change the scheme that the length of communication frame communicates according to the elevation angle; Because thereby the relative motion between star has caused Doppler effect to cause the error code that receives; And both at home and abroad at present transmission and reception carriers of adopting utilize phase-locked loop lock mode mutually to suppress Doppler effect more; Complex equipments and involving great expense is not suitable for being applied to microsatellite.
Summary of the invention
The present invention seeks to guarantee reliability and validity problem, a kind of miniature variable Rate communication module and communication means based on SOC and RFIC is provided for the intersatellite communication that solves existing formation flight.
A kind of miniature variable Rate communication module according to the invention based on SOC and RFIC; It comprises low noise amplifier and power amplifier module, RF IC and SOC processor; The data/address bus of SOC processor is connected with system bus; The radio communication port of SOC processor links to each other with the data communication end of RF IC, and the signal reception of RF IC links to each other with antenna with low noise amplifier and power amplifier module with transmitting terminal.
Communication means based on above-mentioned module: the mode of operation as the communication module of transmitting terminal is a Direct Model, and encodes by Manchester code to sending data, is Direct Model as the operational module of receiving terminal,
The data transmission process of transmitting terminal is:
Need bit rate and the highest bit rate to calculate the number of repetition N of each according to signal post
0, with each modulation and transmission N
0After inferior, the next bit of redispatching sends completion until whole frame data;
The DRP data reception process of receiving terminal is:
Advantage of the present invention: the scheme of designing chnnel coding changes the bit rate of communication; Through the waveform broadening being reduced the error rate of reception; Simultaneously, the scheme that receiving terminal is repeatedly made even equal receives data, has guaranteed the signal to noise ratio that receives; Adopt a kind of new digital phase-locked loop to make reception data and clock lock on transmitting terminal simultaneously, can effectively improve the error code that Doppler effect and frequency drift cause.
The transmitting terminal data are encoded by Manchester code, have caused redundant increase because the Hamming distance of intersymbol has increased, thereby have further improved the reliability of communication.
Description of drawings
Fig. 1 is apparatus of the present invention structural representations;
Fig. 2 is that transmitting terminal sends digital coding figure;
Fig. 3 is a receiving terminal Principle of Process block diagram;
Fig. 4 is the preprocessing process theory diagram;
Fig. 5 is the clock regeneration theory diagram;
Fig. 6 is the data reproduction theory diagram;
Fig. 7 sends long 0 o'clock error coded figure.
Embodiment
Embodiment one: this execution mode is described below in conjunction with Fig. 1; The said a kind of miniature variable Rate communication module of this execution mode based on SOC and RFIC; It comprises low noise amplifier and power amplifier module 1, RF IC 2 and SOC processor 3; The radio communication port of SOC processor 3 links to each other with the data communication end of RF IC 2, and the signal reception of RF IC 2 links to each other with antenna with low noise amplifier and power amplifier module 1 with transmitting terminal.
RF IC 2 (RFIC) is integrated by transmitter module and receiver module, and the core devices of transmitter module and receiver module all adopts the nRF2401 radio frequency chip.
The external interface expanded of SOC processor 3 comprises CAN EBI, 485 EBIs, A/D translation interface, D/A translation interface, OC interface and radio communication interface.
The said module application of this execution mode is when spaceborne computer, and the data/address bus of the SOC processor 3 in the module is connected with system bus.
Embodiment two: this execution mode is described below in conjunction with Fig. 2 to Fig. 7; Communication means based on the described a kind of miniature variable Rate communication module based on SOC and RFIC of execution mode one; The miniature variable Rate communication module based on SOC and RFIC that execution mode one provides is a spacecraft Miniaturized Communications platform, and it is little to have weight, and volume is little; High functional density; The method that the characteristic that can adapt to the formation flight environment, this execution mode provide is to utilize SOC and RFIC technology, can select different traffic rates according to different communication distances; Certain correction is carried out in the bit rate drift that can cause Doppler effect and interference and wrong, increases the reliability of communication greatly; And have standardized communication interface, but the adaptive different moonlets in fast and flexible ground are realized integrated towards the flexibility of aerial mission; Advantage with mass production, low cost and the short period that can realize the minitype spacecraft development; Have communication function between star efficiently, can realize distributed SPACE APPLICATION neatly, greatly reduced the volume of communication equipment between star, strengthened the communication validity and the reliability of communication equipment between traditional star.
Mode of operation as the communication module of transmitting terminal is a Direct Model, and encodes by Manchester code to sending data, is Direct Model as the operational module of receiving terminal,
The data transmission process of transmitting terminal is:
Need bit rate and the highest bit rate to calculate the number of repetition N of each according to signal post
0, with each modulation and transmission N
0After inferior, the next bit of redispatching sends completion until whole frame data;
The DRP data reception process of receiving terminal is:
Under Direct Model, change the bit rate of communication, through the waveform broadening being reduced the error rate of reception through the mode of channel coding/decoding.
At receiving terminal, need the data behind the coding are carried out demodulation, preliminary treatment and bit synchronization, obtain the data identical with transmitting terminal.Wherein, the demodulation of radiofrequency signal is accomplished by the nRF2401 chip automatically, and the decoding that preprocessing process and bit synchronization process are used for the base band data of the duplication code form after the demodulation reaches synchronously, and the bit synchronization process comprises clock regeneration and data reproduction.The receiving terminal theory diagram is as shown in Figure 3.
The data of step 2 after to demodulation are carried out pretreated process and are:
Step 21, sample 1 μ s≤T≤1ms according to the data of cycle T after to demodulation;
Step 22, the data that sampling is obtained are equally divided into 2～5 districts;
Step 23, the data that each district is interior are averaged;
Step 24, the average data in each district is stored, accomplish preprocessing process.
The theory diagram of above-mentioned preprocessing process is as shown in Figure 4; Need the data after the demodulation were sampled according to certain cycle; And the data after will sampling are carried out piecemeal according to communications codes speed; The data of adopting in the time with each bit are made even every district data all after being divided into three data fields, 3 binary number displacements after making even are all deposited in 8 bit shift register treat subsequent treatment.
The bit synchronization of step 3 is handled and is comprised clock regeneration and two processes of data reproduction, and the clock signal that the clock regeneration process produces is used for the sampling clock pulse of data reproduction,
The clock regeneration process is:
Step 31, pretreated data are carried out digital filtering handle;
Step 32, filtered data are carried out the edge detect;
Step 33, the data after detecting are carried out the lead-lag phase discrimination processing;
Export to simultaneously after step 34, step 33 phase discrimination processing and add/subtract, be used for the input signal of lead-lag phase discrimination processing then through feedback behind the voltage controlled oscillator along the formula low-pass filtering treatment; Simultaneously, the clock pulse that forms after the phase discrimination processing is used for the sampling clock pulse of data reproduction;
The clock regeneration module is locked on the input clock receiving terminal local clock, make transmitting-receiving frequency that deviation arranged or when Doppler frequency shift is arranged receiver still can keep synchronous with transmitter.The clock regeneration module is made up of wave digital lowpass filter, edge detection module and digital phase-locked loop, and theory diagram is as shown in Figure 5.
Digital filtering is handled the smoothing filter completion of adopting 3 in the step 31.Data in the eight bit register after the preliminary treatment are carried out filtering, and filtered data are carried out the edge detect, obtain the trip point of data, adjust local clock with trip point.
The lead-lag phase demodulation, add/subtract along formula LPF and VCO and formed digital phase-locked loop jointly; The lead-lag phase demodulation adopts phase discriminator to accomplish; Add/subtract along the formula LPF and adopt low pass filter to accomplish, VCO adopts voltage controlled oscillator (DCO) to accomplish;
The course of work that digital phase-locked loop is accomplished clock synchronization is: whether the phase difference of phase discriminator judgment data trip point and local clock is greater than π; If greater than; Then make leading 2 π of voltage controlled oscillator clock/3 through output control signal behind the low pass filter; 2 π/3 otherwise control voltage controlled oscillator clock lags behind are locked on the input signal phase place when making local voltage controlled oscillator, accomplish clock synchronously.
The data reproduction process is:
Sampling clock pulse according to clock regeneration generates is sampled to pretreated data, and the principle of sampling is: three bit data in the middle of the eight bit register after the preliminary treatment are averaged, as the data after the regeneration.As shown in Figure 6.
For the signal of 0-1 saltus step, the correction effect is best, referring to Fig. 7; When existing long 01 the time, can produce mistake when producing frequency drift in the data, see Fig. 8 with long; When sending 15 0, the data that receive are always 00000000, are 0 so can adjudicate; Move 3, can adjudicate into 20 0, will make a mistake like this.
In the data of transmission, length 0 occurs with long by 1, we adopt Methods for Coding that the data volume is Manchester code, and promptly 0 volume is 01; 1 volume is 10; Each bit signal self will produce saltus step like this, has avoided sending the situation of length 0 and length 1, not only can address the above problem; And since the Hamming distance of intersymbol increased and caused redundant increase, thereby further improved the reliability of communication.
Claims (7)
1. communication means based on miniature variable Rate communication module; The related miniature variable Rate communication module of this method is based on SOC and RFIC's; Said miniature variable Rate communication module comprises low-noise amplifier and power amplifier module (1), RF IC (2) and SOC processor (3); The radio communication port of SOC processor (3) links to each other with the data communication end of RF IC (2); The signal reception of RF IC (2) links to each other with antenna with low-noise amplifier and power amplifier module (1) with transmitting terminal
It is characterized in that, be Direct Model as the mode of operation of the communication module of transmitting terminal, and encode by Manchester code to sending data, is Direct Model as the operational module of receiving terminal,
The data transmission process of transmitting terminal is:
Need bit rate and the highest bit rate to calculate the number of repetition N of each according to signal post
0, with each modulation and transmission N
0After inferior, the next bit of redispatching sends completion until whole frame data;
The DRP data reception process of receiving terminal is:
Step 1, the data that receive are carried out demodulation;
Step 2, the data after the demodulation are carried out preliminary treatment;
Step 3, pretreated data carried out bit synchronization handle, accomplish, obtain the data identical with transmitting terminal to receiving the decoding of data,
Said bit synchronization is handled and is comprised clock regeneration and two processes of data reproduction, and the clock signal that the clock regeneration process produces is used for the sampling clock pulse of data reproduction,
The clock regeneration process is:
Step 31, pretreated data are carried out digital filtering handle;
Step 32, filtered data are carried out the edge detect;
Step 33, the data after detecting are carried out the lead-lag phase discrimination processing;
Export to after step 34, step 33 phase discrimination processing and add/subtract, be used for the input signal of lead-lag phase discrimination processing then through feedback behind the voltage controlled oscillator along the formula low-pass filtering treatment; Simultaneously, the clock pulse that forms after the phase discrimination processing is used for the sampling clock pulse of data reproduction.
2. a kind of communication means based on miniature variable Rate communication module according to claim 1 is characterized in that, the data of step 2 after to demodulation are carried out pretreated process and are:
Step 21, sample 1 μ s≤T≤1ms according to the data of cycle T after to demodulation;
Step 22, the data that sampling is obtained are equally divided into 2～5 districts;
Step 23, the data that each district is interior are averaged;
Step 24, the average data in each district is stored, accomplish preprocessing process.
3. a kind of communication means based on miniature variable Rate communication module according to claim 1 is characterized in that, digital filtering is handled the smoothing filter completion of adopting 3 in the step 31.
4. a kind of communication means according to claim 1 based on miniature variable Rate communication module; It is characterized in that; The lead-lag phase demodulation, add/subtract along formula LPF and VCO and formed digital phase-locked loop jointly; The lead-lag phase demodulation adopts phase discriminator to accomplish, and adds/subtract along the formula LPF to adopt low pass filter to accomplish, and VCO adopts voltage controlled oscillator to accomplish;
The course of work that digital phase-locked loop is accomplished clock synchronization is: whether the phase difference of phase discriminator judgment data trip point and local clock is greater than π; If greater than; Then make leading 2 π of voltage controlled oscillator clock/3 through output control signal behind the low pass filter; 2 π/3 otherwise control voltage controlled oscillator clock lags behind are locked on the input signal phase place local voltage controlled oscillator, accomplish the synchronous of clock.
5. a kind of communication means based on miniature variable Rate communication module according to claim 1 is characterized in that, SOC processor (3) adopts C8051F040 model single-chip microcomputer.
6. a kind of communication means according to claim 1 based on miniature variable Rate communication module; It is characterized in that; RF IC (2) is integrated by transmitter module and receiver module, and the core devices of transmitter module and receiver module all adopts the nRF2401 radio frequency chip.
7. a kind of communication means according to claim 1 based on miniature variable Rate communication module; It is characterized in that the external interface expanded of SOC processor (3) comprises CAN EBI, 485 EBIs, A/D translation interface, D/A translation interface, OC interface and radio communication interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010105911953A CN102025452B (en) | 2010-12-16 | 2010-12-16 | Miniature variable rate communication module based on system on chip (SOC) and radio frequency integrated circuit (RFIC), and communication method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010105911953A CN102025452B (en) | 2010-12-16 | 2010-12-16 | Miniature variable rate communication module based on system on chip (SOC) and radio frequency integrated circuit (RFIC), and communication method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102025452A CN102025452A (en) | 2011-04-20 |
| CN102025452B true CN102025452B (en) | 2012-07-04 |
Family
ID=43866367
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010105911953A Expired - Fee Related CN102025452B (en) | 2010-12-16 | 2010-12-16 | Miniature variable rate communication module based on system on chip (SOC) and radio frequency integrated circuit (RFIC), and communication method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102025452B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU2015149619A (en) * | 2013-04-19 | 2017-05-24 | Филипс Лайтинг Холдинг Б.В. | RESTORING SYNCHRONIZATION FROM A SELF-SYNCHRONIZING CODED LIGHT SIGNAL |
| CN115623366B (en) * | 2022-12-15 | 2023-03-10 | 鹏城实验室 | Route wavelength distribution method, device, terminal and medium of satellite all-optical network |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101083523A (en) * | 2007-07-27 | 2007-12-05 | 华南理工大学 | Method for realizing integrated time stamp clock synchronous phase-locked loop |
-
2010
- 2010-12-16 CN CN2010105911953A patent/CN102025452B/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101083523A (en) * | 2007-07-27 | 2007-12-05 | 华南理工大学 | Method for realizing integrated time stamp clock synchronous phase-locked loop |
Non-Patent Citations (2)
| Title |
|---|
| 董立珉."变速率星间射频通信的设计与实现".《哈尔滨工业大学工学硕士学位论文》.2008,第2.2-2.4节、第3.4-3.5节、第4.3，附图2-1、2-3. |
| 董立珉."变速率星间射频通信的设计与实现".《哈尔滨工业大学工学硕士学位论文》.2008,第2.2-2.4节、第3.4-3.5节、第4.3,附图2-1、2-3. * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102025452A (en) | 2011-04-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10742462B2 (en) | BPSK demodulation | |
| CN108199761B (en) | USB transponder baseband digitization method | |
| CN103248593B (en) | Offset estimation and removing method and system | |
| CN103269220A (en) | Clock recovery circuit through NFC active load modulation based on digital phase-locked loop | |
| CN102725970A (en) | Automatic identification system receiver and satellite payload comprising the same | |
| CN106789787B (en) | A kind of PCM/DPSK/FM modulation /demodulation module and method | |
| CN107124219A (en) | Solution and system that a kind of depopulated helicopter satellite communication is blocked by rotor | |
| CN102684653A (en) | Digital synchronous pulse wireless low-jitter transmission method | |
| CN102025452B (en) | Miniature variable rate communication module based on system on chip (SOC) and radio frequency integrated circuit (RFIC), and communication method | |
| CN113381778A (en) | Polarization diversity signal receiving method based on FPGA | |
| CN101795250B (en) | Demodulation method and device of D8PSK (differential 8-ary phase shift keying) modulation signals of VDL (VHF (very high frequency) digital link) communication system | |
| CN108462523B (en) | General digital USB responder baseband software design method | |
| CN105471788B (en) | A kind of low time delay decomposition method and device to DVBS2 signals | |
| CN104579530A (en) | High-accuracy time unification and communication integrated device | |
| CN102447517B (en) | Lock detection method suitable for various modulation modes | |
| CN102333064B (en) | High-order quadrature amplitude modulation (QAM) carrier synchronization method based on coding and pilot frequency joint assistance | |
| CN106130941A (en) | A kind of multi tate shelves adaptive de adjusting system for residual carrier modulation | |
| CN104393911B (en) | A kind of air-ground narrow-band communication system and its method for unmanned plane | |
| CN106341199B (en) | A kind of signal-to-noise ratio based on Manchester code determines method | |
| CN102316058B (en) | Coherent demodulation device of non-geostationary orbit satellite DQPSK (Differential Quadrature Phase Shift Keying) communication | |
| CN105407067A (en) | Recovery method of coherent carrier wave and timing of burst mode GMSK | |
| CN103650356A (en) | Systems and methods for transceiver communication | |
| CN203759710U (en) | Radio frequency identification card reader chip | |
| CN104483682A (en) | S-wave band uniform measuring and control system, sidetone extraction module thereof and distance measuring tone forwarding method | |
| CN106027442B (en) | Modem based on scattered pilot |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C53 | Correction of patent for invention or patent application | ||
| CB03 | Change of inventor or designer information |
Inventor after: Dong Limin Inventor after: Xu Guodong Inventor after: Cao Xibin Inventor after: Shi Li Inventor after: Cao Xinghui Inventor after: Li Huayi Inventor after: Lin Xiaohui Inventor after: Chen Jian Inventor before: Dong Limin Inventor before: Xu Guodong Inventor before: Shi Li Inventor before: Cao Xinghui Inventor before: Li Huayi |
|
| COR | Change of bibliographic data |
Free format text: CORRECT: INVENTOR; FROM: DONG LIMIN XU GUODONG SHI LI CAO XINGHUI LI HUAYI TO: DONG LIMIN XU GUODONG CAO XIBIN SHI LI CAO XINGHUI LI HUAYI LIN XIAOHUI CHEN JIAN |
|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120704 Termination date: 20131216 |