CN105575318A - Display panel and display apparatus - Google Patents
Display panel and display apparatus Download PDFInfo
- Publication number
- CN105575318A CN105575318A CN201610159278.2A CN201610159278A CN105575318A CN 105575318 A CN105575318 A CN 105575318A CN 201610159278 A CN201610159278 A CN 201610159278A CN 105575318 A CN105575318 A CN 105575318A
- Authority
- CN
- China
- Prior art keywords
- signal
- display panel
- output terminal
- module
- node
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a display panel and a display apparatus. The display panel comprises a plurality of cascaded shifting register units used for inputting grid scanning signals to a corresponding grid line. Each adjacent two columns of pixels form one group. One data line is arranged between the two columns of pixels in each group of pixels. Each shifting register unit comprises a plurality of modules. Each module is located at a gap between the adjacent two groups of pixels. The two columns of pixels share one data line. Therefore, the number of the data lines can be halved. The vacant space can be provided with each shifting register units used for driving the display panel to realize grid driving scanning. A grid driving circuit is arranged in a display area of the display panel. A shape and a frame of the display panel provided in an embodiment of the invention are not limited by a peripheral circuit. A narrow frame and special display can be realized so that an application scope of the display panel is expanded to the special display of an automobile circle instrument panel and the like from a mobile phone, a Pad and the like.
Description
Technical field
The present invention relates to display technique field, particularly relate to a kind of display panel and display device.
Background technology
At present, display technique is widely used in the display of TV, mobile phone and public information, and the display panel for display frame is also varied, and can show colourful picture.Usually, source drive chip in display panel is responsible for receiving view data, and the conversion to simulating signal of buffer memory and digital signal is carried out to view data, signal the most at last after conversion is transported to the pieces of data line of display panel by output buffer, gate driver circuit is responsible for realization and is lined by line scan, the grid line sweep signal opened line by line is produced for sequential control, control pixel switch after the grid line sweep signal of every a line being loaded into corresponding grid line to open, make view data enter the memory capacitance of this one-row pixels, finally realize the normal display of image.
At present, the gate driver circuit built by thin film transistor (TFT) is generally the neighboring area being placed on the display panel left and right sides, and because gate driver circuit occupies certain frame region, therefore display panel cannot realize narrow frame design.Especially in large-sized display panel, the size of each components and parts of gate driver circuit is comparatively large, and gate driver circuit is placed on the neighboring area of display panel, and the frame region taken is comparatively large, causes middle large scale display panel cannot realize narrow frame.
Therefore, how realizing the narrow frame design of display panel, is those skilled in the art's technical matterss urgently to be resolved hurrily.
Summary of the invention
Embodiments provide a kind of display panel and display device, in order to realize the narrow frame design of display panel.
Embodiments provide a kind of display panel, comprising: multiple shift register cells for inputting scanning gate signal to corresponding grid line of cascade;
Often adjacent two row pixels are one group, often organize between two row pixels in described pixel and are provided with a data line;
Each described shift register cell comprises multiple module, the gap location of each described module between two adjacent groups pixel.
In a kind of possible embodiment, in the above-mentioned display panel that the embodiment of the present invention provides, the gap location of multiple modules that each described shift register cell comprises between adjacent multiple sets of adjacent pixels.
In a kind of possible embodiment, in the above-mentioned display panel that the embodiment of the present invention provides, described shift register cell, comprising: load module, reseting module and output module; Wherein,
The input end of described load module is connected with signal input part respectively with control end, and output terminal is connected with pull-up node; Described load module is used under the control of described signal input part, and the signal inputted by described signal input part draws high the current potential of described pull-up node;
The input end of described reseting module is connected with reference signal end, and control end is connected with reset signal end, and output terminal is connected with described pull-up node; Described reseting module is used under the control of described reset signal end, is dragged down the current potential of described pull-up node by the signal of described reference signal end;
The first input end of described output module is connected with clock signal terminal, second input end is connected with described reference signal end, first control end is connected with described pull-up node, and the second control end is connected with described reset signal end, and output terminal is connected with sweep signal output terminal; Described output module is used for, under the control of described pull-up node, the signal of described clock signal terminal is outputted to described sweep signal output terminal, is dragged down the current potential of described sweep signal output terminal under the control of described reset signal end by the signal of described reference signal end.
In a kind of possible embodiment, in the above-mentioned display panel that the embodiment of the present invention provides, described output module, comprising: the first output module and the second output module; Wherein,
The input end of described first output module is connected with described clock signal terminal, and control end is connected with described pull-up node, and output terminal is connected with described sweep signal output terminal; Described first output module is used under the control of described pull-up node, and the signal of described clock signal terminal is outputted to described sweep signal output terminal;
The input end of described second output module is connected with described reference signal end, and control end is connected with described reset signal end, and output terminal is connected with described sweep signal output terminal; Described second output module is used under the control of described reset signal end, is dragged down the current potential of described sweep signal output terminal by the signal of described reference signal end.
In a kind of possible embodiment, in the above-mentioned display panel that the embodiment of the present invention provides, described first output module, comprising: the first switching transistor and electric capacity; Wherein,
The grid of described first switching transistor is connected with described pull-up node, and source electrode is connected with described clock signal terminal, drains to be connected with described sweep signal output terminal;
Described electric capacity is connected between described pull-up node and described sweep signal output terminal.
In a kind of possible embodiment, in the above-mentioned display panel that the embodiment of the present invention provides, described second output module, comprising: second switch transistor;
The grid of described second switch transistor is connected with described reset signal end, and source electrode is connected with described reference signal end, drains to be connected with described sweep signal output terminal.
In a kind of possible embodiment, in the above-mentioned display panel that the embodiment of the present invention provides, described load module, comprising: the 3rd switching transistor;
The grid of described 3rd switching transistor is connected with described signal input part respectively with source electrode, drains to be connected with described pull-up node.
In a kind of possible embodiment, in the above-mentioned display panel that the embodiment of the present invention provides, described reseting module, comprising: the 4th switching transistor;
The grid of described 4th switching transistor is connected with described reset signal end, and source electrode is connected with described reference signal end, drains to be connected with described pull-up node.
In a kind of possible embodiment, in the above-mentioned display panel that the embodiment of the present invention provides, each described shift register cell is positioned at two row six and arranges the region that pixel limits; Wherein, described 3rd switching transistor and described 4th switching transistor are positioned at the side of the non-setting data line of first row pixel, described first switching transistor and described electric capacity are positioned at the side of the non-setting data line of the 3rd row pixel, and described second switch transistor is positioned at the side of the non-setting data line of the 5th row pixel.
In a kind of possible embodiment, in the above-mentioned display panel that the embodiment of the present invention provides, between adjacent rows pixel, be provided with two grid lines; In adjacent two described shift register cells, the output terminal of shift register cell described in upper level is connected with grid line described in same with the input end of shift register cell described in next stage.
Embodiments provide a kind of display device, comprise the above-mentioned display panel that the embodiment of the present invention provides.
The beneficial effect of the embodiment of the present invention comprises:
Embodiments provide a kind of display panel and display device, this display panel comprises: multiple shift register cells for inputting scanning gate signal to corresponding grid line of cascade; Often adjacent two row pixels are one group, often organize between two row pixels in pixel and are provided with a data line; Each shift register cell comprises multiple module, the gap location of each module between two adjacent groups pixel.In the above-mentioned display panel that the embodiment of the present invention provides, two row pixels share a data line, therefore, the quantity of data line can be reduced by half, the space be available can arrange and drive for driving display panel to realize grid each shift register cell scanned, like this gate driver circuit is arranged at the viewing area of display panel, relative to the neighboring area in prior art, gate driver circuit being arranged at display panel, the shape of the display panel that the embodiment of the present invention provides and frame no longer can be subject to the restriction of peripheral circuit, not only can realize narrow frame, abnormity display can be realized simultaneously, make the range of application of display panel by mobile phone, Pad etc. expand to the abnormity displays such as automobile round meter dish, improve the practical ranges of display panel.
Accompanying drawing explanation
The structural representation of the shift register cell that Fig. 1 provides for the embodiment of the present invention;
The concrete structure schematic diagram of the shift register cell that Fig. 2 provides for the embodiment of the present invention;
The input and output sequential chart of the shift register cell that Fig. 3 provides for the embodiment of the present invention;
The structural representation of the display panel that Fig. 4 provides for the embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the display panel provide the embodiment of the present invention and the embodiment of display device are described in detail.
Embodiments provide a kind of display panel, comprising: multiple shift register cells for inputting scanning gate signal to corresponding grid line of cascade; Often adjacent two row pixels are one group, often organize between two row pixels in pixel and are provided with a data line; Each shift register cell comprises multiple module, the gap location of each module between two adjacent groups pixel.
In the above-mentioned display panel that the embodiment of the present invention provides, two row pixels share a data line, therefore, the quantity of data line can be reduced by half, the space be available can arrange and drive for driving display panel to realize grid each shift register cell scanned, like this gate driver circuit is arranged at the viewing area of display panel, relative to the neighboring area in prior art, gate driver circuit being arranged at display panel, the shape of the display panel that the embodiment of the present invention provides and frame no longer can be subject to the restriction of peripheral circuit, not only can realize narrow frame, abnormity display can be realized simultaneously, make the range of application of display panel by mobile phone, Pad etc. expand to the abnormity displays such as automobile round meter dish, improve the practical ranges of display panel.
In the specific implementation, in the above-mentioned display panel that the embodiment of the present invention provides, the gap location of multiple module installation that each shift register cell can be comprised between adjacent multiple sets of adjacent pixels, each shift register cell can be completed setting in minimum region like this, the compact setting between the multiple shift register cells realizing cascade.Concrete, the above-mentioned display panel that the embodiment of the present invention provides can adopt double grid line structure, namely two grid lines are provided with between adjacent rows pixel in viewing area, two row pixels adjacent in viewing area can be divided into one group like this, often organize between two row pixels in pixel and a data line is set, namely the quantity of data line can be reduced half, and this part space be available because reducing data line quantity can be used for arranging each module of shift register and required signal lead just.
In the specific implementation, in the above-mentioned display panel that the embodiment of the present invention provides, in multiple shift register cells of cascade; Except first order shift register cell and afterbody shift register cell, the signal output part of all the other each shift register cells all to the signal input part input trigger pip of the next stage shift register cell be adjacent, and inputs reset signal to the reset signal end of the upper level shift register cell be adjacent; The signal output part of first order shift register cell is to the signal input part input trigger pip of second level shift register cell; The signal wire of each shift register cell can be parallel with grid line and/or data line.
In the specific implementation, in the above-mentioned display panel that the embodiment of the present invention provides, as shown in Figure 1, shift register cell can comprise: load module 01, reseting module 02 and output module 03; Wherein, the input end of load module 01 is connected with signal input part Input respectively with control end, and output terminal is connected with pull-up node P; Load module 01 is under the control of signal input part Input, and the signal inputted by signal input part Input draws high the current potential of pull-up node P; The input end of reseting module 02 is connected with reference signal end Vref, and control end is connected with reset signal end Reset, and output terminal is connected with pull-up node P; Reseting module 02 is under the control of reset signal end Reset, and the signal by reference to signal end Vref drags down the current potential of pull-up node P; The first input end of output module 03 is connected with clock signal terminal CLK, second input end is connected with reference signal end Vref, first control end is connected with pull-up node P, and the second control end is connected with reset signal end Reset, and output terminal is connected with sweep signal output terminal Out; Output module 03, for the signal of clock signal terminal CLK being outputted to sweep signal output terminal Out under the control of pull-up node P, drags down the current potential of sweep signal output terminal Out under the control of reset signal end Reset by reference to the signal of signal end Vref.
Particularly, in the above-mentioned display panel that the embodiment of the present invention provides, the gate driver circuit being arranged at viewing area comprises multiple shift register cells of cascade, the corresponding grid line of each shift register cell, shift register cell can comprise load module, reseting module and output module, thus the current potential of pull-up node is drawn high by load module, and then the signal of clock signal terminal is outputted to sweep signal output terminal by output module under the control of pull-up node, realize the output of sweep signal; When can also be dragged down the current potential of pull-up node after this row grid line end of scan by reseting module, thus close this row grid line, and output module can drag down the current potential of sweep signal output terminal under the control of reset signal end, stress release treatment.
In the specific implementation, in the above-mentioned display panel that the embodiment of the present invention provides, as shown in Figure 2, output module can comprise: the first output module 031 and the second output module 032; Wherein, the input end of the first output module 031 is connected with clock signal terminal CLK, and control end is connected with pull-up node P, and output terminal is connected with sweep signal output terminal Out; The signal of clock signal terminal CLK, under the control of pull-up node P, is outputted to sweep signal output terminal Out by the first output module 031; The input end of the second output module 032 is connected with reference signal end Vref, and control end is connected with reset signal end Reset, and output terminal is connected with sweep signal output terminal Out; Second output module 032 is under the control of reset signal end Reset, and the signal by reference to signal end Vref drags down the current potential of sweep signal output terminal Out.
Particularly, in the above-mentioned display panel that the embodiment of the present invention provides, output module can comprise the first output module and the second output module, first output module can export sweep signal under the control of pull-up node, second output module can drag down the current potential of sweep signal output terminal under the control of reset signal end, stress release treatment.
In the specific implementation, in the above-mentioned display panel that the embodiment of the present invention provides, as shown in Figure 2, the first output module 031 can comprise: the first switching transistor T1 and electric capacity C; Wherein, the grid of the first switching transistor T1 is connected with pull-up node P, and source electrode is connected with clock signal terminal CLK, drains to be connected with sweep signal output terminal Out; Electric capacity C is connected between pull-up node P and sweep signal output terminal Out.Particularly, the first switching transistor can conducting under the control of pull-up node, and the first switching transistor of conducting by clock signal terminal and the conducting of sweep signal output terminal, and then can export sweep signal.
In the specific implementation, in the above-mentioned display panel that the embodiment of the present invention provides, as shown in Figure 2, the second output mould 032 can comprise: second switch transistor T2; The grid of second switch transistor T2 is connected with reset signal end Reset, and source electrode is connected with reference signal end Vref, drains to be connected with sweep signal output terminal Out.Particularly, second switch transistor can conducting under the control of reset signal end, the second switch transistor Reference Signal end of conducting and the conducting of sweep signal output terminal, and then can drag down the current potential of sweep signal output terminal, stress release treatment.
In the specific implementation, in the above-mentioned display panel that the embodiment of the present invention provides, as shown in Figure 2, load module 01 can comprise: the 3rd switching transistor T3; The grid of the 3rd switching transistor T3 is connected with signal input part Input respectively with source electrode, drains to be connected with pull-up node P.Particularly, the 3rd switching transistor can conducting under the control of input signal end, and the 3rd switching transistor of conducting by signal input part and the conducting of pull-up node, and then can draw high the current potential of pull-up node.
In the specific implementation, in the above-mentioned display panel that the embodiment of the present invention provides, as shown in Figure 2, reseting module 02 can comprise: the 4th switching transistor T4; The grid of the 4th switching transistor T4 is connected with reset signal end Reset, and source electrode is connected with reference signal end Vref, drains to be connected with pull-up node P.Particularly, the 4th switching transistor can conducting under the control of reset signal end, the 4th switching transistor Reference Signal end of conducting and the conducting of pull-up node, and then can drag down the current potential of pull-up node.
It should be noted that the switching transistor mentioned in the above embodiment of the present invention can be thin film transistor (TFT) (TFT, ThinFilmTransistor), also can be metal oxide semiconductor field effect tube (MOS, MetalOxideSemiconductor), do not limit at this.In concrete enforcement, source electrode and the drain electrode of these transistors can be exchanged, and do not do concrete differentiation.Be described for thin film transistor (TFT) when describing specific embodiment.
The structure of the shift register cell provided below in conjunction with the embodiment of the present invention and time the ordered pair embodiment of the present invention course of work of shift register cell that provides be described in detail, particularly, the input and output sequential chart of the shift register cell shown in composition graphs 2 (for N-type transistor) and the Fig. 2 shown in Fig. 3, does to describe to the course of work of the shift register cell that the embodiment of the present invention provides.Wherein, the t1 ~ t3 three phases in input and output sequential chart is as shown in Figure 3 chosen.Represent high level signal with 1 in following description, 0 represents low level signal.
In the t1 stage, Input=1, CLK=0, Reset=0, Vref=0.Due to Input=1, therefore the 3rd switching transistor T3 is in conducting state, and the signal of signal input part Input is outputted to pull-up node P by the 3rd switching transistor T3 of conducting, and then can draw high the current potential of pull-up node P; Meanwhile, the current potential of pull-up node P raises, and can charge to electric capacity C.The t1 stage is the charging stage.
In the t2 stage, Input=0, CLK=1, Reset=0, Vref=0.Due to Input=0, therefore the 3rd switching transistor T3 is in cut-off state.Electric capacity C charging end enters discharge regime, electric capacity C electric discharge makes the current potential of the grid of the first switching transistor T1 raise, thus make the first switching transistor T1 conducting, the signal of clock signal terminal CLK by clock signal terminal CLK and sweep signal output terminal Out conducting, and then can export by the first switching transistor T1 of conducting.The t2 stage is that sweep signal exports the stage.
In the t3 stage, Input=0, CLK=0, Reset=1, Vref=0.Due to Reset=1, therefore second switch transistor T2 and the 4th switching transistor T4 is in conducting state; 4th switching transistor T4 Reference Signal end Vref of conducting and pull-up node P conducting, and then drag down the current potential of pull-up node P, the first switching transistor T1 is ended, closes sweep signal and export; The second switch transistor T2 Reference Signal end Vref of conducting and sweep signal output terminal Out conducting, and then drag down the current potential stress release treatment of sweep signal output terminal Out.The t3 stage is that sweep signal exports turn off phase.
In the specific implementation, the above-mentioned display panel that the embodiment of the present invention provides, gate driver circuit is arranged at viewing area, wherein, gate driver circuit comprises multiple shift register cells of cascade, and each shift register cell is built by signal wire by multiple switching transistor and electric capacity.Particularly, as shown in Figure 4, display panel can adopt double grid line structure, and the quantity of data line can reduce by half, therefore multiple switching transistor and electric capacity can be arranged at the gap location between two adjacent groups pixel, the signal wire connected between each components and parts can be parallel to each other with grid line and data line.
As shown in Figure 4, for first order shift register cell to fourth stage shift register cell, wherein arrange the region shared by a pixel at two row six, just 4 of a shift register cell switching transistor and 1 electric capacity can have been placed.Particularly, for first order shift register cell, wherein the 3rd switching transistor T3 is placed on the left side of the first row first red pixel, 4th switching transistor T4 is placed on the left side of the second row first red pixel, first switching transistor T1 and electric capacity C is placed on the left side of the first row first blue pixel, second switch transistor T2 is on the left side of the first row second green pixel, these positions all do not have setting data line, signal wire required for shift register cell is arranged along data line direction, in shift register cell, the connecting line of each components and parts can along the direction arrangement being parallel to grid line and data line.
As shown in Figure 4, the drain electrode of the first switching transistor T1 of first order shift register cell is connected with Article 1 grid line Gate1, the source electrode of the 3rd switching transistor T3 of second level shift register cell is connected with Article 1 grid line Gate1 simultaneously, namely in adjacent two shift register cells, the output terminal of upper level shift register cell is connected with same grid line with the input end of next stage shift register cell, and the output signal of upper level shift register cell is as the trigger pip of next stage shift register cell; The next line grid line that the grid line that in each shift register cell, second switch transistor T2 is corresponding with shift register cell at the corresponding levels with the grid of the 4th switching transistor T4 is in addition adjacent is connected, wherein, the grid line that the drain electrode of second switch transistor T2 is corresponding with shift register cell at the corresponding levels is connected, when next line grid line enters sweep phase, reduce noise for the signal dragging down one's own profession grid line; 4th switching transistor T4 drags down the current potential of first node simultaneously, and then closes shift register cell at the corresponding levels, makes it stop exporting sweep signal to the grid line of correspondence.
As shown in Figure 4, level Four shift register cell can arrange in a pixel region at 2 row 24 and arrange, and with four behavior cycles, arranges downwards successively, all shift register cells can be placed in viewing area.
When practical application, can according to the difference of component counts in gate driver circuit and size, the number of the shared pixel of adjustment, in this no limit.
Based on same inventive concept, embodiments provide a kind of display device, comprise the above-mentioned display panel that the embodiment of the present invention provides.This display device can be applied to any product or parts with Presentation Function such as mobile phone, panel computer, televisor, display, notebook computer, digital album (digital photo frame), navigating instrument.The principle having display device to deal with problems due to this is similar to display panel, and therefore the enforcement of this display device see the enforcement of above-mentioned display panel, can repeat part and repeat no more.
Embodiments provide a kind of display panel and display device, this display panel comprises: multiple shift register cells for inputting scanning gate signal to corresponding grid line of cascade; Often adjacent two row pixels are one group, often organize between two row pixels in pixel and are provided with a data line; Each shift register cell comprises multiple module, the gap location of each module between two adjacent groups pixel.In the above-mentioned display panel that the embodiment of the present invention provides, two row pixels share a data line, therefore, the quantity of data line can be reduced by half, the space be available can arrange and drive for driving display panel to realize grid each shift register cell scanned, like this gate driver circuit is arranged at the viewing area of display panel, relative to the neighboring area in prior art, gate driver circuit being arranged at display panel, the shape of the display panel that the embodiment of the present invention provides and frame no longer can be subject to the restriction of peripheral circuit, not only can realize narrow frame, abnormity display can be realized simultaneously, make the range of application of display panel by mobile phone, Pad etc. expand to the abnormity displays such as automobile round meter dish, improve the practical ranges of display panel.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.
Claims (11)
1. a display panel, comprising: multiple shift register cells for inputting scanning gate signal to corresponding grid line of cascade; It is characterized in that:
Often adjacent two row pixels are one group, often organize between two row pixels in described pixel and are provided with a data line;
Each described shift register cell comprises multiple module, the gap location of each described module between two adjacent groups pixel.
2. display panel as claimed in claim 1, is characterized in that, the gap location of multiple modules that each described shift register cell comprises between adjacent multiple sets of adjacent pixels.
3. display panel as claimed in claim 1 or 2, it is characterized in that, described shift register cell, comprising: load module, reseting module and output module; Wherein,
The input end of described load module is connected with signal input part respectively with control end, and output terminal is connected with pull-up node; Described load module is used under the control of described signal input part, and the signal inputted by described signal input part draws high the current potential of described pull-up node;
The input end of described reseting module is connected with reference signal end, and control end is connected with reset signal end, and output terminal is connected with described pull-up node; Described reseting module is used under the control of described reset signal end, is dragged down the current potential of described pull-up node by the signal of described reference signal end;
The first input end of described output module is connected with clock signal terminal, second input end is connected with described reference signal end, first control end is connected with described pull-up node, and the second control end is connected with described reset signal end, and output terminal is connected with sweep signal output terminal; Described output module is used for, under the control of described pull-up node, the signal of described clock signal terminal is outputted to described sweep signal output terminal, is dragged down the current potential of described sweep signal output terminal under the control of described reset signal end by the signal of described reference signal end.
4. display panel as claimed in claim 3, it is characterized in that, described output module, comprising: the first output module and the second output module; Wherein,
The input end of described first output module is connected with described clock signal terminal, and control end is connected with described pull-up node, and output terminal is connected with described sweep signal output terminal; Described first output module is used under the control of described pull-up node, and the signal of described clock signal terminal is outputted to described sweep signal output terminal;
The input end of described second output module is connected with described reference signal end, and control end is connected with described reset signal end, and output terminal is connected with described sweep signal output terminal; Described second output module is used under the control of described reset signal end, is dragged down the current potential of described sweep signal output terminal by the signal of described reference signal end.
5. display panel as claimed in claim 4, it is characterized in that, described first output module, comprising: the first switching transistor and electric capacity; Wherein,
The grid of described first switching transistor is connected with described pull-up node, and source electrode is connected with described clock signal terminal, drains to be connected with described sweep signal output terminal;
Described electric capacity is connected between described pull-up node and described sweep signal output terminal.
6. display panel as claimed in claim 5, it is characterized in that, described second output module, comprising: second switch transistor;
The grid of described second switch transistor is connected with described reset signal end, and source electrode is connected with described reference signal end, drains to be connected with described sweep signal output terminal.
7. display panel as claimed in claim 6, it is characterized in that, described load module, comprising: the 3rd switching transistor;
The grid of described 3rd switching transistor is connected with described signal input part respectively with source electrode, drains to be connected with described pull-up node.
8. display panel as claimed in claim 7, it is characterized in that, described reseting module, comprising: the 4th switching transistor;
The grid of described 4th switching transistor is connected with described reset signal end, and source electrode is connected with described reference signal end, drains to be connected with described pull-up node.
9. display panel as claimed in claim 8, is characterized in that, each described shift register cell is positioned at two row six and arranges the region that a pixel limits; Wherein, described 3rd switching transistor and described 4th switching transistor are positioned at the side of the non-setting data line of first row pixel, described first switching transistor and described electric capacity are positioned at the side of the non-setting data line of the 3rd row pixel, and described second switch transistor is positioned at the side of the non-setting data line of the 5th row pixel.
10. display panel as claimed in claim 1, is characterized in that, be provided with two grid lines between adjacent rows pixel; In adjacent two described shift register cells, the output terminal of shift register cell described in upper level is connected with grid line described in same with the input end of shift register cell described in next stage.
11. 1 kinds of display device, is characterized in that, comprise the display panel as described in any one of claim 1-10.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610159278.2A CN105575318B (en) | 2016-03-18 | 2016-03-18 | A kind of display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610159278.2A CN105575318B (en) | 2016-03-18 | 2016-03-18 | A kind of display panel and display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105575318A true CN105575318A (en) | 2016-05-11 |
| CN105575318B CN105575318B (en) | 2019-02-26 |
Family
ID=55885383
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610159278.2A Active CN105575318B (en) | 2016-03-18 | 2016-03-18 | A kind of display panel and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105575318B (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107644604A (en) * | 2016-07-22 | 2018-01-30 | 瀚宇彩晶股份有限公司 | Display device |
| CN108398826A (en) * | 2018-03-20 | 2018-08-14 | 上海天马微电子有限公司 | special-shaped display panel and display device |
| CN109697952A (en) * | 2019-03-14 | 2019-04-30 | 京东方科技集团股份有限公司 | Display panel, control method thereof and display device |
| CN111413835A (en) * | 2020-04-27 | 2020-07-14 | 武汉华星光电技术有限公司 | Array substrate and display panel |
| CN112748606A (en) * | 2019-10-31 | 2021-05-04 | 合肥京东方显示技术有限公司 | Display device and method for manufacturing the same |
| CN113257130A (en) * | 2021-05-17 | 2021-08-13 | 武汉华星光电技术有限公司 | Display panel of display area integrated grid drive circuit |
| CN114067713A (en) * | 2020-07-31 | 2022-02-18 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN114664250A (en) * | 2022-04-08 | 2022-06-24 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
| WO2022134681A1 (en) * | 2020-12-23 | 2022-06-30 | 京东方科技集团股份有限公司 | Display panel and display apparatus |
| WO2023168559A1 (en) * | 2022-03-07 | 2023-09-14 | 京东方科技集团股份有限公司 | Special-shaped display panel and display apparatus |
| US12033553B2 (en) | 2021-05-17 | 2024-07-09 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Display panel integrated with gate driving circuit in display area |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6005645A (en) * | 1995-09-14 | 1999-12-21 | Semiconductor Energy Laboratory Co., Ltd. | Stereoscopic display device having particular circuits |
| JP2001109405A (en) * | 1999-10-01 | 2001-04-20 | Sanyo Electric Co Ltd | El display device |
| CN101216649A (en) * | 2008-01-10 | 2008-07-09 | 京东方科技集团股份有限公司 | Crystal display device array substrate and driving method thereof |
| CN101978409A (en) * | 2008-01-21 | 2011-02-16 | 视瑞尔技术公司 | Device for controlling pixels and electronic display unit |
| CN102117602A (en) * | 2009-12-31 | 2011-07-06 | 上海天马微电子有限公司 | Drive structure of display panel |
| US20120194773A1 (en) * | 2011-02-01 | 2012-08-02 | Samsung Electronics Co., Ltd. | Display apparatus and display set having the same |
| CN104238214A (en) * | 2014-07-24 | 2014-12-24 | 京东方科技集团股份有限公司 | Array substrate and display panel |
| CN104934005A (en) * | 2015-07-01 | 2015-09-23 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN105206212A (en) * | 2015-08-27 | 2015-12-30 | 京东方科技集团股份有限公司 | Display panel and display apparatus |
-
2016
- 2016-03-18 CN CN201610159278.2A patent/CN105575318B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6005645A (en) * | 1995-09-14 | 1999-12-21 | Semiconductor Energy Laboratory Co., Ltd. | Stereoscopic display device having particular circuits |
| JP2001109405A (en) * | 1999-10-01 | 2001-04-20 | Sanyo Electric Co Ltd | El display device |
| CN101216649A (en) * | 2008-01-10 | 2008-07-09 | 京东方科技集团股份有限公司 | Crystal display device array substrate and driving method thereof |
| CN101978409A (en) * | 2008-01-21 | 2011-02-16 | 视瑞尔技术公司 | Device for controlling pixels and electronic display unit |
| CN102117602A (en) * | 2009-12-31 | 2011-07-06 | 上海天马微电子有限公司 | Drive structure of display panel |
| US20120194773A1 (en) * | 2011-02-01 | 2012-08-02 | Samsung Electronics Co., Ltd. | Display apparatus and display set having the same |
| CN104238214A (en) * | 2014-07-24 | 2014-12-24 | 京东方科技集团股份有限公司 | Array substrate and display panel |
| CN104934005A (en) * | 2015-07-01 | 2015-09-23 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN105206212A (en) * | 2015-08-27 | 2015-12-30 | 京东方科技集团股份有限公司 | Display panel and display apparatus |
Cited By (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107644604A (en) * | 2016-07-22 | 2018-01-30 | 瀚宇彩晶股份有限公司 | Display device |
| CN108398826A (en) * | 2018-03-20 | 2018-08-14 | 上海天马微电子有限公司 | special-shaped display panel and display device |
| US11263949B2 (en) | 2019-03-14 | 2022-03-01 | Beijing Boe Optoelectronics Technology Co., Ltd. | Display panel, control method thereof, and display apparatus |
| CN109697952A (en) * | 2019-03-14 | 2019-04-30 | 京东方科技集团股份有限公司 | Display panel, control method thereof and display device |
| CN109697952B (en) * | 2019-03-14 | 2020-08-21 | 京东方科技集团股份有限公司 | Display panel, control method thereof and display device |
| CN112748606A (en) * | 2019-10-31 | 2021-05-04 | 合肥京东方显示技术有限公司 | Display device and method for manufacturing the same |
| CN111413835A (en) * | 2020-04-27 | 2020-07-14 | 武汉华星光电技术有限公司 | Array substrate and display panel |
| CN111413835B (en) * | 2020-04-27 | 2021-04-02 | 武汉华星光电技术有限公司 | Array substrate and display panel |
| US11862064B2 (en) | 2020-04-27 | 2024-01-02 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Array substrate and display panel with gate driver on array circuit in display area |
| CN114067713A (en) * | 2020-07-31 | 2022-02-18 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN114067713B (en) * | 2020-07-31 | 2024-01-23 | 京东方科技集团股份有限公司 | Display panel and display device |
| WO2022134681A1 (en) * | 2020-12-23 | 2022-06-30 | 京东方科技集团股份有限公司 | Display panel and display apparatus |
| US11900885B2 (en) | 2020-12-23 | 2024-02-13 | Boe Technology Group Co., Ltd. | Display panel and display apparatus |
| CN113257130B (en) * | 2021-05-17 | 2022-07-12 | 武汉华星光电技术有限公司 | Display panel of display area integrated grid drive circuit |
| CN113257130A (en) * | 2021-05-17 | 2021-08-13 | 武汉华星光电技术有限公司 | Display panel of display area integrated grid drive circuit |
| US12033553B2 (en) | 2021-05-17 | 2024-07-09 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Display panel integrated with gate driving circuit in display area |
| WO2023168559A1 (en) * | 2022-03-07 | 2023-09-14 | 京东方科技集团股份有限公司 | Special-shaped display panel and display apparatus |
| CN114664250A (en) * | 2022-04-08 | 2022-06-24 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
| CN114664250B (en) * | 2022-04-08 | 2023-08-22 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105575318B (en) | 2019-02-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105575318A (en) | Display panel and display apparatus | |
| US11227549B2 (en) | Shift register unit, driving method thereof, gate driver and display device | |
| CN105185293B (en) | A kind of display panel, its driving method and display device | |
| CN104751766A (en) | Display panel, driving method thereof and display device | |
| CN103137081B (en) | Display panel gate drive circuit and display screen | |
| CN109935199B (en) | Shift register unit, grid driving circuit, display device and driving method | |
| CN102708779B (en) | Shift register and driving device thereof, grid driving device and display device | |
| CN104134430B (en) | A kind of shift register, gate driver circuit and display device | |
| CN105469738A (en) | Shift register, grid drive circuit and display device | |
| CN105528988B (en) | A kind of gate driving circuit, touch-control display panel and display device | |
| US20150318052A1 (en) | Shift register unit, gate drive circuit and display device | |
| CN104978943A (en) | Shift register, display panel driving method and related device | |
| CN104700806A (en) | Shifting register, grid drive circuit, display panel and display device | |
| CN105427825A (en) | Shift register and driving method thereof, and grid driving circuit | |
| CN105096889A (en) | Shift register and driving method thereof, grid driving circuit, and display apparatus | |
| JP2018507433A (en) | GOA circuit used in liquid crystal display device | |
| CN104699347A (en) | Array substrate, display panel and electronic equipment | |
| US20170372664A1 (en) | Gate Driver On Array Circuit and Scanning Method Thereof, Display Panel and Display Device | |
| CN104766586A (en) | Shift register unit, and drive method, gate drive circuit and display device of shift register unit | |
| CN105047120B (en) | A kind of gate driving circuit and its driving method, display device | |
| CN103971628A (en) | Shift register unit, gate driving circuit and display device | |
| CN105551422A (en) | Shift register, gate drive circuit and display panel | |
| CN107316600A (en) | Shift register cell and its driving method, gate driving circuit, display device | |
| CN104680967A (en) | Display panel and display device | |
| CN110211547A (en) | A kind of display panel, its driving method and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |