CN105550141A - Method for realizing link multi-division multiplexing based on PCIE bus - Google Patents
Method for realizing link multi-division multiplexing based on PCIE bus Download PDFInfo
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- CN105550141A CN105550141A CN201510876697.3A CN201510876697A CN105550141A CN 105550141 A CN105550141 A CN 105550141A CN 201510876697 A CN201510876697 A CN 201510876697A CN 105550141 A CN105550141 A CN 105550141A
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- 238000000034 method Methods 0.000 title claims abstract description 18
- 230000005540 biological transmission Effects 0.000 claims abstract description 14
- 238000013461 design Methods 0.000 claims abstract description 8
- 238000012545 processing Methods 0.000 abstract description 11
- 238000004891 communication Methods 0.000 abstract description 2
- 230000002708 enhancing effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000006855 networking Effects 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4072—Drivers or receivers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0024—Peripheral component interconnect [PCI]
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
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Abstract
The invention discloses a method for realizing link multi-division multiplexing based on a PCIE bus, belonging to the technical field of communication; the PCIe bus breaks through the transmission limit of the signals on the inherent medium of the PCB, the PCIe signals are transmitted by cables, the PCIe signals directly led out from the processor are transmitted by the cables, and meanwhile, receivers corresponding to different application designs are designed at the receiving ends of the modules, so that the transmitted PCIe signals can be transmitted to different application receiving ends according to needs, thereby realizing the link multi-multiplexing based on the PCIe signals, enhancing the expansibility and flexibility of the whole novel blade type processing module architecture and simultaneously reducing the change cost of the system.
Description
Technical field
The present invention discloses and a kind ofly realizes the multiplexing method of link many points, and belong to communication technical field, specifically a kind of Based PC IE bus realizes the multiplexing method of link many points.
Background technology
Along with internet, large data and the arriving in virtual epoch, various different types of application emerges in an endless stream, and also needs computer system architecture can adjust flexibly to realize the support to different application simultaneously.PCIe signal is as one of signal of interest in current computer system, play the bridge of directly link central processing unit and backend application, vital effect is played in whole computer system, the technology of Based PC Ie signal extension is also more and more ripe simultaneously, but PCIe signal is all within a processor integrated in existing X86-based server, in the design of conventional blade type processing module plate, PCIe signal in processor can pass to different receiving ends by this transmission medium of PCB, due to will through this fixing transmission medium of PCB, therefore the transmission path on medium will carry out specifying and designing in design in advance, almost can not modify again after having designed, unless whole signal transmission line carries out brand-new planning and change, mean that original pcb board cannot use, need to redesign and change, not only make system conversion cost increase, and circuit is once fixing on PCB, the application of this circuit corresponding also will be fixed thereupon, cause the framework of whole system more inflexible, cannot adapt to flexibly according to the requirement of different application and expand.The invention provides a kind of Based PC IE bus and realize the multiplexing method of link many points, Based PC Ie bus breaks through the restriction that above-mentioned signal transmits on the intrinsic medium of PCB, by the mode with cable transmission PCIe signal, the PCIe signal of directly being drawn by processor is transmitted by cable, simultaneously at the receiver that the design of the receiving end of module corresponding different application is corresponding, make the PCIe signal of transmission can be delivered to different application receiving ends as required, the link many points realizing Based PC Ie signal is multiplexing, strengthen extendability and the dirigibility of whole Novel cutter chip processing module framework, reduce the variable cost of system simultaneously.
Summary of the invention
The PCIe signal that the present invention is directed in prior art in processor can pass to receiving end by PCB transmission medium, the upper circuit solidification of PCB, the problem that can not adapt to flexibly and expand, a kind of Based PC IE bus is provided to realize the multiplexing method of link many points, the link many points realizing Based PC Ie signal is multiplexing, strengthen extendability and the dirigibility of whole Novel cutter chip processing module framework, reduce the variable cost of system simultaneously.
The concrete scheme that the present invention proposes is:
A kind of Based PC IE bus realizes the multiplexing method of link many points, Based PC Ie bus, the PCIe signal of directly being drawn by processor is undertaken transferring to receiving end by cable, the receiver of the corresponding different application design of receiving end, make the PCIe signal of transmission be delivered to different application receiving ends as required, the actual demand for client switches as required.
The PCIe signal of directly being drawn by different processor is undertaken transferring to receiving end by cable, receiving end arranges different receiver, receive the PCIe signal that different processor is drawn respectively, transmit PCIe signal to different application receiving ends, the actual demand for client switches as required.
PCIe signal is passed to the receiving end of application modular converter by receiver as required, passes to corresponding system module again operate by signal PCIe signal being converted to correspondence.
PCIe signal is directly passed to corresponding system module and operates by receiver as required, changes without signal.
Based PC Ie bus, the PCIe signal of directly being drawn by processor is undertaken transferring to receiving end by Min-SAS cable.
Usefulness of the present invention is:
The invention provides a kind of Based PC IE bus and realize the multiplexing method of link many points, Based PC Ie bus breaks through the restriction that above-mentioned signal transmits on the intrinsic medium of PCB, by with cable transmission PCIe signal, the PCIe signal of directly being drawn by processor is transmitted by cable, simultaneously at the receiver that the design of the receiving end of module corresponding different application is corresponding, make the PCIe signal of transmission can be delivered to different application receiving ends as required, thus the link many points realizing Based PC Ie signal is multiplexing, strengthen extendability and the dirigibility of whole Novel cutter chip processing module framework, reduce the variable cost of system simultaneously.
Accompanying drawing explanation
The configuration diagram of Fig. 1 embodiment of the present invention 1;
The configuration diagram of Fig. 2 embodiment of the present invention 2;
Fig. 3 processing module block schematic illustration of the present invention.
Embodiment
A kind of Based PC IE bus realizes the multiplexing method of link many points, Based PC Ie bus, the PCIe signal of directly being drawn by processor is undertaken transferring to receiving end by cable, the receiver of the corresponding different application design of receiving end, make the PCIe signal of transmission be delivered to different application receiving ends as required, the actual demand for client switches as required.
According to said method and summary of the invention, by reference to the accompanying drawings, the present invention will be further described.
The PCIe signal of directly being drawn by different processor is undertaken transferring to receiving end by cable, receiving end arranges different receiver, receive the PCIe signal that different processor is drawn respectively, PCIe signal is passed to the receiving end of application modular converter by receiver as required, passes to corresponding system module again operate by signal PCIe signal being converted to correspondence.
PCIe signal integrated in processor 1 and processor 2 in embodiment 1, namely the PCIe signal that cpu1 and cpu2 is integrated, transmitted by Min-SAS cable, C1 and C2 two receivers is set at the receiving end of processing module simultaneously, wherein C1 is used for receiving cpu1 and transmits the PCIe signal of coming, C2 is used for receiving cpu2 and transmits the PCIe signal of coming, after receiving at C1 and C2 the PCIe signal transmitting, by signal transmission to Mezz2 and Mezz4 two methods modular converter, after PCIe signal is converted to corresponding networking signal by Mezz2 and Mezz4 again, the Switch data exchange module passed to again in system carries out exchanges data, can with reference to accompanying drawing 1.
The PCIe signal that different processor can also directly be drawn by the present invention is undertaken transferring to receiving end by cable, receiving end arranges different receiver, receive the PCIe signal that different processor is drawn respectively, PCIe signal is directly passed to corresponding system module and operates by receiver as required, changes without signal.
PCIe signal integrated in processor 1 and processor 2 in embodiment 2, namely the PCIe signal that cpu1 and cpu2 is integrated, transmitted by Min-SAS cable, A1 and A2 two receivers is set at the receiving end of module simultaneously, wherein A1 is used for receiving cpu1 and transmits the PCIe signal of coming, A2 is used for receiving cpu2 and transmits the PCIe signal of coming, receive the PCIe signal come by the transmission of Min-SAS cable at A1 and A2 after, by signal without changing the I/OBox module be directly passed in system, realize the expansion of system I/O, this module is arranged independently PCIe slot, can support that the arrange in pairs or groups PCIe card of standard of client realizes the expansion of I/O, with reference to accompanying drawing 2.
Wherein accompanying drawing 3 specifically illustrates the processing module framework that the present invention realizes, wherein CPU1 and CPU2 is by the intercommunication of PCIe signal, CPU1 is by DMI bus and PatssburgC602 chip links, C602 chip realizes processing module controls all low-speed devices, C602 chip is by PCIe signal, USB and SPI signal and BMC chip links, and the realization of BMC chip carries out monitoring constantly to the running status of devices all in processing module.C602 chip is also by PCIe signal and PowervilleI350 chip links, and I350 chip is used for realizing the transmission based on module network data.PCIe signal in CPU1 and CPU2 all draws the expansion carrying out different application, and what wherein respectively have 1 group of PCIe signal to be fixed with I/Oconnector1 and I/Oconnector3 respectively links; A pair PCIe signal is respectively had to be linked with I/Oconnector2 and I/Oconnector4 respectively by Min-SAS cable, this is drawn respectively to all respective through a pair Min-SASconnector during PCIe signal in 2 processors, and again respective through a pair Min-SASconnector before linking with I/Oconnector2 and I/Oconnector4.Link many points of situations of above-mentioned Based PC Ie signal, make original 1 group of fixing PCIe signal can switch as required according to the actual demand of client between I/O expanded application and exchanges data application.
Claims (6)
1. a Based PC IE bus realizes the multiplexing method of link many points, it is characterized in that Based PC Ie bus, the PCIe signal of directly being drawn by processor is undertaken transferring to receiving end by cable, the receiver of the corresponding different application design of receiving end, make the PCIe signal of transmission be delivered to different application receiving ends as required, the actual demand for client switches as required.
2. a kind of Based PC IE bus according to claim 1 realizes the multiplexing method of link many points, it is characterized in that the PCIe signal of directly being drawn by different processor is undertaken transferring to receiving end by cable, receiving end arranges different receiver, receive the PCIe signal that different processor is drawn respectively, transmit PCIe signal to different application receiving ends, the actual demand for client switches as required.
3. a kind of Based PC IE bus according to claim 1 and 2 realizes the multiplexing method of link many points, it is characterized in that PCIe signal is passed to the receiving end of application modular converter by receiver as required, pass to corresponding system module again by signal PCIe signal being converted to correspondence and operate.
4. a kind of Based PC IE bus according to claim 1 and 2 realizes the multiplexing method of link many points, it is characterized in that PCIe signal is directly passed to corresponding system module and operates by receiver as required, changes without signal.
5. a kind of Based PC IE bus according to claim 3 realizes the multiplexing method of link many points, and it is characterized in that Based PC Ie bus, the PCIe signal of directly being drawn by processor is undertaken transferring to receiving end by Min-SAS cable.
6. a kind of Based PC IE bus according to claim 4 realizes the multiplexing method of link many points, and it is characterized in that Based PC Ie bus, the PCIe signal of directly being drawn by processor is undertaken transferring to receiving end by Min-SAS cable.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510876697.3A CN105550141A (en) | 2015-12-03 | 2015-12-03 | Method for realizing link multi-division multiplexing based on PCIE bus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510876697.3A CN105550141A (en) | 2015-12-03 | 2015-12-03 | Method for realizing link multi-division multiplexing based on PCIE bus |
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| CN105550141A true CN105550141A (en) | 2016-05-04 |
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| CN201510876697.3A Pending CN105550141A (en) | 2015-12-03 | 2015-12-03 | Method for realizing link multi-division multiplexing based on PCIE bus |
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Citations (9)
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|---|---|---|---|---|
| CN101630297A (en) * | 2008-07-17 | 2010-01-20 | 株式会社东芝 | Converter and control system |
| US20100229050A1 (en) * | 2009-03-06 | 2010-09-09 | Fujitsu Limited | Apparatus having first bus and second bus connectable to i/o device, information processing apparatus and method of controlling apparatus |
| CN202383672U (en) * | 2012-01-12 | 2012-08-15 | 杭州海莱电子科技有限公司 | Novel PCI-E expanding circuit |
| CN103543961A (en) * | 2013-10-12 | 2014-01-29 | 浙江宇视科技有限公司 | PCIe-based storage extension system and method |
| CN103746717A (en) * | 2013-12-25 | 2014-04-23 | 惠州汇聚电线制品有限公司 | CFP connector and CFP transmission architecture |
| CN104063349A (en) * | 2014-06-24 | 2014-09-24 | 浪潮(北京)电子信息产业有限公司 | System middle back plate and method for realizing data transmission |
| CN203930819U (en) * | 2014-07-17 | 2014-11-05 | 浪潮电子信息产业股份有限公司 | A kind of PCIE signal transmitting apparatus |
| CN104765707A (en) * | 2015-04-15 | 2015-07-08 | 浪潮电子信息产业股份有限公司 | PCIe Gen3 IO expansion box design method based on Openpower platform |
| CN204705946U (en) * | 2015-06-25 | 2015-10-14 | 浪潮电子信息产业股份有限公司 | A kind of novel 4 road server systems based on fusion architecture |
-
2015
- 2015-12-03 CN CN201510876697.3A patent/CN105550141A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101630297A (en) * | 2008-07-17 | 2010-01-20 | 株式会社东芝 | Converter and control system |
| US20100229050A1 (en) * | 2009-03-06 | 2010-09-09 | Fujitsu Limited | Apparatus having first bus and second bus connectable to i/o device, information processing apparatus and method of controlling apparatus |
| CN202383672U (en) * | 2012-01-12 | 2012-08-15 | 杭州海莱电子科技有限公司 | Novel PCI-E expanding circuit |
| CN103543961A (en) * | 2013-10-12 | 2014-01-29 | 浙江宇视科技有限公司 | PCIe-based storage extension system and method |
| CN103746717A (en) * | 2013-12-25 | 2014-04-23 | 惠州汇聚电线制品有限公司 | CFP connector and CFP transmission architecture |
| CN104063349A (en) * | 2014-06-24 | 2014-09-24 | 浪潮(北京)电子信息产业有限公司 | System middle back plate and method for realizing data transmission |
| CN203930819U (en) * | 2014-07-17 | 2014-11-05 | 浪潮电子信息产业股份有限公司 | A kind of PCIE signal transmitting apparatus |
| CN104765707A (en) * | 2015-04-15 | 2015-07-08 | 浪潮电子信息产业股份有限公司 | PCIe Gen3 IO expansion box design method based on Openpower platform |
| CN204705946U (en) * | 2015-06-25 | 2015-10-14 | 浪潮电子信息产业股份有限公司 | A kind of novel 4 road server systems based on fusion architecture |
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Application publication date: 20160504 |
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