CN105489596B - 一种阵列基板及制作方法 - Google Patents

一种阵列基板及制作方法 Download PDF

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CN105489596B
CN105489596B CN201610003750.3A CN201610003750A CN105489596B CN 105489596 B CN105489596 B CN 105489596B CN 201610003750 A CN201610003750 A CN 201610003750A CN 105489596 B CN105489596 B CN 105489596B
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static driven
driven comb
conductive pattern
array substrate
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CN105489596A (zh
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杨小飞
莫再隆
辛燕霞
代科
朱亚文
苏磊
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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Chengdu BOE Optoelectronics Technology Co Ltd
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Priority to US15/502,132 priority patent/US10483219B2/en
Priority to PCT/CN2016/094837 priority patent/WO2017118022A1/zh
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Abstract

本发明提供一种阵列基板及制作方法，涉及显示领域。其中，阵列基板包括依次形成在衬底基板上的金属图形以及导电图形，所述导电图形与所述金属图形绝缘，与所述导电图形同层同材料形成的静电释放图形，所述静电释放图形与所述导电图形绝缘，并连接所述金属图形。本发明的方案在形成导电图形的制作工艺中还额外形成一个用于与金属图形连接的静电释放图形，该静电释放图形用于释放金属图形上一部分静电，防止金属图形的静电击穿到导电图形上，从而与导电图形短接。由于该静电释放图形可以采用导电图形的构图工艺形成，因此本实施例的阵列基板并不会额外增加制作成本，具有很高应用价值。

Description

一种阵列基板及制作方法
技术领域
本发明涉及显示领域，特别涉及一种阵列基板及制作方法。
背景技术
在现有的阵列基板的制作工艺中，一般采用等离子体辉光放电的方法沉积导电图形。这样一来在沉积的过程中，或多或少会有电子进入到之前已形成的金属图形上，使该金属图形沉积静电，从而击穿相邻的绝缘图层，造成金属图形与其它导电图形的短接，致使在显示过程中，严重影响显示效果，降低了用户的体验。
有鉴于此，当前亟需一种能够消除导电图形在形成过程中，对金属图形产生静电的技术方案。
发明内容
本发明的目的是提供一种能够消除阵列基板上的金属图形静电的技术方案。
为解决上述发明目的，一方面，本发明的实施例提供一种阵列基板，包括依次形成在衬底基板上的金属图形以及导电图形，所述导电图形与所述金属图形绝缘，其中所述阵列基板还包括：
与所述导电图形同层同材料形成的静电释放图形，所述静电释放图形与所述导电图形绝缘，并连接所述金属图形。
可选地，所述导电图形与所述金属图形之间设置有绝缘层；
所述绝缘层上设置有过孔，所述静电释放图形通过所述过孔连接所述金属图形。
可选地，所述金属图形为信号线；
所述静电释放图形包括：
第一静电释放图形，设置在阵列基板的压接区域内，与所述信号线的输入端连接；和/或
第二静电释放图形，设置在阵列基板的显示区域内，与所述信号线的输出端连接。
可选地，所述第一静电释放图形为矩形，且矩形的面积为25um 2～400um2。
可选地，所述第一静电释放图形通过所述绝缘层上的至少两个过孔与所述信号线连接。
可选地，所述金属图形为栅线，所述导电图形包括源漏金属层图形。
可选地，所述信号线为栅线，所述导电图形包括漏金属层图形和透明电极，
所述静电释放图形包括：
与所述漏金属层图形同层同材料形成的第一部分；
与所述透明电极同层同材料形成的第二部分。
可选地，所述金属图形为数据线，所述导电图形包括透明电极
另一方面，本发明还提供一种阵列基板的制作方法，包括依次在衬底基板上形成金属图形以及导电图形的步骤；
其中，在形成所述导电图形的构图工艺中，还形成与所述导电图形绝缘的静电释放图形，所述静电释放图形与所述金属图形连接。
可选地，本发明的制作方还包括：
形成绝缘层的步骤，所述绝缘层设置在所述导电图形与所述金属图形之间，且具有过孔；
其中，所述静电释放图形通过所述过孔连接所述金属图形。
本发明的上述技术方案的有益效果如下：
本实施例在形成导电图形的制作工艺中还额外形成一个用于与金属图形连接的静电释放图形，该静电释放图形用于释放金属图形上一部分静电，防止金属图形的静电击穿到导电图形上，从而与导电图形短接。由于该静电释放图形可以采用导电图形的构图工艺形成，因此本实施例的阵列基板并不会额外增加制作成本，具有很高应用价值。
附图说明
图1为本发明的阵列基板的结构示意图；
图2为本发明的阵列基板的俯视示意图；
图3为本发明的阵列基板的带有静电释放图形的俯示图。
图4A-图4F为本发明的制作方法的流程示意图。
具体实施方式
为使本发明要解决的技术问题、技术方案和优点更加清楚，下面将结合附图及具体实施例进行详细描述。
针对现有的阵列基板的制作过程中，容易对金属图形产生静电的问题，本发明提供一种解决方案。
一方面，本发明的实施例提供一种阵列基板，如图1所示，包括：
依次形成在衬底基板1上的金属图形2以及导电图形41，该导电图形41与金属图形2为不同层设置，相互绝缘。与现有技术不同的是，本实施例的阵列基板还进一步包括：
与导电图形41同层同材料形成的静电释放图形42，该静电释放图形42与导电图形41绝缘(即静电释放图形42与导电图形41相隔)，并连接金属图形2。
本实施例在形成导电图形的制作工艺中还额外形成一个用于与金属图形连接的静电释放图形，该静电释放图形用于释放金属图形上一部分静电，防止金属图形的静电击穿到导电图形上，从而与导电图形短接。由于静电释放图形与导电图形可以由同一个构图工艺形成，因此本实施例的阵列基板的制作成本并不会比现有技术高，应用价值能够得到认可。
由于目前市场流行窄边的高分辨率显示屏，因此阵列基板上可用的空间越来越少。而本发明的静电释放图形是现有技术中没有的，如何能够在有限的空间内完成布置成为了技术难点。
为此，本发明提供一种解决的技术方案。在一般情况下，本实施例的金属图形是指阵列基板上的用于控制薄膜晶体管开关的信号线。而在传统的阵列基板中，会设置有压接区域(即PAD区域)，该区域内上形成有信号线的外接端点。外部信号设备通过外接端点向信号线传输信号。例如控制画面显示的IC芯片，或者用于测量阵列基板制作良品率的检测设备的探针。为此，本实施例可以将静电释放图形可以与信号线输入端连接，并制作在压接区域上，从而复用为现有的外接端点，可节省阵列基板的空间。其中，静电释放图形的形状则与满足外接端点的要求，优选为矩形，面积为25um2～400um2。
此外，本实施例的静电释放图形还可以直接设置在显示区域内，与信号线的输出端连接，从而不占显示区域的***空间，满足窄边显示装置的尺寸要求。
当然，本实施的静电释放图形可以为多个，一部分作为外接端点，设置在压接区域；另一部分则设置在显示区域，与信号线输出端连接。
此外，需要给予说明的是，如图1所示，本实施例的金属图形2与导电图形41之间是通过该绝缘层3实现绝缘，其中，静电释放图形可以通过绝缘层3的过孔与金属图形2连接。
当然，在实际应用中，本实施例的金属图形一般为信号线，如栅线、数据线等。在信号线之后形成的导电图形可以是透明电极或者其他信号线，这里透明电极可以是公共电极、像素电极等。本文所述的绝缘层可能是一个图层，也有可能泛指金属图形与导电图形之间的所有绝缘层。
下面结合实现方式，对本发明的阵列基板的结构进行详细介绍。
以底栅型结构的阵列基为例，本实现方式的阵列基板如图2所示，包括：
衬底基板1，形成该衬底基板上1的栅线21、数据线22、第一静电释放图形42A以及第二静电释放图形42B。其中，栅线21即对应本文所述的金属图形，数据线22为本文所述的导电图形，第一静电释放图形42A、第二静电释放图形42B以及数据线22为同层同材料形成。这里需要给予说明的是，在现有技术中，源漏金属层图形与数据线22一般也是图层同材料形成，因此本实现方式的数据线22也可以代表源漏金属层。
进一步参考图3，第一静电释放图形42A、第二静电释放图形42B与栅线21之间还设置有栅绝缘层31，并通过栅绝缘层31上的过孔与栅线2连接。其中，第一静电释放图形42A即上位所述的设置在压接区域上的外接端点。在图2中与栅线的驱动电路Gate IC连接，加载来自Gate IC的扫描信号。
若第一静电释放图形42A用于作为测试信号线的外接端点，则可以与检测设备的探针连接，从而向栅线21加载或接收测试信号。当然，为使测试的结果更加准确，因尽可能减小第一静电释放图形42A的电阻，因此作为优选方案，如图3所示，第一静电释放图形42A可以通过栅绝缘层上的多个过孔与栅线21连接，从而增大作为导线的横截面积。
此外，在阵列基板的具体制作过程中，数据线22并不是最后形成的导电图形，在数据线图层上方还会形成透明电极(如公共电极、像素电极)，以图2中的入像素电极23为例，在该像素电极23形成过程中，也会对数据线22以及栅线21带来静电，因此也可以采用本发明的技术方案，在制作像素电极23的同时制作静电释放图形，该静电释放图形可以与数据线22或者栅线21连接。若数据线22连接，则此时数据线22作为本文所指的金属图形。
在实际结构中，像素电极23与数据线22之间设置有钝化层，该钝化层实质也是一种绝缘层，因此本发明的实施例可以将像素电极23同层的静电释放图形通过钝化层的过孔连接到与数据线22上。
当然，作为其他的可行方案，参考图3，本发明的实施例也可以进一步将像素电极23同层的静电释放图形42A＇/42B＇，通过钝化层32的过孔连接到与数据线22同层的静电释放图形42A/42B上。从而释放在像素电极23沉积过程中，对栅线21产生的静电。
由此可见，在本实现方式中，静电释放图形可以由两部分组成，一部分与数据线同层，另一部分与像素电极23同层。同理，作为适应性变化，此时像素电极23同层的静电释放图形42B＇则代替数据线22同层的静电释放图层42B，作为外接端点。
以上仅用于示例性介绍本实施例的实现方式，图2中像素电极23可以等效替换为公共电极。但凡是在形成导电图形的制作工艺中，额外制作与之前金属图形连接的静电释放图形，都应属于本发明的保护范围之内。
综上所述，本发明的阵列基板在设置静电释放图形后，能够消除金属图形在制作的过程中产生静电，同时静电释放图形的制作过程并不会额外占用构图工艺，因此不会增加阵列基板的制作成本。此外，本实施例的静电释放图形也不会占用阵列基板边缘的空间，能够适用于窄边的显示装置，符合当前显示器的发展趋势。
此外，本发明的实施例还提供一种阵列基板的制作方法，包括依次在衬底基板上形成金属图形以及导电图形的步骤。
其中，在形成导电图形的构图工艺中，还形成与导电图形绝缘的静电释放图形，该静电释放图形与金属图形连接。
本实施例的方法在形成导电图形的制作工艺中，还额外形成一个用于与金属图形连接的静电释放图形，该静电释放图形用于释放金属图形上一部分静电，防止金属图形的静电击穿到导电图形上，从而与导电图形短接。由于该静电释放图形可以采用导电图形的构图工艺形成，因此本实施例的阵列基板并不会额外增加制作成本，具有很高应用价值。
进一步地，本实施例的制作方法还包括：
形成绝缘层的步骤，该绝缘层设置在导电图形与所述金属图形之间。在本步骤中，通过对绝缘层进行过孔，使静电释放图形通过绝缘层的过孔连接与金属图形连接。
下面对本实施例的制作方法进行详细描述。
以制作一底栅形的阵列基板为例，该阵列基板线依次形成栅线、栅绝缘层、源漏金属图形、钝化层以及透明电极。为消除源漏金属图形以及透明电极在构图过程中对栅线产生的静电，本发明的制作方法包括：
步骤一，如图4A所示，依次形成栅线41以及栅绝缘层42。
步骤二，如图4B所示，对栅绝缘层42进行过孔，过孔的数量可以是一个或者大于一个。
步骤三，如图4C所示，通过一构图工艺，同层同材料形成源漏金属图形(未画出)以及静电释放图形的第一部分43，该静电释放图形的第一部分43通过上述步骤二在栅绝缘层42上形成的过孔，与栅线41连接。
步骤四，如图4D所示，沉积钝化层44；
步骤五，如图4E所示，对钝化层44进行过孔，过孔的数量可以是一个或者大于一个；
步骤六，如图4F所示，通过同一构图工艺，同层同材料形成透明电极(未画出)以及静电释放图形的第二部分45，该另一静电释放图形的第二部分45通过上述步骤五在钝化层44形成的过孔，与静电释放图形的第一部分43连接。
综上所述，本实施的制作方法与本发明的阵列基板相对应，因此能够实现相同的技术效果。
以上所述是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (5)

1.一种阵列基板，包括依次形成在衬底基板上的金属图形以及导电图形，所述导电图形与所述金属图形绝缘，其特征 在于，所述阵列基板还包括：
与所述导电图形同层同材料形成的静电释放图形，所述静电释放图形与所述导电图形绝缘，并连接所述金属图形；
所述金属图形为信号线，所述信号线包括栅线或数据线；
所述静电释放图形包括：
第一静电释放图形，设置在阵列基板的压接区域内，与所述信号线的输入端连接；和/或
第二静电释放图形，设置在阵列基板的显示区域内，与所述信号线的输出端连接。
2.根据权利要求1所述的阵列基板，其特征在于，
所述第一静电释放图形为矩形，且矩形的面积为25μ m2～400μ m2。
3.根据权利要求1所述的阵列基板，其特征在于，
所述导电图形与所述金属图形之间设置有绝缘层；
所述第一静电释放图形通过所述绝缘层上的至少两个过孔与所述信号线连接。
4.一种阵列基板的制作方法，包括依次在衬底基板上形成金属图形以及导电图形的步骤，其特征在于，
在形成所述导电图形的构图工艺中，还形成与所述导电图形绝缘的静电释放图形，所述静电释放图形与所述金属图形连接；
所述金属图形为信号线，所述信号线包括栅线或数据线；
所述静电释放图形包括：
第一静电释放图形，设置在阵列基板的压接区域内，与所述信号线的输入端连接；和/或
第二静电释放图形，设置在阵列基板的显示区域内，与所述信号线的输出端连接。
5.根据权利要求4所述的制作方法，其特征在于，还包括：
形成绝缘层的步骤，所述绝缘层设置在所述导电图形与所述金属图形之间，且具有过孔；
其中，所述静电释放图形通过所述过孔连接所述金属图形。
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Families Citing this family (7)

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Publication number Priority date Publication date Assignee Title
CN105489596B (zh) 2016-01-04 2019-05-21 京东方科技集团股份有限公司 一种阵列基板及制作方法
CN106960851B (zh) * 2017-05-24 2020-02-21 京东方科技集团股份有限公司 阵列基板及其制作方法、显示面板和显示设备
CN109727973B (zh) * 2019-01-02 2021-04-23 合肥鑫晟光电科技有限公司 阵列基板的制备方法、阵列基板
CN114678382A (zh) * 2019-02-22 2022-06-28 群创光电股份有限公司 显示装置
CN110112307B (zh) * 2019-04-11 2021-08-24 Tcl华星光电技术有限公司 显示面板
CN110504292B (zh) * 2019-08-28 2022-08-05 昆山国显光电有限公司 阵列基板、显示面板及显示装置
CN114063357B (zh) * 2020-08-03 2023-09-12 深超光电（深圳）有限公司 薄膜晶体管基板与液晶显示面板

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104979217A (zh) * 2015-07-28 2015-10-14 京东方科技集团股份有限公司 阵列基板及其制作方法以及显示装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2764139B2 (ja) * 1989-10-20 1998-06-11 ホシデン・フィリップス・ディスプレイ株式会社 アクティブマトリックス液晶表示素子
KR100252308B1 (ko) * 1997-01-10 2000-04-15 구본준, 론 위라하디락사 박막트랜지스터 어레이
TW561297B (en) * 1997-11-25 2003-11-11 Toshiba Corp Electrode wiring board subjected to counter measure against static electricity and display device using the same
US6943396B2 (en) * 2003-06-17 2005-09-13 Infineon Technologies Ag Electro-static discharge protection circuit and method for making the same
US20050184392A1 (en) * 2004-02-23 2005-08-25 Kun-Hong Chen Method for fabricating interconnect and interconnect fabricated thereby
KR101108782B1 (ko) * 2004-07-30 2012-02-24 엘지디스플레이 주식회사 액정 표시 장치 및 그 제조 방법
CN100557494C (zh) * 2006-09-01 2009-11-04 北京京东方光电科技有限公司 一种tft lcd面板静电放电保护电路
CN101847648B (zh) * 2009-03-23 2012-11-21 北京京东方光电科技有限公司 有源矩阵有机发光二极管像素结构及其制造方法
CN102945846B (zh) * 2012-09-28 2016-03-30 京东方科技集团股份有限公司 阵列基板及其制造方法、显示装置
CN103513459A (zh) * 2013-10-14 2014-01-15 北京京东方光电科技有限公司 阵列基板及其制备方法、显示装置及其制备方法
CN104460070B (zh) * 2014-12-31 2018-09-07 合肥鑫晟光电科技有限公司 显示面板及其制作方法、显示装置
CN105140179B (zh) * 2015-08-13 2018-12-14 京东方科技集团股份有限公司 阵列基板及其制造方法、显示面板和显示装置
CN205385018U (zh) * 2016-01-04 2016-07-13 京东方科技集团股份有限公司 一种阵列基板及显示装置
CN105489596B (zh) * 2016-01-04 2019-05-21 京东方科技集团股份有限公司 一种阵列基板及制作方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104979217A (zh) * 2015-07-28 2015-10-14 京东方科技集团股份有限公司 阵列基板及其制作方法以及显示装置

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