CN105489145B - The device and method for vertically moving figure signal is produced based on FPGA - Google Patents
The device and method for vertically moving figure signal is produced based on FPGA Download PDFInfo
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- CN105489145B CN105489145B CN201510866554.4A CN201510866554A CN105489145B CN 105489145 B CN105489145 B CN 105489145B CN 201510866554 A CN201510866554 A CN 201510866554A CN 105489145 B CN105489145 B CN 105489145B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1306—Details
- G02F1/1309—Repairing; Testing
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Abstract
The invention discloses a kind of device that figure signal is vertically moved based on FPGA generations, its image movement mould and image vertically moves control module and integrated in field programmable gate array, image memory interface is the image input of field programmable gate array, vertically move the output end of image that image output interface is field programmable gate array, the signal input part that image vertically moves control module is the control signal input of field programmable gate array, and image memory interface connection figure picture vertically moves the signal input part of module；The signal output part connection that described image vertically moves module vertically moves image output interface, image vertically move the image movement control signal output of control module respectively connection figure as memory interface and image vertically move the control signal input of module；Image memory interface is used to receive original static stationary view data.The present invention can move the display of effect, and can be by its translational speed of upper-layer configured and time.
Description
Technical field
The present invention relates to the display of liquid crystal module and technical field of measurement and test, and in particular to one kind is based on FPGA (Field-
Programmable Gate Array, i.e. field programmable gate array) produce the device and method for vertically moving figure signal.
Technical background
With the development of liquid crystal display, display effect is increasingly clear, true to nature, and therefore, many display products are not only used
Shown in common picture, text, be also widely used in the programs such as viewing video display, match by people.In order to meet the need of consumer
Ask, be on a good wicket also under market competition, now increasing display device producer pay attention to day by day display module
Display effect under dynamic menu or picture change, and put into great amount of cost and carry out correlative study.
These producers need image signal source to carry out regular shifting to caused image in research and development, production, debugging
Dynamic (such as vertically moving) shows display effect of the product under dynamic change to detect it.But the common image signal source of in the market
There is no similar functions.
The content of the invention
The purpose of the present invention is to be directed to above-mentioned technical problem, there is provided a kind of produced based on FPGA vertically moves figure signal
Device and method, the device and method can carry out the display of vertical moving effect, and can be by upper-layer configured its translational speed, movement
Time, and different resolution can be supported.
In order to achieve this, producing the device for vertically moving figure signal based on FPGA designed by the present invention, it includes
Image memory interface, image vertically move module, image vertically moves control module and vertically move image output interface, described
Image vertically moves module and image vertically moves control module and integrated in field programmable gate array, and described image storage connects
Mouth is the image input of field programmable gate array, and the image output interface that vertically moves is field programmable gate array
Output end of image, the signal input part that described image vertically moves control module are defeated for the control signal of field programmable gate array
Enter end, described image memory interface connection figure picture vertically moves the signal input part of module；Described image vertically moves module
Signal output part connection vertically moves image output interface, and the image that described image vertically moves control module vertically moves control
Connection figure vertically moves the control signal input of module as memory interface and image to signal output part respectively；Described image stores
Interface is used to receive original static stationary view data.
A kind of that the method for vertically moving figure signal is produced based on FPGA, it comprises the following steps：
Step 1：The control signal input of field programmable gate array receive vertically move picture start order and
After vertically moving frame parameter, the raw image data that image input inputs is sent into scene according to image clock signal to compile
Journey gate array carries out vertical image movement processing and obtains vertically moving view data；
Step 2：According to relative delay and the shake vertically moved described in the movement of image clock signal in view data, and will
Vertically moving view data and image clock signal, synchronously alignment generation vertically moves picture signal.
Beneficial effects of the present invention are：
1st, the present invention can show the static raw frames of certain image (BMP images, logic picture) by upper-layer configured,
And can shows its picture effect vertically moved simultaneously to the image.
2nd, the picture shown by the present invention can follow repeatedly when being vertically moved from the 1st pixel to a last pixel
Ring moves.It positive can move display (from top to bottom), can also move backward display (from top to bottom).
3rd, the present invention by the various move modes of high-level interface module setting screen, stopping, translational speed, movement
Duration and moving image frame number.
4th, the present invention can be set whether show the last mobile figure stopped after picture moving terminates by high-level interface module
The original image not moved as still returning to display.
5th, the present invention can show static raw frames, and and can carries out the display of vertical moving effect, and can be by upper strata
Its translational speed, traveling time are configured, and different resolution can be supported.Meet client needs figure in research and development, production, debugging
As signal source can carry out the technical requirements of regular movement to caused image.
6th, the present invention can realize the function by using fpga chip, and it is easy that technical scheme is realized, and cost of implementation
It is relatively low, and working stability.
Brief description of the drawings
Fig. 1 is the structural representation of the present invention；
Fig. 2 is the schematic diagram that image is vertically moved with 1 pixel in the present invention；
Fig. 3 is the schematic diagram that image is vertically moved with 2 pixels in the present invention；
Wherein, 1-image memory interface, 2-raw image data cache module, 3-raw image data read control
Module, 4-image vertically move module, 5-vertically moving data cache module, 6-vertically move view data output module,
7-vertically move image generating module, 8-image synchronization buffer module, 9-image and vertically move control module, 10-image
Sequence generation module, 11-vertically move image output interface, 12-high-level interface module, 13-image storage module, 14-
Image generating module, 15-video memory module, 16-logic picture module.
Embodiment
Below in conjunction with drawings and examples, the present invention is described in further detail：
As shown in Figure 1 produces the device for vertically moving figure signal based on FPGA, and it includes image memory interface 1, figure
As vertically moving module 4, image vertically moves control module 9 and vertically moving image output interface 11, described image is vertically moved
Dynamic model block 4 and image vertically move control module 9 and are integrated in field programmable gate array, and described image memory interface 1 is existing
The image input of field programmable gate array, it is described to vertically move the image that image output interface 11 is field programmable gate array
Output end, the signal input part that described image vertically moves control module 9 input for the control signal of field programmable gate array
End, the connection figure picture of described image memory interface 1 vertically move the signal input part of module 4；Described image vertically moves module 4
Signal output part connection vertically moves image output interface 11, and the image that described image vertically moves control module 9 vertically moves
Connection figure vertically moves the control signal input of module 4 as memory interface 1 and image to control signal output respectively；The figure
As memory interface 1 is used to receive original static stationary view data.
In above-mentioned technical proposal, the field programmable gate array be also integrated with raw image data read control module 3,
Vertically move view data output module 6, vertically move image generating module 7 and image sequence generation module 10；Described image
Sequence generation module 10 is respectively described to vertically move image generating module 7 and image vertically moves control module 9 and provides pixel
Clock and image clock signal, it is respectively that the view data that vertically moves exports mould that described image, which vertically moves control module 9,
Block 6 vertically moves control signal with the offer image of image generating module 7 is vertically moved, and described image memory interface 1 is by original
It is that described image vertically moves the offer original static stationary view data of module 4 that view data, which reads control module 3, and described image is vertical
Mobile module 4, which passes sequentially through, described to be vertically moved view data output module 6, vertically moves image generating module 7 and moved to vertical
The output of motion video output interface 11 vertically moves picture signal.
In above-mentioned technical proposal, the field programmable gate array is also integrated with raw image data cache module 2, described
Image memory interface 1 is that raw image data reading control module 3 provides by the raw image data cache module 2
Original static stationary view data.
In above-mentioned technical proposal, the raw image data reading control module 3 vertically moves module 4 for image and provides original
Beginning Still image data, image vertically move module 4 and vertically moved for the offer image of view data output module 6 that vertically moves
Dynamic signal.
In above-mentioned technical proposal, described image vertically move control module 9 for image vertically move module 4 provide image hang down
Control signal is moved in translation, and receives image and vertically move the image of module 4 to vertically move status signal.
In above-mentioned technical proposal, the field programmable gate array, which is also integrated with, vertically moves data cache module 5, described
Image vertically moves module 4 and vertically moves view data output module 6 with described by the data cache module 5 that vertically moves
Connection.
In above-mentioned technical proposal, the field programmable gate array is also integrated with image synchronization buffer module 8, described vertical
Mobile image generation module 7 is connected by described image sync buffering module 8 with the image output interface 11 that vertically moves.
A kind of that the method for vertically moving figure signal is produced based on FPGA, it comprises the following steps：
Step 1：The control signal input of field programmable gate array receive vertically move picture start order and
After vertically moving frame parameter, the raw image data that image input inputs is sent into scene according to image clock signal to compile
Journey gate array carries out vertical image movement processing and obtains vertically moving view data；
Step 2：According to relative delay and the shake vertically moved described in the movement of image clock signal in view data, and will
Vertically moving view data and image clock signal, synchronously alignment generation vertically moves picture signal；
Step 3：Vertically moving image generating module 7 and will vertically move image and be conveyed to figure in field programmable gate array
As sync buffering module 8, synchronism output is vertically moved image output interface after the progress image buffers of image synchronization buffer module 8
11, vertically move the upper strata point screen interface standard signals that image output interface 11 is inputted according to high-level interface module 12 and produce phase
The vision signal answered, and light display module simultaneously from image channel.
In the step 1 of above-mentioned technical proposal, the control signal input of field programmable gate array, which receives, to be vertically moved
Picture starts order and after vertically moving frame parameter, the original image for being inputted image input according to image clock signal
Data feeding field programmable gate array progress image movement handles to obtain the specific method for vertically moving view data：Scene
Image in programmable gate array vertically moves control module 9 and vertically moves picture from what high-level interface module 12 received upper strata
Start order, and vertically move frame parameter (such as translational speed, mobile duration, moving image frame number, oblique line movement are oblique
Rate, forward and reverse mobile control) when, image sequence generation module 10 vertically moves control module 9 to image and vertically moves image
The transport picture clock signal of generation module 7, the figure selecting control that the image clock signal is sent with high-level interface module 12 are believed
Number together, control image vertically moves control module 9 and vertically moves module 4 to image memory interface 1, image respectively, vertical moves
Video data output module 6 moves control signal with the transport picture of image generating module 7 is vertically moved, and makes image memory interface
1, which will need the image that vertically moves by raw image data to read control module 3 and be conveyed to image and vertically move module 4, is carried out
Image vertically moves processing, vertically move the data after handling by vertically moving view data output module 6 and vertical shifting
Exported after the processing of motion video generation module 7, obtain field programmable gate array output vertically moves view data.
In the step 1 of above-mentioned technical proposal, when upper strata requires to show BMP (Bitmap, image file format) image, figure
As generation module 14 according to the order and image resolution ratio parameter of high-level interface module 12 reads phase from BMP image storage apparatus
The BMP images of resolution ratio are answered, and they are sent into image storage module 13 one by one and preserved, image storage module 13 is according to upper
Layer configuration image resolution ratio and amount of images, opened up in video memory module 15 suitable storage region and by it successively
Deposit；When high-level interface module 12 requires display logic picture, image generating module 14 starts logic picture module 16 and worked,
And input upper strata and want display logic picture type and display parameters, so that logic picture module 16 produces required logic and drawn
Face, image generating module 14 is equally sent to image storage module 13, and image storage module 13 is then deposited into image and deposited
Logic picture storage region in memory modules 15.
Shown RGB image time sequence parameter is also issued figure by high-level interface module 12 by high-level interface module 12 simultaneously
As sequence generation module 10, image sequence generation module 10 produces required pixel clock and RGB image clock signal accordingly
(VSYNC vertical synchronization, the synchronization of HSYNC rows, DE video datas useful signal) vertically moves control module 9 and vertical shifting to image
Motion video generation module 7 forms RGB (color of red, green, blue three) image.
In the step 1 of above-mentioned technical proposal, when image, which vertically moves module (4), to carry out vertically moving processing, carry out such as
Lower step process, as described in Fig. 2 and Fig. 3：
Step 111：When the configuration of high-level interface module 12 vertically moves parameter, vertically moving parameter includes the side of vertically moving
To, translational speed, mobile image stop frame number, image memory interface 1 by it is above-mentioned vertically move parameter and inform vertically move data
Cache module 5, vertically move data cache module 5 then according to vertically move in parameter vertically move direction, translational speed will
Mobile line number shown by per a line vertically moves status signal notification image by image and vertically moves control module 9, schemes
Control image memory interface 1 then sequentially to read corresponding row data as vertically moving control module 9 and be cached to raw image data
(a few row images being currently needed for, rather than all row images are so only stored in, so as to reduce required delay in cache module 2
Space is deposited, reduces the complexity and fallibility of data movement, and improves the reliability of mobile image), image is vertical
Mobile control module 9 synchronizes and coordinated control to different initial data inputs, with ensure image reading can it is efficient with
Operation will not be caused to interlock and conflict；
Step 112：After the completion of the caching of raw image data cache module 2, image vertically moves the control figure of control module 9
The read operation for starting raw image data as vertically moving module 4 and reading control module 3；
Image is controlled to vertically move when image vertically moves module 4, and when to vertically move speed be 1 pixel, image hangs down
Straight mobile module 4 first passes through the pixel of raw image data reading taking-up last column of control module 3 and is stored in and vertically moves
In data cache module 5, further take out the pixel of the first row and be stored in and vertically move the follow-up caching of data cache module 5
In address, the pixel of last column before the taking-up circulated in this mode after single treatment is simultaneously stored in and vertically moves number
According to the first row after single treatment before in the follow-up buffer address of cache module 5, then further taking out pixel and be stored in
Vertically move in the follow-up buffer address of data cache module 5, the image pixel after being vertically moved.
In the step 112, image is controlled to vertically move when image vertically moves module 4, and vertically move speed as n
Pixel, and during n ＞ 1, image vertically moves module 4 and first passes through the picture that raw image data reading control module 3 takes out last n rows
Element is simultaneously stored in and vertically moved in data cache module 5, the pixel of n rows and is stored in before further taking out and vertically moves data and delay
In the follow-up buffer address of storing module 5, the pixel of the last n rows before the taking-up circulated in this mode after single treatment and by its
It is stored in and vertically moves in the follow-up buffer address of data cache module 5, the picture of the preceding n rows before then further taking out after single treatment
Element is simultaneously stored in and vertically moved in the follow-up buffer address of data cache module 5, the image pixel after being vertically moved.
The step 2 is carried out after the step 112, step 2 concretely comprises the following steps：Image vertically moves control module 9
Vertically moving view data output module 6 according to image clock signal control caused by image sequence generation module 10 will be cached
The view data that vertically moves export to image generating module 7 is vertically moved, vertically move image generating module 7 and remove vertical shifting
Relative delay and shake in video data, vertically move view data and image clock signal synchronously aligns, so as to produce
The picture signal vertically moved, and be sent into image synchronization buffer module 8 and export.
In above-mentioned technical proposal, due to the visual persistence phenomenon of human eye, the principle that moving image is shown on module is every
The mobile image of secondary fixation shows next time fixed mobile image again after showing some frame numbers, and such human eye looks that image is
Coherent movement, so, the timing of picture moving speed one (i.e. pixel movement interval holding is constant), each mobile image show frame
Number is more, similarly, when each mobile image shows that frame number is constant, faster (the i.e. pixel movement interval of each picture moving speed
Become big), then human eye looks the faster of image movement, on the contrary then slower.Above it is stated that the operation of picture moving speed, now
Illustrate the operation of picture moving frame number：After upper-layer configured picture moves frame number every time, start when moving horizontally picture by vertical
When mobile image generation module 7 exports, image vertically moves control module 9 while monitoring is vertically moving image generating module 7
In each moving image output frame number, detect the output of current moving image when image vertically moves control module 9
When frame number is not reaching to configured frame number, then image vertically moves control module 9 and controls image to vertically move module 4 and still produce
The original position of the circulation read operation of raw current moving image, i.e. original image pixels is constant, so then maintains current vertical
Moving image shows that every time after the frame image data for vertically moving image generating module 7 all exports, image vertically moves
Control module 9 controls image memory interface 1 to read the row view data of beginning two of original image again and is cached to original graph
As in data cache module 2, and control image to vertically move module 4 and carry out same moving operation, from image memory interface 1 to
All it is then constantly to cache next line when a line operates during vertically moving data cache module 5, when image vertically moves
Control module 9 detects (this when the current moving image output frame number vertically moved in image generating module 7 reaches configuration frame number
When present frame data all passed), then image vertically moves control module 9 and equally controls image memory interface 1 to input original
Beginning picturedeep evidence, and control image to move left and right the operation that module 4 carries out next moving image, i.e., from next mobile pixel
Reading is started the cycle over, the interval of now next mobile pixel (such as from pixel 1, is spaced 2 pixels, circulated since pixel 3
Read) it is that translational speed also by image vertically moves control module 9 controlling image to move left and right module 4 and produces new hang down
Translation video data.So as to realize the new display for vertically moving image frame.
In above-mentioned technical proposal, detect that to vertically move image generating module 7 inner each when image vertically moves control module 9
When the individual mobile totalframes for vertically moving picture output or movement reach totalframes or the total time that upper strata is configured total time, etc.
After the completion of last frame mobile image has exported, " image of last transportable frame whether can be shown also further according to set by upper strata
To return to show static original image " command operation, when to show last transportable frame, then image vertically moves control mould
Block 9 is as constant in kept moving picture data, when to return to display original image, then stops the module of related moving operation, and
Control vertically moves image generating module 7 and directly reads original graph under RGB clock signal synchronizations by image memory interface 1
As data, so as to export original static stationary data.
In above-mentioned technical proposal, no matter original static stationary image or vertically move image be output to vertically move image output
During interface 11, output video standard that image output interface 11 is configured according to the upper strata of image memory interface 1 is vertically moved (such as
LVDS low-voltage differential signals, MIPI movement Industry Processor Interfaces signal, DP high-definition digitals display interface signals, V-By-One
Video standard etc.) and various video standards configured transmission (such as LVDS standards VESA/JEIDA coding, transmission Link links
Number；The transmission Lane port numbers of MIPI standards, Video/Command patterns；DP1.1/1.2, driving preemphasis, the V- of DP standards
The data transmission rates of By-One standards, data array etc.) required corresponding vision signal is converted into, and synchronize defeated
Go out.
The content that this specification is not described in detail belongs to prior art known to professional and technical personnel in the field.
Claims (11)
1. a kind of produce the device for vertically moving figure signal based on FPGA, it is characterised in that：It includes image memory interface
(1), image vertically moves module (4), image vertically moves control module (9) and vertically moves image output interface (11), institute
State that image vertically moves module (4) and image vertically moves control module (9) and is integrated in field programmable gate array, the figure
As the image input that memory interface (1) is field programmable gate array, the image output interface (11) that vertically moves is existing
The output end of image of field programmable gate array, the signal input part that described image vertically moves control module (9) can be compiled for scene
The control signal input of journey gate array, described image memory interface (1) connection figure picture vertically move the signal input of module (4)
End；The signal output part connection that described image vertically moves module (4) vertically moves image output interface (11), and described image is hung down
The image that control module (9) is moved in translation vertically moves control signal output difference connection figure as memory interface (1) and image hang down
The control signal input of straight mobile module (4)；Described image memory interface (1) is used to receive original static stationary view data；
Described image vertically move module (4) be used for vertically move image output interface (11) output vertically move image letter
Number；
Described image vertically move control module (9) for image vertically move module (4) provide image vertically move control signal,
And receive image and vertically move the image of module (4) to vertically move status signal.
2. according to claim 1 produce the device for vertically moving figure signal based on FPGA, it is characterised in that：It is described existing
Field programmable gate array is also integrated with raw image data and reads control module (3), vertically moves view data output module
(6) image generating module (7) and image sequence generation module (10), are vertically moved；Described image sequence generation module (10) point
Image generating module (7) described Wei not be vertically moved and when image vertically moves control module (9) offer pixel clock and image
Sequential signal, it is respectively the view data output module (6) and vertically of vertically moving that described image, which vertically moves control module (9),
Mobile image generation module (7) provides image and vertically moves control signal, and described image memory interface (1) passes through original image number
It is that described image vertically moves module (4) offer original static stationary view data according to control module (3) is read, described image is vertically moved
Dynamic model block (4), which passes sequentially through, described to be vertically moved view data output module (6), vertically moves image generating module (7) to hanging down
Translation motion video output interface (11) output vertically moves picture signal；
It is that image vertically moves module (4) offer original static stationary view data that the raw image data, which reads control module (3),
Image vertically moves module (4) and vertically moves signal for view data output module (6) the offer image that vertically moves；
Image vertically moves control module (9) image clock signal control according to caused by image sequence generation module (10) and hung down
Translation video data output module (6) exports the view data that vertically moves cached to vertically moving image generating module
(7)；
The image generating module (7) that vertically moves removes relative delay and the shake vertically moved in view data, vertical to move
Video data and image clock signal synchronously align, so as to produce the picture signal vertically moved.
3. according to claim 2 produce the device for vertically moving figure signal based on FPGA, it is characterised in that：It is described existing
Field programmable gate array is also integrated with raw image data cache module (2), and described image memory interface (1) passes through described original
View data cache module (2) is that the raw image data reads control module (3) offer original static stationary view data；
Image vertically moves control module (9) control image memory interface (1) and sequentially reads corresponding row data buffer storage original graph
As in data cache module (2).
4. according to claim 3 produce the device for vertically moving figure signal based on FPGA, it is characterised in that：It is described existing
Field programmable gate array, which is also integrated with, vertically moves data cache module (5), and described image vertically moves module (4) by described
Data cache module (5) is vertically moved to be connected with the view data output module (6) that vertically moves；
Vertically move data cache module (5) according to vertically move in parameter vertically move direction, translational speed will be per a line
Shown mobile line number vertically moves status signal notification image by image and vertically moves control module (9).
5. according to claim 4 produce the device for vertically moving figure signal based on FPGA, it is characterised in that：It is described existing
Field programmable gate array is also integrated with image synchronization buffer module (8), and the image generating module (7) that vertically moves is by described
Image synchronization buffer module (8) is connected with the image output interface (11) that vertically moves；
Vertically moving image generating module (7) and image will be vertically moved be conveyed to image synchronization and delay in field programmable gate array
Die block (8), synchronism output is to being vertically moved image output interface after image synchronization buffer module (8) carries out image buffers
(11)。
6. a kind of produce the method for vertically moving figure signal based on FPGA, it is characterised in that it comprises the following steps：
Step 1：The control signal input of field programmable gate array, which receives, to be vertically moved picture and starts order and vertical
After moving image parameter, the raw image data for being inputted image input according to image clock signal is sent into field programmable gate
Array carries out vertical image movement processing and obtains vertically moving view data；
Step 2：According to relative delay and the shake vertically moved described in the movement of image clock signal in view data, and will be vertical
Synchronously alignment generation vertically moves picture signal for moving image data and image clock signal.
7. according to claim 6 produce the method for vertically moving figure signal based on FPGA, it is characterised in that：
Also include step 3 after the step 2：The image generating module (7) that vertically moves in field programmable gate array will be vertical
Mobile image is conveyed to image synchronization buffer module (8), and synchronism output is given after image synchronization buffer module (8) carries out image buffers
Image output interface (11) is vertically moved, vertically moves what image output interface (11) was inputted according to high-level interface module (12)
Upper strata point screen interface standard signals produce corresponding vision signal, and light display module simultaneously from image channel.
8. according to claim 6 produce the method for vertically moving figure signal based on FPGA, it is characterised in that：The step
In rapid 1, the control signal input of field programmable gate array, which receives, to be vertically moved picture startup order and vertically moves
After frame parameter, the raw image data for being inputted image input according to image clock signal is sent into field programmable gate array
Progress image movement handles to obtain the specific method for vertically moving view data：Image in field programmable gate array is vertical
The picture that vertically moves that mobile control module (9) receives upper strata from high-level interface module (12) starts order, and vertical shifting
During dynamic frame parameter, image sequence generation module (10) vertically moves control module (9) to image and vertically moves image generation
Module (7) transport picture clock signal, the figure selecting control that the image clock signal is sent with high-level interface module (12) are believed
Number together, control image vertically move control module (9) respectively to image memory interface (1), image vertically move module (4),
Vertically move view data output module (6) and vertically move image generating module (7) transport picture movement control signal, make figure
Hung down as the image for needing to vertically move is conveyed to image by memory interface (1) by raw image data reading control module (3)
Straight mobile module (4) carries out image and vertically moves processing, vertically move the data after handling by vertically moving view data
Output module (6) and vertically move image generating module (7) processing after export, obtain field programmable gate array output it is vertical
Moving image data.
9. according to claim 8 produce the method for vertically moving figure signal based on FPGA, it is characterised in that：The step
In rapid 1, when image, which vertically moves module (4), to carry out vertically moving processing, following steps processing is carried out：
Step 111：When high-level interface module (12) configuration vertically move parameter, vertically move parameter include vertically move direction,
Translational speed, mobile image stop frame number, and the above-mentioned parameter that vertically moves is informed that vertically moving data delays by image memory interface (1)
Storing module (5), vertically move data cache module (5) and then vertically move direction, translational speed according to vertically moving in parameter
Mobile line number shown by every a line is vertically moved into status signal notification image by image and vertically moves control module
(9), image vertically moves control module (9) control image memory interface (1) and then sequentially reads corresponding row data and be cached to original
In beginning view data cache module (2), image vertically move control module (9) different initial data inputs are synchronized and
Coordinate control, to ensure that image reading will not cause operation to interlock and conflict；
Step 112：After the completion of raw image data cache module (2) caching, image vertically moves control module (9) control figure
The read operation for starting raw image data as vertically moving module (4) and reading control module (3)；
Vertically moved when image vertically moves module (4) control image, and when to vertically move speed be 1 pixel, image is vertical
Mobile module (4) first passes through raw image data and reads the pixel of control module (3) taking-up last column and be stored in vertical shifting
In dynamic data cache module (5), further take out the pixel of the first row and be stored in that to vertically move data cache module (5) follow-up
Buffer address in, be simultaneously stored in vertical according to the pixel of last column before the taking-up of read operation circulation after single treatment
Translation is moved in the follow-up buffer address of data cache module (5), and the pixel of the first row before then further taking out after single treatment is simultaneously
It is stored in and is vertically moved in the follow-up buffer address of data cache module (5), the image pixel after being vertically moved.
10. according to claim 9 produce the method for vertically moving figure signal based on FPGA, it is characterised in that：It is described
In step 112, vertically moved when image vertically moves module (4) control image, and it is n pixel to vertically move speed, and n ＞
When 1, image vertically moves module (4) and first passes through the pixel of the last n rows of raw image data reading control module (3) taking-up and deposit
It is put into and vertically moves in data cache module (5), the pixel of n rows and is stored in before further taking out and vertically moves data buffer storage mould
In the follow-up buffer address of block (5), according to the last n rows before the taking-up of read operation circulation after single treatment pixel and by its
It is stored in and vertically moves in the follow-up buffer address of data cache module (5), the preceding n rows before then further taking out after single treatment
Pixel and being stored in is vertically moved in the follow-up buffer address of data cache module (5), the image after being vertically moved
Pixel.
11. according to claim 10 produce the method for vertically moving figure signal based on FPGA, it is characterised in that：It is described
The step 2 is carried out after step 112, step 2 concretely comprises the following steps：Image vertically moves control module (9) according to image sequential
It is vertical by what is cached to vertically move view data output module (6) for the control of image clock signal caused by generation module (10)
Moving image data is exported to image generating module (7) is vertically moved, and is vertically moved image generating module (7) removal and is vertically moved
Relative delay and shake in view data, vertically move view data and image clock signal synchronously aligns, vertical so as to produce
The dynamic picture signal of translation, and it is sent into image synchronization buffer module (8) output.
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