CN105489145A - Device and method capable of generating vertically-moving graphic signals based on FPGA (field-programmable gate array) - Google Patents
Device and method capable of generating vertically-moving graphic signals based on FPGA (field-programmable gate array) Download PDFInfo
- Publication number
- CN105489145A CN105489145A CN201510866554.4A CN201510866554A CN105489145A CN 105489145 A CN105489145 A CN 105489145A CN 201510866554 A CN201510866554 A CN 201510866554A CN 105489145 A CN105489145 A CN 105489145A
- Authority
- CN
- China
- Prior art keywords
- image
- module
- vertical
- vertical mobile
- mobile
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1306—Details
- G02F1/1309—Repairing; Testing
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Image Processing (AREA)
Abstract
The invention discloses a device capable of generating vertically-moving graphic signals based on an FPGA (field-programmable gate array). The device is characterized in that an image vertical movement module and an image vertical movement control module are integrated in the field-programmable gate array, an image storage interface is the image input end of the field-programmable gate array and is connected with the signal input end of the image vertical movement control module, a vertically-moving image output interface is the image output end of the field-programmable gate array, and the signal input end of the image vertical movement control module is the control signal input end of the field-programmable gate array. The signal output end of the image vertical movement control module is connected with the vertically-moving image output interface, the image movement control signal output end of the image vertical movement control module is connected with the image storage interface and the control signal input end of the image vertical movement module, and the image storage interface is used for receiving original static image data. The device capable of generating the vertically-moving graphic signals based on the FPGA is capable of displaying movement effect and configuring movement speed and time of the signals by the upper layer.
Description
Technical field
The present invention relates to display and the technical field of measurement and test of liquid crystal module, be specifically related to a kind of device and method producing vertical mobile graphics signal based on FPGA (Field-ProgrammableGateArray, i.e. field programmable gate array).
Technical background
Along with the development of liquid crystal display, display effect is increasingly clear, true to nature, and therefore, many display products, not only for common picture, text display, are also widely used in program such as viewing video display, match etc. by people.In order to satisfy the demands of consumers, also in order to be on a good wicket under market competition, the now display effect of increasing display device producer pay attention to day by day display module under dynamic menu or picture change, and drop into great amount of cost and carry out correlative study.
These producers researching and developing, produce, debugging time need image signal source can carry out regular movement (as vertical movement) to the image produced to detect its display display effect of product under dynamic change.But image signal source common on market does not have similar functions.
Summary of the invention
The object of the invention is for above-mentioned technical matters, a kind of device and method producing vertical mobile graphics signal based on FPGA is provided, this device and method can carry out the display of vertical moving effect, and by its translational speed of upper-layer configured, traveling time, and can support different resolution.
For realizing this object, the device producing vertical mobile graphics signal based on FPGA designed by the present invention, it comprises image memory interface, the vertical mobile module of image, the vertical mobile control module of image and vertical mobile image output interface, the vertical mobile module of described image mobile control module vertical with image is integrated in field programmable gate array, described image memory interface is the image input of field programmable gate array, described vertical mobile image output interface is the output end of image of field programmable gate array, the signal input part of the vertical mobile control module of described image is the control signal input end of field programmable gate array, the signal input part of the vertical mobile module of described image memory interface connection layout picture, the signal output part of the vertical mobile module of described image connects vertical mobile image output interface, and the vertical mobile control signal output terminal of image of the vertical mobile control module of described image distinguishes the control signal input end of connection layout as memory interface mobile module vertical with image, described image memory interface is for receiving original static stationary view data.
Produce a method for vertical mobile graphics signal based on FPGA, it comprises the steps:
Step 1: after the control signal input end of field programmable gate array receives vertical moving image startup command and vertical moving image parameter, raw image data feeding field programmable gate array input by image input according to image clock signal carries out vertical image and moves process and obtain vertical moving image data;
Step 2: move the relative delay and jitter in described vertical moving image data according to image clock signal, and the vertical mobile picture signal of generation that vertical moving image data and image clock signal are synchronously alignd.
Beneficial effect of the present invention is:
1, the present invention can show the static raw frames of certain image (BMP image, logic picture) by upper-layer configured, can show again the picture effect of its vertical movement to this image simultaneously.
2, the picture shown by the present invention, when vertically moving, can move from the 1st pixel to last pixel iterative cycles.Can forward mobile display (from top to bottom), also can reverse mobile display (from top to bottom).
3, the present invention by the various move modes of high-level interface module installation picture, stopping, translational speed, mobile duration and moving image frame number.
4, whether the present invention can show by high-level interface module installation the original image that the last mobile image stopped still returning display movement after picture moving terminates.
5, the present invention can show static raw frames, can carry out again the display of vertical moving effect, and by its translational speed of upper-layer configured, traveling time, and can support different resolution.Meeting client needs image signal source can carry out the technical requirement of regular movement to the image produced when research and development, production, debugging.
6, the present invention is by realizing described function with fpga chip, and technical scheme realizes easily, and it is lower to realize cost, and working stability.
Accompanying drawing explanation
Fig. 1 is structural representation of the present invention;
Fig. 2 be in the present invention image with the schematic diagram of the vertical movement of 1 pixel;
Fig. 3 be in the present invention image with the schematic diagram of the vertical movement of 2 pixels;
Wherein, 1-image memory interface, 2-raw image data cache module, 3-raw image data reads control module, the vertical mobile module of 4-image, 5-vertical Mobile data cache module, 6-vertical moving image data output module, 7-vertical mobile image generating module, 8-image synchronization buffer module, the vertical mobile control module of 9-image, 10-image sequence generation module, 11-vertical mobile image output interface, 12-high-level interface module, 13-image storage module, 14-image generating module, 15-video memory module, 16-logic picture module.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail:
The device producing vertical mobile graphics signal based on FPGA as shown in Figure 1, it comprises image memory interface 1, the vertical mobile module 4 of image, the vertical mobile control module 9 of image and vertical mobile image output interface 11, the vertical mobile module of described image 4 mobile control module 9 vertical with image is integrated in field programmable gate array, described image memory interface 1 is the image input of field programmable gate array, described vertical mobile image output interface 11 is the output end of image of field programmable gate array, the signal input part of the vertical mobile control module 9 of described image is the control signal input end of field programmable gate array, the signal input part of the vertical mobile module 4 of described image memory interface 1 connection layout picture, the signal output part of the vertical mobile module of described image 4 connects vertical mobile image output interface 11, and the vertical mobile control signal output terminal of image of the vertical mobile control module 9 of described image distinguishes the control signal input end of connection layout as memory interface 1 mobile module 4 vertical with image, described image memory interface 1 is for receiving original static stationary view data.
In technique scheme, described field programmable gate array is also integrated with raw image data and reads control module 3, vertical moving image data output module 6, vertical mobile image generating module 7 and image sequence generation module 10, described image sequence generation module 10 is respectively described vertical mobile image generating module 7 mobile control module 9 vertical with image and provides pixel clock and image clock signal, the vertical mobile control module 9 of described image is respectively described vertical moving image data output module 6 provides image vertical mobile control signal with vertical mobile image generating module 7, described image memory interface 1 reads control module 3 by raw image data and provides original static stationary view data for the vertical mobile module 4 of described image, the vertical mobile module of described image 4 is successively by described vertical moving image data output module 6, vertical mobile image generating module 7 exports vertical mobile picture signal to vertical mobile image output interface 11.
In technique scheme, described field programmable gate array is also integrated with raw image data cache module 2, and described image memory interface 1 provides original static stationary view data by described raw image data cache module 2 for described raw image data reads control module 3.
In technique scheme, described raw image data reads control module 3 for the vertical mobile module 4 of image provides original static stationary view data, and the vertical mobile module of image 4 provides image vertical movable signal for described vertical moving image data output module 6.
In technique scheme, the vertical mobile control module 9 of described image provides image vertical mobile control signal for the vertical mobile module of image 4, and the vertical mobile status signal of the image of the vertical mobile module of acceptance pattern picture 4.
In technique scheme, described field programmable gate array is also integrated with vertical Mobile data cache module 5, and the vertical mobile module of described image 4 is connected with described vertical moving image data output module 6 by described vertical Mobile data cache module 5.
In technique scheme, described field programmable gate array is also integrated with image synchronization buffer module 8, and described vertical mobile image generating module 7 is connected with described vertical mobile image output interface 11 by described image synchronization buffer module 8.
Produce a method for vertical mobile graphics signal based on FPGA, it comprises the steps:
Step 1: after the control signal input end of field programmable gate array receives vertical moving image startup command and vertical moving image parameter, raw image data feeding field programmable gate array input by image input according to image clock signal carries out vertical image and moves process and obtain vertical moving image data;
Step 2: move the relative delay and jitter in described vertical moving image data according to image clock signal, and the vertical mobile picture signal of generation that vertical moving image data and image clock signal are synchronously alignd;
Step 3: vertical mobile image is flowed to image synchronization buffer module 8 by the vertical mobile image generating module 7 in field programmable gate array, after image synchronization buffer module 8 carries out image buffers, synchronism output is to vertical mobile image output interface 11, the upper strata point screen interface standard signals that vertical mobile image output interface 11 inputs according to high-level interface module 12 produces corresponding vision signal, and lights display module from image channel simultaneously.
In the step 1 of technique scheme, after the control signal input end of field programmable gate array receives vertical moving image startup command and vertical moving image parameter, the raw image data inputted by image input according to image clock signal is sent into field programmable gate array and is carried out image and move the concrete grammar that process obtains vertical moving image data and be: the vertical mobile control module 9 of the image in field programmable gate array receives the vertical moving image startup command on upper strata from high-level interface module 12, and vertical moving image parameter is (as translational speed, the mobile duration, moving image frame number, oblique line moves slope, forward and reverse mobile control) time, image sequence generation module 10 is to the vertical mobile control module 9 of image and vertical mobile image generating module 7 transport picture clock signal, together with the figure selecting control signal that this image clock signal and high-level interface module 12 send, control the vertical mobile control module 9 of image respectively to image memory interface 1, the vertical mobile module 4 of image, vertical moving image data output module 6 moves control signal with vertical mobile image generating module 7 transport picture, image memory interface 1 is made to carry out image vertically mobile process by needing the image of vertical movement to flow to the vertical mobile module 4 of image by raw image data reading control module 3, the data of carrying out after vertical mobile process process rear output by vertical moving image data output module 6 with vertical mobile image generating module 7, obtain the vertical moving image data that field programmable gate array exports.
In the step 1 of technique scheme, when upper strata requires display BMP (Bitmap, image file format) image time, image generating module 14 reads the BMP image of corresponding resolution according to the order of high-level interface module 12 and image resolution ratio parameter from BMP image storage apparatus, and they are sent into one by one image storage module 13 and preserve, image storage module 13 according to the image resolution ratio of upper-layer configured and amount of images, in video memory module 15, open up suitable storage area and by its successively stored in; When high-level interface module 12 requires display logic picture, image generating module 14 enable logic picture module 16 works, and input upper strata want display logic picture type and display parameter, thus make logic picture module 16 produce required logic picture, image generating module 14 is sent into image storage module 13 equally, image storage module 13 then by it stored in the logic picture storage area in video memory module 15.
Simultaneously shown RGB image time sequence parameter is also issued image sequence generation module 10 by high-level interface module 12 by high-level interface module 12, image sequence generation module 10 produce accordingly required pixel clock and RGB image clock signal (VSYNC vertical synchronization, capable synchronous, the DE video data useful signal of HSYNC) to the vertical mobile control module 9 of image with vertical mobile image generating module 7 to form RGB (red, green, blue three look) image.
In the step 1 of technique scheme, when the vertical mobile module of image (4) carries out vertical mobile process, carry out following steps process, as described in Fig. 2 and Fig. 3:
Step 111: when high-level interface module 12 configures vertical moving parameter, vertical moving parameter comprises vertical moving direction, translational speed, mobile image stops frame number, above-mentioned vertical moving parameter is informed vertical Mobile data cache module 5 by image memory interface 1, vertical moving direction in vertical Mobile data cache module 5 vertical moving parameters of basis, mobile line number shown by every a line is informed the vertical mobile control module 9 of image by image vertical mobile status signal by translational speed, the vertical mobile control module 9 of image controls image memory interface 1 order and reads corresponding row data and be cached in raw image data cache module 2 (so only stored in a few row images of current needs, instead of all row images, thus reduce required spatial cache, reduce complicacy and the fallibility of data mobile, and improve the reliability of mobile image), the vertical mobile control module 9 of image carries out synchronous and cooperation control to the input of different raw data, to guarantee that image reading efficiently can operate interlocking and conflict with causing,
Step 112: after raw image data cache module 2 buffer memory completes, the vertical mobile control module 9 of image controls the vertical mobile module 4 of image and starts the read operation that raw image data reads control module 3;
When the vertical mobile module 4 of image controls image vertically movement, and when vertically translational speed is 1 pixel, the vertical mobile module of image 4 first reads control module 3 by raw image data and takes out the pixel of last column and be stored in vertical Mobile data cache module 5, take out the pixel of the first row again and be stored in the follow-up buffer address of vertical Mobile data cache module 5, according to the last column before the taking-up of which circulation after single treatment pixel and be stored in the follow-up buffer address of vertical Mobile data cache module 5, the pixel of the first row then before it is removed after single treatment is also stored in the follow-up buffer address of vertical Mobile data cache module 5, image pixel after vertically being moved.
In described step 112, when the vertical mobile module 4 of image controls image vertically movement, and vertical translational speed is n pixel, and during n > 1, the vertical mobile module of image 4 first reads control module 3 by raw image data and takes out the capable pixel of last n and be stored in vertical Mobile data cache module 5, the pixel that before taking out, n is capable again is also stored in the follow-up buffer address of vertical Mobile data cache module 5, the pixel capable according to the last n after single treatment before the taking-up of which circulation is also stored in the follow-up buffer address of vertical Mobile data cache module 5, then the pixel that the front n before it is removed after single treatment is capable is also stored in the follow-up buffer address of vertical Mobile data cache module 5, image pixel after vertically being moved.
Described step 2 is carried out after described step 112, the concrete steps of step 2 for: the vertical mobile control module 9 of image controls vertical moving image data output module 6 according to the image clock signal that image sequence generation module 10 produces and the vertical moving image data of institute's buffer memory is exported to vertical mobile image generating module 7, vertical mobile image generating module 7 removes the relative delay and jitter in vertical moving image data, vertical moving image data and image clock signal synchronously align, thus produce the picture signal of vertical movement, and send into image synchronization buffer module 8 and export.
In technique scheme, due to the visual persistence phenomenon of human eye, the principle that module shows moving image shows once fixing mobile image again after each fixing mobile image shows some frame numbers, such human eye looks that image is coherent movement, like this, picture moving speed one timing (i.e. pixel move interval remain unchanged), each mobile image display frame number is more, in like manner, when each mobile image display frame number is constant, each picture moving speed faster (namely pixel moves interval change greatly), then human eye looks the faster of image movement, otherwise it is then slower.The operation of picture moving speed has been described above, the operation of present explanation picture moving frame number: when after each mobile frame number of upper-layer configured picture, when moving horizontally picture and starting to be exported by vertical mobile image generating module 7, the vertical mobile control module 9 of image monitors the output frame number of each moving image in vertical mobile image generating module 7 simultaneously, when the vertical mobile control module 9 of image detects that the frame number that current moving image exports does not reach configured frame number, then the vertical mobile control module 9 of image controls the vertical mobile module of image 4 and still produces current moving image, namely the reference position of the circulation read operation of original image pixels is constant, so then maintain the display of current vertical moving image, it is each after a frame image data of vertical mobile image generating module 7 all exports, the vertical mobile control module 9 of image controls image memory interface 1 and reads the beginning two row view data of original image again and be cached in raw image data cache module 2, and control the vertical mobile module of image 4 and carry out same mobile operation, all the then continuous buffer memory next line when a line operate to the process of vertical Mobile data cache module 5 from image memory interface 1, when the vertical mobile control module 9 of image detects that the current moving image of vertical mobile image generating module 7 li exports (now the data of present frame have all passed) when frame number reaches configuration frame number, then the vertical mobile control module 9 of image controls image memory interface 1 equally and inputs the capable data of original image, and control image and move left and right the operation that module 4 carries out next moving image, namely from the mobile pixel of the next one, circulation is read, now the interval of next mobile pixel is (as from pixel 1,2, interval pixel, circulation is read from pixel 3) namely translational speed also control image by the vertical mobile control module 9 of image and move left and right module 4 and produce new vertical moving image data.Thus realize the display of new vertical moving image frame.
In technique scheme, when the vertical mobile control module 9 of image detect the mobile totalframes that each vertical moving image of vertical mobile image generating module 7 li exports or mobile reach the totalframes or T.T. that upper strata configures T.T. time, move after image exported Deng last frame, the command operation of " image that whether show last transportable frame still return display static original image " of meeting again set by upper strata, when last transportable frame will be shown, then the vertical mobile control module 9 of image is as kept moving picture data constant, when display original image will be returned, then stop the module of relevant mobile operation, and control vertical mobile image generating module 7 and directly synchronously read raw image data down by image memory interface 1 at RGB clock signal, thus export original static stationary data.
In technique scheme, when no matter original static stationary image or vertical mobile image output to vertical mobile image output interface 11, (VESA/JEIDA as LVDS standard encodes, transmit Link number of links for the output video standard (as LVDS low-voltage differential signal, MIPI move Industry Processor Interface signal, DP high-definition digital display interface signals, V-By-One video standard etc.) that vertical mobile image output interface 11 configures according to the upper strata of image memory interface 1 and the transformation parameter of various video standard; The transmission Lane port number of MIPI standard, Video/Command pattern; The DP1.1/1.2 of DP standard, drive the data transmission rate, data array etc. of pre-emphasis, V-By-One standard) convert required corresponding vision signal to, and carry out synchronism output.
The content that this instructions is not described in detail belongs to the known prior art of professional and technical personnel in the field.
Claims (13)
1. one kind produces the device of vertical mobile graphics signal based on FPGA, it is characterized in that: it comprises image memory interface (1), the vertical mobile module of image (4), the vertical mobile control module of image (9) and vertical mobile image output interface (11), the vertical mobile module of described image (4) mobile control module (9) vertical with image is integrated in field programmable gate array, the image input that described image memory interface (1) is field programmable gate array, the output end of image that described vertical mobile image output interface (11) is field programmable gate array, the signal input part of the vertical mobile control module (9) of described image is the control signal input end of field programmable gate array, the signal input part of the vertical mobile module of described image memory interface (1) connection layout picture (4), the signal output part of the vertical mobile module of described image (4) connects vertical mobile image output interface (11), and the vertical mobile control signal output terminal of image of the vertical mobile control module of described image (9) distinguishes the control signal input end of connection layout as memory interface (1) mobile module (4) vertical with image, described image memory interface (1) is for receiving original static stationary view data.
2. the device producing vertical mobile graphics signal based on FPGA according to claim 1, is characterized in that: described field programmable gate array is also integrated with raw image data and reads control module (3), vertical moving image data output module (6), vertical mobile image generating module (7) and image sequence generation module (10), described image sequence generation module (10) is respectively described vertical mobile image generating module (7) mobile control module (9) vertical with image and provides pixel clock and image clock signal, the vertical mobile control module of described image (9) is respectively described vertical moving image data output module (6) provides image vertical mobile control signal with vertical mobile image generating module (7), described image memory interface (1) is read control module (3) for the vertical mobile module of described image (4) by raw image data and is provided original static stationary view data, the vertical mobile module of described image (4) is successively by described vertical moving image data output module (6), vertical mobile image generating module (7) exports vertical mobile picture signal to vertical mobile image output interface (11).
3. the device producing vertical mobile graphics signal based on FPGA according to claim 2, it is characterized in that: described field programmable gate array is also integrated with raw image data cache module (2), described image memory interface (1) provides original static stationary view data by described raw image data cache module (2) for described raw image data reads control module (3).
4. the device producing vertical mobile graphics signal based on FPGA according to claim 3, it is characterized in that: described raw image data reads control module (3) for the vertical mobile module of image (4) provides original static stationary view data, the vertical mobile module of image (4) provides image vertical movable signal for described vertical moving image data output module (6).
5. the device producing vertical mobile graphics signal based on FPGA according to claim 4, it is characterized in that: the vertical mobile control module of described image (9) provides image vertical mobile control signal for the vertical mobile module of image (4), and the vertical mobile status signal of the image of the vertical mobile module of acceptance pattern picture (4).
6. the device producing vertical mobile graphics signal based on FPGA according to claim 5, it is characterized in that: described field programmable gate array is also integrated with vertical Mobile data cache module (5), the vertical mobile module of described image (4) is connected with described vertical moving image data output module (6) by described vertical Mobile data cache module (5).
7. the device producing vertical mobile graphics signal based on FPGA according to claim 6, it is characterized in that: described field programmable gate array is also integrated with image synchronization buffer module (8), described vertical mobile image generating module (7) is connected with described vertical mobile image output interface (11) by described image synchronization buffer module (8).
8. produce a method for vertical mobile graphics signal based on FPGA, it is characterized in that, it comprises the steps:
Step 1: after the control signal input end of field programmable gate array receives vertical moving image startup command and vertical moving image parameter, raw image data feeding field programmable gate array input by image input according to image clock signal carries out vertical image and moves process and obtain vertical moving image data;
Step 2: move the relative delay and jitter in described vertical moving image data according to image clock signal, and the vertical mobile picture signal of generation that vertical moving image data and image clock signal are synchronously alignd.
9. the method producing vertical mobile graphics signal based on FPGA according to claim 8, is characterized in that:
Also step 3 is comprised: vertical mobile image is flowed to image synchronization buffer module (8) by the vertical mobile image generating module (7) in field programmable gate array after described step 2, after image synchronization buffer module (8) carries out image buffers, synchronism output is to vertical mobile image output interface (11), the upper strata point screen interface standard signals that vertical mobile image output interface (11) inputs according to high-level interface module (12) produces corresponding vision signal, and lights display module from image channel simultaneously.
10. the method producing vertical mobile graphics signal based on FPGA according to claim 8, it is characterized in that: in described step 1, after the control signal input end of field programmable gate array receives vertical moving image startup command and vertical moving image parameter, the raw image data inputted by image input according to image clock signal is sent into field programmable gate array and is carried out image and move the concrete grammar that process obtains vertical moving image data and be: the vertical mobile control module of the image in field programmable gate array (9) receives the vertical moving image startup command on upper strata from high-level interface module (12), and during vertical moving image parameter, image sequence generation module (10) is to the vertical mobile control module of image (9) and vertical mobile image generating module (7) transport picture clock signal, together with the figure selecting control signal that this image clock signal and high-level interface module (12) send, control the vertical mobile control module (9) of image respectively to image memory interface (1), the vertical mobile module of image (4), vertical moving image data output module (6) moves control signal with vertical mobile image generating module (7) transport picture, image memory interface (1) is made to flow to the vertical mobile module of image (4) carry out that image is vertically mobile to be processed by needing the image of vertical movement to read control module (3) by raw image data, export after the data of carrying out after vertical mobile process are processed with vertical mobile image generating module (7) by vertical moving image data output module (6), obtain the vertical moving image data that field programmable gate array exports.
11. methods producing vertical mobile graphics signal based on FPGA according to claim 10, is characterized in that: in described step 1, when the vertical mobile module of image (4) carries out vertical mobile process, carry out following steps process:
Step 111: when high-level interface module (12) configures vertical moving parameter, vertical moving parameter comprises vertical moving direction, translational speed, mobile image stops frame number, above-mentioned vertical moving parameter is informed vertical Mobile data cache module (5) by image memory interface (1), vertical Mobile data cache module (5) is then according to the vertical moving direction in vertical moving parameter, mobile line number shown by every a line is informed the vertical mobile control module (9) of image by image vertical mobile status signal by translational speed, the vertical mobile control module of image (9) control image memory interface (1) then sequentially reads corresponding row data and is cached in raw image data cache module (2), the vertical mobile control module (9) of image carries out synchronous and cooperation control to the input of different raw data, to guarantee that image reading efficiently can operate interlocking and conflict with causing,
Step 112: after raw image data cache module (2) buffer memory completes, the vertical mobile control module (9) of image controls the vertical mobile module of image (4) and starts the read operation that raw image data reads control module (3);
When the vertical mobile module of image (4) controls image vertically movement, and when vertically translational speed is 1 pixel, the vertical mobile module of image (4) first reads control module (3) by raw image data and takes out the pixel of last column and be stored in vertical Mobile data cache module (5), take out the pixel of the first row again and be stored in the follow-up buffer address of vertical Mobile data cache module (5), according to the last column before the taking-up of which circulation after single treatment pixel and be stored in the follow-up buffer address of vertical Mobile data cache module (5), the pixel of the first row then before it is removed after single treatment is also stored in the follow-up buffer address of vertical Mobile data cache module (5), image pixel after vertically being moved.
12. methods producing vertical mobile graphics signal based on FPGA according to claim 11, it is characterized in that: in described step 112, when the vertical mobile module of image (4) controls image vertically movement, and vertical translational speed is n pixel, and during n > 1, the vertical mobile module of image (4) first reads control module (3) by raw image data and takes out the capable pixel of last n and be stored in vertical Mobile data cache module (5), the pixel that before taking out, n is capable again is also stored in the follow-up buffer address of vertical Mobile data cache module (5), the pixel capable according to the last n after single treatment before the taking-up of which circulation is also stored in the follow-up buffer address of vertical Mobile data cache module (5), then the pixel that the front n before it is removed after single treatment is capable is also stored in the follow-up buffer address of vertical Mobile data cache module (5), image pixel after vertically being moved.
13. methods producing vertical mobile graphics signal based on FPGA according to claim 12, it is characterized in that: after described step 112, carry out described step 2, the concrete steps of step 2 for: the vertical mobile control module of image (9) controls vertical moving image data output module (6) according to the image clock signal that image sequence generation module (10) produces and the vertical moving image data of institute's buffer memory is exported to vertical mobile image generating module (7), vertical mobile image generating module (7) removes the relative delay and jitter in vertical moving image data, vertical moving image data and image clock signal synchronously align, thus produce the picture signal of vertical movement, and send into image synchronization buffer module (8) output.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510866554.4A CN105489145B (en) | 2015-11-30 | 2015-11-30 | The device and method for vertically moving figure signal is produced based on FPGA |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510866554.4A CN105489145B (en) | 2015-11-30 | 2015-11-30 | The device and method for vertically moving figure signal is produced based on FPGA |
Publications (2)
Publication Number | Publication Date |
---|---|
CN105489145A true CN105489145A (en) | 2016-04-13 |
CN105489145B CN105489145B (en) | 2018-03-13 |
Family
ID=55676106
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201510866554.4A Active CN105489145B (en) | 2015-11-30 | 2015-11-30 | The device and method for vertically moving figure signal is produced based on FPGA |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN105489145B (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN201238363Y (en) * | 2008-06-23 | 2009-05-13 | 北京牡丹视源电子有限责任公司 | Display image movement response test equipment |
KR20120048748A (en) * | 2010-11-04 | 2012-05-16 | 경운대학교 산학협력단 | Pattern image transmitter for inspecting display and method of inspecting display using the same |
CN103888766A (en) * | 2014-03-12 | 2014-06-25 | 广东威创视讯科技股份有限公司 | System for generating random motion image video source |
CN104882089A (en) * | 2014-02-27 | 2015-09-02 | 乐金显示有限公司 | Image display device and driving method thereof |
CN104900204A (en) * | 2015-06-12 | 2015-09-09 | 武汉精测电子技术股份有限公司 | Logic frame overlapping device and method based on FPGA |
CN104932124A (en) * | 2015-06-12 | 2015-09-23 | 武汉精测电子技术股份有限公司 | FPGA-based figure signal producing device and method |
-
2015
- 2015-11-30 CN CN201510866554.4A patent/CN105489145B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN201238363Y (en) * | 2008-06-23 | 2009-05-13 | 北京牡丹视源电子有限责任公司 | Display image movement response test equipment |
KR20120048748A (en) * | 2010-11-04 | 2012-05-16 | 경운대학교 산학협력단 | Pattern image transmitter for inspecting display and method of inspecting display using the same |
CN104882089A (en) * | 2014-02-27 | 2015-09-02 | 乐金显示有限公司 | Image display device and driving method thereof |
CN103888766A (en) * | 2014-03-12 | 2014-06-25 | 广东威创视讯科技股份有限公司 | System for generating random motion image video source |
CN104900204A (en) * | 2015-06-12 | 2015-09-09 | 武汉精测电子技术股份有限公司 | Logic frame overlapping device and method based on FPGA |
CN104932124A (en) * | 2015-06-12 | 2015-09-23 | 武汉精测电子技术股份有限公司 | FPGA-based figure signal producing device and method |
Also Published As
Publication number | Publication date |
---|---|
CN105489145B (en) | 2018-03-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102118592B (en) | System for displaying multivideo | |
CN104932124B (en) | Figure signal generation device and method based on FPGA | |
WO2017028381A1 (en) | Image processing method and system for laser television, and laser television | |
CN103957374A (en) | 8K ultrahigh-definition display system based on DP interface | |
US10097803B2 (en) | Display processing apparatus, device and method | |
CN102222469B (en) | Dynamic imaging device of LED lampstandards and application of same in tunnel advertisements | |
CN104822040A (en) | Multi-format video sequence generation system based on FPGA and method thereof | |
CN102376293A (en) | Image mosaic processor on basis of FPGA (Field Programmable Gata Array) and image mosaic method | |
CN103475894B (en) | A kind of 3D laparoscope method for processing video frequency | |
US20100302352A1 (en) | Video data signal, system and method for controlling shutter glasses | |
CN102742284A (en) | Method and apparatus for displaying 3-dimensional image and method and apparatus for controlling shutter glasses | |
JP2020071469A (en) | Image control device, display wall system using the same, and control method of outputting image to display wall | |
KR20160146645A (en) | Data processing method and device for led television, and led television | |
CN101814269A (en) | Method and device for simultaneously displaying multiple images in real time on full color LED dot matrix | |
CN103956149A (en) | Displayer, display system and data processing method | |
CN104867470B (en) | Device and method for embedding geographic and documental information in logic picture based on FPGA | |
US20130207961A1 (en) | Driving device, display device including the same and driving method thereof | |
CN105469730A (en) | Device and method for generating slash movement graph signal based on FPGA | |
JP2012212061A (en) | Multi-display device | |
CN104952383A (en) | Driving circuit for driving color display to display black-and-white/grayscale images and data conversion circuit thereof | |
CN105489145A (en) | Device and method capable of generating vertically-moving graphic signals based on FPGA (field-programmable gate array) | |
CN201681588U (en) | Device capable of simultaneously displaying real-time multiple picture on full-color LED dot matrix | |
CN105590603A (en) | Source electrode driver and display system | |
CN105334648A (en) | Device and method for generating signal for moving image on basis of FPGA | |
CN105427774A (en) | Device and method for generating horizontal moving graph signals on basis of FPGA |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
CB02 | Change of applicant information | ||
CB02 | Change of applicant information |
Address after: 430070 Hubei Province, Wuhan city Hongshan District Road No. 48 bookstore (North Industrial Park) 1 building 11 layer Applicant after: Wuhan fine test electronics group Limited by Share Ltd Address before: 430070 Hubei City, Hongshan Province, South Lake Road, No. 53, Hongshan Venture Center, building on the 4 floor, No. Applicant before: Wuhan Jingce Electronic Technology Co., Ltd. |
|
GR01 | Patent grant | ||
GR01 | Patent grant |