CN105430413B - A kind of four piecemeal hardware scanning methods of the integer estimation suitable for HEVC standard - Google Patents
A kind of four piecemeal hardware scanning methods of the integer estimation suitable for HEVC standard Download PDFInfo
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Abstract
The invention belongs to high-definition digital video compression coding and decoding technical field, four piecemeal hardware scanning methods of specially a kind of integer estimation suitable for HEVC standard.The image processing block that size is 64 × 64 is divided into 4 16 × 64 pieces first by the present invention, to successively carry out raster scanning；Raster scan procedures are as follows: be scanned, i.e., be scanned since the 1st pixel is with the direction of horizontal (or vertical), until reaching boundary, this direction is referred to as the direction of raster scanning according to zigzag mode；Then, 1 pixel is translated to the direction perpendicular to raster scanning, is scanned again according to the direction of raster scanning, until reaching boundary；It repeats the above process, until translation also reaches boundary.Four blocked scans of the present invention in this way can complete the integer estimation under HEVC standard with lower register number.
Description
Technical field
The invention belongs to high-definition digital video compression coding and decoding technical fields, specially a kind of whole suitable for HEVC standard
Four piecemeal hardware scanning methods of number estimation.
Background technique
HEVC(High Efficiency Video Coding) it is by International Telecommunication Union (ITU) and motion pictures expert
The next-generation video encoding and decoding standard that the tissue JCTVC that group (MPEG) joint is set up is proposed.Target is in identical visual effect
Under the premise of, compared to previous generation standard, i.e., H.264/AVC standard, compression ratio double.
Video encoder based on HEVC, mainly by being formed with lower module: intra prediction, inter-prediction, transformation, quantization,
Inverse quantization, inverse transformation, reconstruction, deblocking filter, the compensation of adaptive sampling point etc..Wherein, inter-prediction utilizes picture in consecutive frame
Correlation between element takes integer estimation, fraction movement estimation, a series of modes such as motion compensation, to reduce the time
Redundancy, to achieve the effect that compression.Since in HEVC, the maximum coding units (LCU) of image processing block are had reached
64 × 64 pieces, therefore, if very more registers will be needed in hardware processor according to commonsense method scanned image block.
During interframe encode, the more similar picture on pixel value is needed in neighbouring frame search and current pixel block
Plain block, and obtain relative displacement of the two on spatial position.This relative displacement is exactly motion vector, and the process searched for is just
It is estimation.Under HEVC standard, the size of image processing block (LCU) can be one 64 × 64 pieces, each image procossing
Block (LCU) can be divided into the predicting unit (PU) that depth is at most 3, and each predicting unit predicts mould according to used by it
Formula will possess at least one motion vector.This proposes very big challenge for how to reduce the quantity of on piece register.For
This challenge is coped with, the invention proposes the hardware scanning method that image processing block (LCU) is divided into four pieces.In this way
Four blocked scans, the present invention can with lower register number complete HEVC standard under integer estimation.
Summary of the invention
It is an object of the invention to propose it is a kind of can to overcome the deficiencies of the prior art, can be effectively applicable in HEVC standard
Four piecemeal hardware scanning methods of integer estimation.
The present invention proposes four piecemeal hardware scanning methods of the integer estimation suitable for HEVC standard, first by size
4 16 × 64 pieces are divided into for 64 × 64 image processing block (LCU), to successively carry out raster scanning.
Wherein, the side that length is 16 should be parallel to the direction of raster scanning, and the side that length is 64 should be perpendicular to raster scanning
Direction.The raster scan procedures are as follows: be scanned, i.e., (or hung down from the 1st pixel with horizontal according to zigzag mode
Direction directly) starts to be scanned, until reaching boundary, this direction is referred to as the direction of raster scanning；Then, to vertical
1 pixel is translated in the direction of raster scanning, is scanned again according to the direction of raster scanning, until reaching boundary；It repeats
The above process, until translation also reaches boundary.
It is worth noting that, every time to perpendicular to raster scanning direction translate 1 pixel before, always first complete for
The scanning of first piecemeal, then the scanning for second piecemeal is completed, until the 4th piecemeal, whole process are as shown in Figure 1.
During scanning, reference pixel and original pixels are respectively stored in the pulsation that two sizes are all 16 × 64
In array
(array stores original pixels, another array stores reference pixel).It is former in each switching search piecemeal
Systolic arrays corresponding to beginning pixel should all read in the data of new piecemeal.And in the search process for current piecemeal, ginseng
A new row should be read in perpendicular to the data of scanning direction by examining systolic arrays corresponding to pixel all, and by original reference pixel
A pixel is translated to the opposite direction of scanning direction, to form new reference pixel block in the way of most saving bandwidth, entirely
Process is as shown in Figure 2.
The data of two fluctuation arrays are passed through after operation, the difference of available the original pixels block and reference pixel block
It is different.The operation can the system of the requirement selection difference of two squares according to to(for) performance and (SSD), absolute difference and (SAD) etc..
Scanning block is divided into four pieces of scanning mode by the present invention, can largely reduce the size of systolic arrays, to subtract
The number of few on piece register.
Detailed description of the invention
Fig. 1: four blocked scans sequence proposed by the present invention.
Fig. 2: the data of systolic arrays update.
Fig. 3: the piecemeal of image processing block.
Specific embodiment
Below by example, the method for the present invention is further specifically described.
Assuming that search range is [- 11,12], then the size of reference pixel block should be 88 × 88, i.e. 64+24.Enable reference
The upper left corner of block of pixels is origin, and be positive horizontal axis horizontally to the right, and be positive the longitudinal axis vertically downward, and assumes that raster scanning direction is vertical
It is straight downward.Once according to carrying out simulation search process constantly.
Moment 0, two systolic arrays read in original pixels and reference pixel respectively.The original pixels block is located at present image
The top of process block (LCU), is denoted as piecemeal 1, as shown in Figure 3.The upper left corner of reference pixel is then located at coordinate (0,0), water
Flat length is 64, vertical length 16.At this point, hardware processor can be according to the numerical value of two systolic arrays with the sum of the difference of two squares
(SSD), absolute difference and difference that the modes such as (SAD) both calculate.
Moment 1 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update, ginseng
The upper left corner for examining pixel is located at coordinate (0,1), and herein, 0 is abscissa, and 1 is ordinate, similarly hereinafter.
Moment 2 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update, ginseng
The upper left corner for examining pixel is located at coordinate (0,2).
……。
Moment 24 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update,
The upper left corner of reference pixel is located at coordinate (0,24).
The line for being is marked in moment 0-24 corresponding diagram 1.
Moment 25 updates original pixels and reference pixel in systolic arrays.After update, which is updated to point
Block 2；The upper left corner of reference pixel is located at coordinate (0,16).
Moment 26 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update,
The upper left corner of reference pixel is located at coordinate (0,17).
Moment 27 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update,
The upper left corner of reference pixel is located at coordinate (0,18).
……。
Moment 49 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update,
The upper left corner of reference pixel is located at coordinate (0,40).
The line for being is marked in moment 25-49 corresponding diagram 1.
Moment 50 updates original pixels and reference pixel in systolic arrays.After update, which is updated to point
Block 3；The upper left corner of reference pixel is located at coordinate (0,32).
Moment 51 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update,
The upper left corner of reference pixel is located at coordinate (0,33).
Moment 52 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update,
The upper left corner of reference pixel is located at coordinate (0,34).
……。
Moment 74 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update,
The upper left corner of reference pixel is located at coordinate (0,56).
The line for being is marked in moment 50-74 corresponding diagram 1.
Moment 75 updates original pixels and reference pixel in systolic arrays.After update, which is updated to point
Block 4；The upper left corner of reference pixel is located at coordinate (0,48).
Moment 76 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update,
The upper left corner of reference pixel is located at coordinate (0,49).
Moment 77 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update,
The upper left corner of reference pixel is located at coordinate (0,50).
……。
Moment 99 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update,
The upper left corner of reference pixel is located at coordinate (0,72).
The line for being is marked in moment 75-99 corresponding diagram 1.
Moment 100 updates original pixels and reference pixel in systolic arrays.After update, which is updated to
Piecemeal 1；The upper left corner of reference pixel is located at coordinate (1,0).
Moment 101 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update,
The upper left corner of reference pixel is located at coordinate (1,1).
Moment 102 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update,
The upper left corner of reference pixel is located at coordinate (1,50).
……。
Moment 124 keeps the original pixels in systolic arrays constant, updates the reference pixel in systolic arrays.After update,
The upper left corner of reference pixel is located at coordinate (1,72).
The line for being is marked in moment 100-124 corresponding diagram 1.
……。
Scanning is executed up to the end of scan as procedure described above, that is, has executed the line for marking in Fig. 1 and being.
Claims (3)
1. a kind of four piecemeal hardware scanning methods of integer estimation suitable for HEVC standard, which is characterized in that first will
The image processing block that size is 64 × 64 is divided into 4 16 × 64 pieces, to successively carry out raster scanning；
Wherein, the side that length is 16 should be parallel to the direction of raster scanning, and the side that length is 64 should be perpendicular to the side of raster scanning
To；The raster scanning is scanned according to zigzag mode, i.e., since the 1st pixel is with direction horizontally or vertically into
Row scanning, until reaching the boundary of scanning range, this direction is referred to as the direction of raster scanning；Then, to perpendicular to light
The direction of grid scanning translates 1 pixel, is scanned again according to the direction of raster scanning, until reaching the side of scanning range
Boundary；It repeats the above process, until translation also reaches the boundary of scanning range；
During scanning, reference pixel and original pixels are respectively stored in the systolic arrays that two sizes are all 16 × 64
It is interior；In each switching search piecemeal, systolic arrays corresponding to original pixels all read in the data of new piecemeal；And for
In the search process of current piecemeal, systolic arrays corresponding to reference pixel all read in a new row perpendicular to the number of scanning direction
According to, and original reference pixel is translated into a pixel to the opposite direction of scanning direction, thus the group in a manner of most saving bandwidth
The reference pixel of Cheng Xin.
2. four piecemeal hardware scanning methods of the integer estimation according to claim 1 suitable for HEVC standard,
It is characterized in that, before translating 1 pixel to the direction perpendicular to raster scanning every time, always first completes for first piecemeal
Scanning, then the scanning for second piecemeal is completed, until the 4th piecemeal.
3. four piecemeal hardware scanning methods of the integer estimation according to claim 1 suitable for HEVC standard,
It is characterized in that, the data of two fluctuation arrays are by obtaining the difference of original pixels and reference pixel, which is after operation
The sum of the difference of two squares or the sum of absolute difference.
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| CN101951521A (en) * | 2010-10-30 | 2011-01-19 | 上海交通大学 | Video image motion estimation method for extent variable block |
| CN102647594A (en) * | 2012-04-18 | 2012-08-22 | 北京大学 | Integer pixel precision motion estimation method and system for same |
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| US20080126278A1 (en) * | 2006-11-29 | 2008-05-29 | Alexander Bronstein | Parallel processing motion estimation for H.264 video codec |
| CN102263947B (en) * | 2010-05-27 | 2016-07-06 | 香港科技大学 | The method and system of image motion estimation |
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| CN101951521A (en) * | 2010-10-30 | 2011-01-19 | 上海交通大学 | Video image motion estimation method for extent variable block |
| CN102647594A (en) * | 2012-04-18 | 2012-08-22 | 北京大学 | Integer pixel precision motion estimation method and system for same |
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| An Efficient Hardware Architecture for Inter-Prediction in H.264/AVC Encoders;Nam-Khanh Dang 等;《17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems》;20140425;1-4 * |
| Analysis and Architecture Design of Variable Block-Size Motion Estimation for H.264/AVC;Ching-Yeh Chen 等;《 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS》;20060228;第53卷(第2期);1-16 * |
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