CN105404496B - The control method and control device of data transmission and the microprocessor with it - Google Patents
The control method and control device of data transmission and the microprocessor with it Download PDFInfo
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- CN105404496B CN105404496B CN201510748269.2A CN201510748269A CN105404496B CN 105404496 B CN105404496 B CN 105404496B CN 201510748269 A CN201510748269 A CN 201510748269A CN 105404496 B CN105404496 B CN 105404496B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/226—Microinstruction function, e.g. input/output microinstruction; diagnostic microinstruction; microinstruction format
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/28—Enhancement of operational speed, e.g. by using several microcontrol devices operating in parallel
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Abstract
The present invention provides a kind of control method of data transmission, the control method includes the following steps:Controller obtains microcode, and the data judgement of indicating bit carries out evaluation logic progress operation in the microcode or transmitter carries out data transmission;When the data of command bit are operand order in the microcode, the microcode is written in the evaluation logic controller, and the control evaluation logic carries out operation and obtains the operation result and status data of the evaluation logic;The data of command bit are when reading result command in the microcode, and the controller reads the operation result of the evaluation logic, and updates the microcode according to the operation result;When the data of command bit are read states order in the microcode, the controller generates next microcode address according to the status data of the evaluation logic to realize jumping for microcode.This method increase the flexibilities of data transmission.
Description
Technical field
The present invention relates to the control method and control device of field of microprocessors more particularly to a kind of transmission of data and have
The microprocessor of the control device.
Background technique
With the development of network technology and multimedia technology, the requirement of data transmission efficiency is higher and higher.Design processor
When, designer perhaps perhaps using hardware logic control unit or is used in mixed way above two using microcode control unit
Mode.
Operation inside processor can simplify using microcode, simplified processor hardware logic is realized.When to processor into
When row extension, hardware logic control unit needs to modify hardware and is extended, and microcode control unit usually only needs to modify
Microprogram, it is clear that modification microcode is more much easier than redesigning hardware.Traditionally, microcode is built-in in processor
Portion, so the period that designs and manufactures of only reprocessing device could change microcode.
But in current processor, bulk data transfer is using direct memory access（Direct Memory
Access, DMA）Come what is completed, it is realized using hardware logic control unit.Carried out data transmission using DMA, every
Central processing unit is required before secondary data transmission（Central Processor Unit, CPU）Unit is with configuring the data source of DMA
Location, destination address and conveying length etc., then DMA is transmitted according to the data that corresponding conveying length is completed in configuration.If continuous more
Secondary transmission data, each data require CPU to reconfigure after being transmitted, then being greatly lowered the effect of data transmission
Rate.
Summary of the invention
The purpose of the present invention aims to solve at least one of above-mentioned technological deficiency, provide a kind of transmission of data control method and
Control device and microprocessor with the control device.
The present invention provides a kind of control method of data transmission, and the control method includes the following steps:
Controller obtains microcode, and the data judgement of indicating bit carries out evaluation logic progress operation in the microcode
Either transmitter carries out data transmission;
When judging result carries out data transmission for transmitter, the controller is according to command bit in the microcode
Data control the transmitter and complete data transmission;
When judging result is that evaluation logic carries out operation, judge the data of command bit in the microcode for operand
Result command or read states order are read in order;
When the data of command bit are operand order in the microcode, institute is written in the microcode by the controller
State in evaluation logic, and the control evaluation logic carry out operation and obtain the evaluation logic operation result and
Status data;
The data of command bit are when reading result command in the microcode, and the controller reads the evaluation logic
Operation result, and the microcode is updated according to the operation result;
When the data of command bit are read states order in the microcode, the controller is according to the evaluation logic
Status data generate next microcode address to realize jumping for microcode.
Scheme from the above can be seen that due to included data source address, destination in transmission class microcode
Location and conveying length, after controller reads transmission class microcode, directly beginning data transmission is not required to configure it, improve
The efficiencies of transmission of data.And controller reads operation class microcode, is completed using the evaluation logic to microcode
Self jumps execution with realization microcode, increases the flexibility of data transmission.
The present invention also provides a kind of control device of data transmission, the control device includes:
Controller, for obtaining microcode, and in the microcode indicating bit data judgement carry out evaluation logic into
Row operation either transmitter carries out data transmission;When judging result carries out data transmission for transmitter, according to the microcode
The data of middle command bit control the transmitter and complete data transmission;When judging result is that evaluation logic carries out operation, sentence
The data of command bit are operand order, read result command or read states order in the microcode of breaking;It is ordered in the microcode
When the data of position being enabled to be operand order, the microcode is written in the evaluation logic, and the control arithmetic logic
Device carries out operation and obtains the operation result and status data of the evaluation logic;The data of command bit are in the microcode
When reading result command, the operation result of the evaluation logic is read, and the microcode is updated according to the operation result;Institute
State command bit in microcode data be read states order when, according to the status data of the evaluation logic generate next it is micro-
Code address is to realize jumping for microcode；
The transmitter carries out data transmission for the control according to the controller；
The evaluation logic is carried out for the control according to the controller according to operation.
It can be seen that from the scheme of above-mentioned control device due to included data source address, mesh in transmission class microcode
Address and conveying length, controller read transmission class microcode after, directly beginning data transmit, be not required to configure it,
Improve the efficiency of transmission of data.And controller reads operation class microcode, is completed using the evaluation logic to micro- generation
The self of code jumps execution with realization microcode, increases the flexibility of data transmission.
The present invention also provides a kind of microprocessor, the microprocessor includes：Above-mentioned control device, microcode store
Device, first memory and second memory；
Micro-code memory is connect, for saving microcode with the controller；
First memory is connect with the controller, needs to transmit data for saving；
Second memory is connect with the controller, obtains transmission data for saving.
It can be seen that from the scheme of above-mentioned microprocessor due to included data source address, mesh in transmission class microcode
Address and conveying length, controller read transmission class microcode after, directly beginning data transmit, be not required to configure it,
Improve the efficiency of transmission of data.And controller reads operation class microcode, is completed using the evaluation logic to micro- generation
The self of code jumps execution with realization microcode, increases the flexibility of data transmission.
Detailed description of the invention
Fig. 1 is a kind of structural block diagram of embodiment of control device that data of the invention are transmitted；
Fig. 2 is the flow chart for the control method first embodiment that data of the invention are transmitted；
Fig. 3 is microcode structural schematic diagram of the invention；
Fig. 4 is the flow chart for the control method second embodiment that data of the invention are transmitted.
Specific embodiment
In order to which the technical problems, technical solutions and beneficial effects solved by the present invention is more clearly understood, below in conjunction with
Accompanying drawings and embodiments, the present invention will be described in further detail.It should be appreciated that specific embodiment described herein is only used
To explain the present invention, it is not intended to limit the present invention.
The present invention provides a kind of control device of the data transmission of embodiment, as shown in Figure 1, the control device 10 wraps
It includes:
Controller 101, for obtaining microcode, and in the microcode, the data judgement of indicating bit carries out evaluation logic
Operation either transmitter is carried out to carry out data transmission;When judging result carries out data transmission for transmitter, according to micro- generation
The data of command bit control the transmitter and complete data transmission in code;When judging result is that evaluation logic carries out operation,
Judge the data of command bit in the microcode for operand order, reading result command or read states order;In the microcode
When the data of command bit are operand order, the microcode is written in the evaluation logic, and the control operation is patrolled
Device is collected to carry out operation and obtain the operation result and status data of the evaluation logic;The data of command bit in the microcode
When to read result command, the operation result of the evaluation logic is read, and the microcode is updated according to the operation result;
When the data of command bit are read states order in the microcode, next is generated according to the status data of the evaluation logic
Microcode address is to realize jumping for microcode；
The transmitter 102 carries out data transmission for the control according to the controller；
The evaluation logic（Arithmetic Logic Unit, ALU）103, for the control according to the controller
System carries out data operation.
It can be seen that from the scheme of above-mentioned control device due to included data source address, mesh in transmission class microcode
Address and conveying length, controller read transmission class microcode after, directly beginning data transmit, be not required to configure it,
Improve the efficiency of transmission of data.And controller reads operation class microcode, is completed using the evaluation logic to micro- generation
The self of code jumps execution with realization microcode, increases the flexibility of data transmission.
In specific implementation, the evaluation logic includes operand register, command register, status register and knot
Fruit register.
In specific implementation, the evaluation logic is for carrying out arithmetical operation, logical operation, shift operation, condition fortune
Calculation or comparison operation.
The present invention provides the microprocessor of another embodiment, as shown in Figure 1, the microprocessor includes：Above-mentioned control
Device 10 processed, micro-code memory 11, first memory 12 and second memory 13；Micro-code memory 11, with the control
Device 101 connects, for saving microcode；First memory 12 is connect with the controller 101, for saving transmission data；The
Two memories 13 are connect with the controller 101, obtain transmission data for saving.
It can be seen that from the scheme of above-mentioned microprocessor due to included data source address, mesh in transmission class microcode
Address and conveying length, controller read transmission class microcode after, directly beginning data transmit, be not required to configure it,
Improve the efficiency of transmission of data.And controller reads operation class microcode, is completed using the evaluation logic to micro- generation
The self of code jumps execution with realization microcode, increases the flexibility of data transmission.
In specific implementation, for the control device 10 after reading microcode in micro-code memory 11, controller 101 is right
Microcode is decoded, if it is data transfer operation, then 101 controlled transmitter 103 of controller completes first memory 12
Data transmission between second memory 13；Microcode is updated if it is operation ALU, then controller 101 controls ALU 102
It completes to calculate, ALU operation result is updated according to the data in the second address bit of data 304 into pico- code memory 11；
If it is execution microcode is jumped, completes to calculate and update operation state then controller 101 controls ALU102, according to operation shape
State generates next microcode address.
The present invention provides the control method of the data transmission of another embodiment, as shown in Fig. 2, the control method includes
Following steps：
Step S01, controller obtains microcode, and decodes to the microcode；
Step S02, the controller carry out evaluation logic progress according to the data judgement of indicating bit in the microcode
Operation either transmitter carries out data transmission；When judging result carries out data transmission for transmitter, S03 is entered step, when
When judging result is that evaluation logic carries out operation, S04 is entered step；
Step S03, the controller control the transmitter according to the data of command bit in the microcode and complete data
Transmission；
Step S04 judges the data of command bit in the microcode for operand order, reading result command or read states life
It enables;When the data of command bit are operand order in the microcode, S05 is entered step, the number of command bit in the microcode
When according to read result command, S06 is entered step, when the data of command bit are read states order in the microcode, being entered step
S07；
The microcode is written in the evaluation logic for step S05, the controller, and the control operation is patrolled
Device is collected to carry out operation and obtain the operation result and status data of the evaluation logic；
Step S06, the controller reads the operation result of the evaluation logic, and is updated according to the operation result
The microcode；
Step S07, the controller according to the status data of the evaluation logic generate next microcode address with
Realize jumping for microcode.
Scheme from the above can be seen that due to included data source address, destination in transmission class microcode
Location and conveying length, after controller reads transmission class microcode, directly beginning data transmission is not required to configure it, improve
The efficiencies of transmission of data.And controller reads operation class microcode, is completed using the evaluation logic to microcode
Self jumps execution with realization microcode, increases the flexibility of data transmission.
In specific implementation, as shown in figure 3, indicating bit 301 distinguishes data transfer operation and ALU operation in controller, such as
Fruit indicating bit 301 is 1, indicates ALU operation class microcode, and controller is completed to update microcode or jump to execute microcode behaviour
Make；If indicating bit 301 is 0, indicate that microcode is data transmission class microcode, micro engine completes data transfer operation.
Command bit 302 is transmission control in data transmission microcode, and transmission controlling packets include transmission control information, such as pass
Transmission of data length, word/half-word/byte transmission type etc.；It is ALU order in ALU operation microcode, ALU order is divided into operation
Number order, reading result command, read states order etc..
First address bit 303 is data source address in data transmission microcode, and in ALU operand order microcode
It is operand 1, is constant 0 in other ALU operation microcodes, without in all senses.
Second address bit 304 is data destination address in data transmission microcode, and in ALU operand order microcode
In be operand 2, ALU read result command microcode in be destination address, be constant 0 in other ALU operation microcodes,
Without in all senses.
In specific implementation, the controller controls the transmitter according to the data of command bit in the microcode and completes
Data transmission, specially：
The controller is according to data of command bit in the microcode, the data of the first address bit and the second address bit
Data control the transmitter and complete data transmission.
In specific implementation, the evaluation logic includes operand register, command register, status register and knot
Fruit register.Wherein, command register can once store two orders, after control unit is configured with command register, meeting
It is immediately performed first command, then executes second command again, status register saves the state that ALU operation result generates,
The state of 32 history commands can at most be saved.Each state can determine to update or keep historic state according to order.
In specific implementation, the operation in the evaluation logic is arithmetical operation, logical operation, shift operation, condition
Operation or comparison operation.For example, arithmetical operation operation includes：Support addition, subtraction, from plus 1, subtract 1 certainly, assignment operation etc..It patrols
Volume arithmetic operation include support with or exclusive or, with or with non-or non-etc..Shift operation operates：Support ring shift left,
Ring shift right, arithmetic shift left, arithmetic shift right, logic shift right etc..Conditional operation operates：Supports conditions operator.Compare fortune
Calculating operation includes：Support it is equal, not etc., be greater than, be more than or equal to, being less than, being less than or equal to, is non-zero, the judgements operation such as full 0.In addition,
The data that may include in status register are the abnormal results of operation in evaluation logic, such as addition or excessive in 1 from adding
It counts out, subtraction or the borrow in subtracting 1 certainly.
In specific implementation, the microcode is written in the evaluation logic controller, and described in control
Evaluation logic carries out operation and obtains the status data of the evaluation logic, specially：
The behaviour of the evaluation logic is written in the data of the data of first address bit and the second address bit by the controller
In operand register；
The controller data of command bit is written in the command register of the evaluation logic；
The controller control the evaluation logic carry out operation and obtain the evaluation logic operation result and
The status data of status data and the evaluation logic is stored in the status register of the evaluation logic.
In specific implementation, the controller reads the operation result of the evaluation logic, and according to the operation knot
Fruit updates the microcode, specially：
The controller reads the operation result of result register in the evaluation logic；
The controller updates the microcode according to the operation result；
The controller exports the updated microcode according to the data of second address bit.
That is, controller configures the command register and operand register of ALU after controller reads microcode
Afterwards, start ALU operation immediately.The operation result that controller reads ALU is controlled, microcode in micro-code memory is updated, realizes micro-
The self of code.The method for repeating to update microcode can construct a complete microcode and multiple microcodes.
In specific implementation, as shown in figure 4, the control method includes the following steps：
Step S401, the control device of log-on data transmission.
Step S402, controller read microcode from micro-code memory, and controller decodes microcode.
Step S403, controller judge whether indicating bit is equal to 1, if it is, executing ALU operation, jump to step S405；
Otherwise data transfer operation is executed, step S404 is jumped to.
Step S404, controller controlled transmitter complete data transmission according to the data in command bit.
Step S405, controller judge whether the data in command bit are operand order, if it is S406 is executed, otherwise
Execute S407.
Step S406, controller post the operand of the data of the first address bit and the data of the second address bit write-in ALU
Storage starts in the command register of the data write-in ALU in command bit operation immediately and updates the status register of ALU,
Return step S402.
Step S407, controller judge whether the data in command bit are to read result command, if it is S408 is executed, otherwise
Execute S410.
Step S408, controller read operation result from the result register of ALU.
Step S409, controller update the operation result of ALU to micro-code memory, complete self dimension of microcode
Shield, the microcode address to be updated is the data in the second address, return step S402.
Step S410, controller judge whether ALU order is read states order, if it is S411 is executed, otherwise execute
S402。
Step S411, controller read operation state from the status register of ALU.
Step S412, controller generate next microcode address according to operation state, complete jumping for microcode, return
Step S402.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Made any modifications, equivalent replacements, and improvements etc., should all be included in the protection scope of the present invention within mind and principle.
Claims (9)
1. a kind of control method of data transmission, it is characterised in that:The control method includes the following steps:
Controller obtains microcode, and carries out operation according to the data judgement control evaluation logic of indicating bit in the microcode
Either controlled transmitter carries out data transmission;
When judging result carries out data transmission for controlled transmitter, the controller is according to command bit in the microcode
Data control the transmitter and complete data transmission;
When judging result is that control evaluation logic carries out operation, judge the data of command bit in the microcode for operand
Result command or read states order are read in order;
When the data of command bit are operand order in the microcode, the fortune is written in the microcode by the controller
It calculates in logic device, and the control evaluation logic carries out operation and obtains the operation result and state of the evaluation logic
Data;
The data of command bit are when reading result command in the microcode, and the controller reads the fortune of the evaluation logic
Result is calculated, and the microcode is updated according to the operation result;
When the data of command bit are read states order in the microcode, the controller is according to the shape of the evaluation logic
State data generate next microcode address to realize jumping for microcode；
Wherein, the controller controls the transmitter according to the data of command bit in the microcode and completes data transmission, tool
Body is：
The controller is according to the data of command bit, the data of the data of the first address bit and the second address bit in the microcode
It controls the transmitter and completes data transmission.
2. control method as described in claim 1, it is characterised in that:The evaluation logic includes operand register, life
Enable register, status register and result register.
3. control method as described in claim 1, it is characterised in that:Operation in the evaluation logic is arithmetical operation,
Logical operation, shift operation, conditional operation or comparison operation.
4. control method as claimed in claim 2, it is characterised in that:The fortune is written in the microcode by the controller
It calculates in logic device, and the control evaluation logic carries out operation and obtains the operation result and state of the evaluation logic
Data, specially：
The operand of the evaluation logic is written in the data of the data of first address bit and the second address bit by the controller
In register；
The controller data of command bit is written in the command register of the evaluation logic；
The controller controls the evaluation logic and carries out operation and obtain the operation result and state of the evaluation logic
The status data of data and the evaluation logic is stored in the status register of the evaluation logic.
5. control method as claimed in claim 2, it is characterised in that:The controller reads the fortune of the evaluation logic
Calculate as a result, and the microcode is updated according to the operation result, specially：
The controller reads the operation result of result register in the evaluation logic；
The controller updates the microcode according to the operation result；
The controller exports the updated microcode according to the data of second address bit.
6. a kind of control device of data transmission, it is characterised in that:The control device includes:
Controller, for obtaining microcode, and according to the data judgement control evaluation logic of indicating bit in the microcode into
Row operation or controlled transmitter carry out data transmission;When judging result carries out data transmission for controlled transmitter, according to described
The data of command bit control the transmitter and complete data transmission in microcode;When judging result is that control evaluation logic carries out
When operation, judge the data of command bit in the microcode for operand order, reading result command or read states order;It is described micro-
When the data of command bit are operand order in code, the microcode is written in the evaluation logic, and described in control
Evaluation logic carries out operation and obtains the operation result and status data of the evaluation logic;Command bit in the microcode
Data be when reading result command, to read the operation result of the evaluation logic, and described in being updated according to the operation result
Microcode;When the data of command bit are read states order in the microcode, produced according to the status data of the evaluation logic
A microcode address is given birth to realize jumping for microcode, wherein the controller is also used to order according in the microcode
It enables the data of the data of position, the data of the first address bit and the second address bit control the transmitter and completes data transmission；
The transmitter carries out data transmission for the control according to the controller；
The evaluation logic carries out data operation for the control according to the controller.
7. control device as claimed in claim 6, it is characterised in that:The evaluation logic includes operand register, life
Enable register, status register and result register.
8. control device as claimed in claim 6, it is characterised in that:The evaluation logic is patrolled for carrying out arithmetical operation
Collect operation, shift operation, conditional operation or comparison operation.
9. a kind of microprocessor, it is characterised in that：The microprocessor includes：Control as described in claim 6-8 any one
Device processed, micro-code memory, first memory and second memory；
Micro-code memory is connect, for saving microcode with the controller；
First memory is connect with the controller, needs to transmit data for saving；
Second memory is connect with the controller, obtains transmission data for saving.
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Citations (3)
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| US6745320B1 (en) * | 1999-04-30 | 2004-06-01 | Renesas Technology Corp. | Data processing apparatus |
| CN102184092A (en) * | 2011-05-04 | 2011-09-14 | 西安电子科技大学 | Special instruction set processor based on pipeline structure |
| CN102298352A (en) * | 2010-06-25 | 2011-12-28 | 中国科学院沈阳自动化研究所 | Specific processor system structure for high-performance programmable controller and implementation method of dedicated processor system structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1171244A (en) * | 1996-07-22 | 1998-01-28 | 王云静 | Medicine for treating burn and scald |
| JP5292406B2 (en) * | 2008-09-12 | 2013-09-18 | ルネサスエレクトロニクス株式会社 | Semiconductor integrated circuit device |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6745320B1 (en) * | 1999-04-30 | 2004-06-01 | Renesas Technology Corp. | Data processing apparatus |
| CN102298352A (en) * | 2010-06-25 | 2011-12-28 | 中国科学院沈阳自动化研究所 | Specific processor system structure for high-performance programmable controller and implementation method of dedicated processor system structure |
| CN102184092A (en) * | 2011-05-04 | 2011-09-14 | 西安电子科技大学 | Special instruction set processor based on pipeline structure |
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