CN105390469A - 引线框架和制造引线框架的方法 - Google Patents
引线框架和制造引线框架的方法 Download PDFInfo
- Publication number
- CN105390469A CN105390469A CN201510513076.9A CN201510513076A CN105390469A CN 105390469 A CN105390469 A CN 105390469A CN 201510513076 A CN201510513076 A CN 201510513076A CN 105390469 A CN105390469 A CN 105390469A
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- China
- Prior art keywords
- lead frame
- metal level
- leadframe layers
- mixing lead
- thin leadframe
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 19
- 229910052751 metal Inorganic materials 0.000 claims abstract description 93
- 239000002184 metal Substances 0.000 claims abstract description 93
- 238000002156 mixing Methods 0.000 claims description 61
- 238000000034 method Methods 0.000 claims description 54
- 238000003466 welding Methods 0.000 claims description 53
- 238000005516 engineering process Methods 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 16
- 238000009792 diffusion process Methods 0.000 claims description 14
- 238000005538 encapsulation Methods 0.000 claims description 14
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 11
- 229910052802 copper Inorganic materials 0.000 claims description 11
- 239000010949 copper Substances 0.000 claims description 11
- 238000005530 etching Methods 0.000 claims description 10
- 238000000465 moulding Methods 0.000 claims description 8
- 238000010923 batch production Methods 0.000 claims description 5
- 230000005611 electricity Effects 0.000 description 6
- 238000004080 punching Methods 0.000 description 6
- 239000000956 alloy Substances 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 230000004927 fusion Effects 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 230000003044 adaptive effect Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- 230000002349 favourable effect Effects 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000013507 mapping Methods 0.000 description 2
- 238000005192 partition Methods 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910016347 CuSn Inorganic materials 0.000 description 1
- 229910000640 Fe alloy Inorganic materials 0.000 description 1
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000013011 mating Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000011176 pooling Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L23/00—Details of semiconductor or other solid state devices
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- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
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- B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
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- B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
- B23K1/0016—Brazing of electronic components
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B23K1/19—Soldering, e.g. brazing, or unsoldering taking account of the properties of the materials to be soldered
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- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
- B23K20/02—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating by means of a press ; Diffusion bonding
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- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
- B23K20/02—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating by means of a press ; Diffusion bonding
- B23K20/023—Thermo-compression bonding
- B23K20/026—Thermo-compression bonding with diffusion of soldering material
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Abstract
本发明涉及引线框架和制造引线框架的方法。提供混合引线框架,该混合引线框架包括:薄引线框架层,包括管芯焊盘和结构化的区;以及金属层,比薄引线框架层更厚并且布置在管芯焊盘上。
Description
技术领域
各种实施例涉及引线框架,特别是包括两个子层的混合引线框架,以及制造引线框架的方法。
背景技术
在现有技术中多个封装芯片或电子模块是已知的。这样的封装芯片的一个示例是所谓的功率封装,即意图承载、传导或切换比常用信息信号的信号电平更高的电功率信号或电压的封装电子模块。在这样的功率封装芯片中背侧再分布(漏极/集电极接触)典型地通过引线框架焊接来完成,同时芯片前侧再分布(源极/发射极接触和栅极接触)将通过线键合和/或夹键合来完成。
引线框架典型地被用于芯片或管芯的电(经由引线)和热(管芯焊盘)再分布并且典型地在制造工艺像穿孔或刻蚀内被结构化。
发明内容
各种实施例提供混合引线框架,该混合引线框架包括:薄引线框架层,包括管芯焊盘和结构化的区;以及金属层,比薄引线框架层更厚并且布置在管芯焊盘上。
此外,各种实施例提供制造混合引线框架的方法,其中该方法包括:提供包括管芯焊盘和结构化的区的薄引线框架层;并且将金属层附连在管芯焊盘上,其中该金属层具有比薄引线框架层的厚度更大的厚度。
此外,各种实施例提供功率封装,该功率封装包括:依据示范性实施例的混合引线框架;以及布置在金属层上的芯片。
附图说明
在附图中,贯穿不同视图相似的参考符号通常指的是相同的部件。附图不必成比例。替代地通常将重点放在图解本发明的原理上。在下面描述中,各种实施例参考下面附图来描述,在附图中:
图1A和1B示意性示出包括混合引线框架的功率封装的示范性实施例;
图2A到2D示意性示出依据示范性实施例的制造混合引线框架的工艺;
图3A到3G示意性示出依据示范性实施例的制造功率封装的工艺;并且
图4A到4E示意性示出功率封装的示范性实施例。
具体实施方式
在混合引线框架的下面进一步示范性实施例中,将解释制造混合引线框架的方法、以及包括混合引线框架的功率封装。应该注意在一个特定示范性实施例的上下文中描述的特定特征的描述也可以与其它示范性实施例组合。
词“示范性的”在本文中被用来表示“用作示例、实例、或图解”。在本文中描述为“示范性的”任何实施例或设计不必要被解释为比其它实施例或设计是优选的或有利的。
各种示范性实施例提供混合引线框架和制造这样的混合引线框架的方法,其中混合引线框架包括两个子层(从不同或相同材料形成),该两个子层优选地通过不同工艺形成且具有不同厚度,并且特别地通过将一个子层(例如(未结构化的)金属层)附连在另一个子层(例如薄引线框架层(例如包括管芯焊盘和结构化的区或区域))上来堆叠在彼此的顶部上,从而形成包括两个可区别的子层的混合引线框架。比如,金属层仅被布置在薄引线框架层的管芯焊盘上。
此外,可以提供包括一个或多个混合引线框架的功率封装,其中至少一个芯片或管芯被附连或布置在混合引线框架的金属层上。特别地,多个芯片或管芯可以被布置在金属层上。替选地或额外地,额外金属层可以被布置在管芯焊盘上,其中额外芯片被布置在额外金属层上。比如,芯片可以例如通过粘合工艺像焊接或使用粘合膏或粘合膜等等被附连到管芯焊盘。
特别地,金属层仅被布置在管芯焊盘上或被附连到管芯焊盘和/或结构化的区没有金属层。比如,管芯焊盘可以具有第一尺寸或面积同时金属层可以具有更大的第二尺寸或面积,因而导致金属层“伸出”薄引线框架层的管芯焊盘或管芯焊盘区。替选地,金属层的第二尺寸或面积可以小于管芯焊盘的第一尺寸,因而导致管芯焊盘区的“伸出”。金属层可以形成混合引线框架的某种垫片或隔片,或起混合引线框架的某种垫片或隔片的作用。
术语“管芯焊盘”可以特别指示适配成然后接收芯片或管芯并且可以是未结构化(例如,形成平面区域或区)的薄引线框架的区域或区。
通过提供包括两个层或两个子层的混合引线框架,可以可能的是分离典型的混合引线框架的功能。尽管薄引线框架层可以被用于电再分布,但是更厚的金属层可以起热缓冲区或热再分布层的作用。特别地,可以可能的是(归因于薄引线框架层的使用)提供具有小节距(例如,大约混合引线框架的厚度,比如甚至低于1mm,特别地低于0.4mm,例如在0.1mm或0.2mm到0.4mm的范围中)的混合引线框架的引线。
因而,可以可能的是将混合引线框架更紧密地适配到在其中使用混合引线框架的电子模块或功率封装的特定需要。此外,可以可能的是对混合引线框架的两个子层使用不同的制造工艺,例如刻蚀和冲压、锯切等等,这可以额外地增加灵活性并且同时可以减少制造成本。此外,可以可能的是以简单和高效的方式通过仅适配或调节金属层的高度来适配或调节混合引线框架的高度。因而,可以可能的是以高效的方式将混合引线框架的总高度调节到典型地用于夹键合等等的标准尺度。
应该注意附连金属层必须要以广泛意义来理解并且描述的步骤的次序不将方法限制到步骤的适时次序。比如,首先可以提供金属层并且随后薄引线框架层可以被附连到金属层。
通过提供这样的混合引线框架可以可能的是组合两个子层的不同材料和或形成工艺的优点。比如,常用薄引线框架层可以通过适合于满足灵活的设计规则的刻蚀工艺来形成,同时金属层(例如未结构化的金属块)可以以也适合于更厚层的不那么复杂和昂贵的冲压或穿孔工艺来形成。因而,涉及电功能的再分布可以由一个子层(薄引线框架层)来执行,同时涉及热功能(例如,热缓冲功能)的再分布可以(主要地)由第二子层例如更厚的金属(铜)层来提供。
在下面描述混合引线框架的示范性实施例。然而,关于这些实施例描述的特征和要素能够与功率封装和制造混合引线框架的方法的示范性实施例组合。
依据混合引线框架的示范性实施例,金属层是未结构化的金属块。
术语“未结构化的”可以特别地指示电连接线、连接焊盘等等不被图案化或形成在未结构化的一部分(例如,未结构化的金属块)上或未结构化的一部分(例如,未结构化的金属块)中。因而,未结构化的金属块不形成电再分布的一部分或部分,但是仅形成热再分布的部分。然而,替选地金属层也可以被结构化并且因而也可以额外地对某些电再分布有用。
依据混合引线框架的示范性实施例,金属层包括作为材料的铜。
特别地,金属层可以基本上由铜组成。通常,归因于铜的高热导率和热容,铜可以是针对热再分布的良好选择。替选地,铝或甚至铁镍合金可以被用于金属层。
依据混合引线框架的示范性实施例,金属层通过粘合工艺被附连到薄引线框架层。
特别地,粘合工艺可以是焊接工艺或其中使用粘合膏、粘合膜或粘合材料的工艺。通常,可以使用适合于将金属层附连到薄引线框架层的每个工艺。
依据混合引线框架的示范性实施例,粘合工艺是扩散焊接工艺。
由于在这样的扩散焊接工艺中一层材料可以被施加或电镀到混合引线框架上,其中电镀层的材料具有下述熔化温度:该熔化温度低于由电镀材料的扩散和薄引线框架层的扩散产生的合金,所以扩散焊接工艺或混合引线框架扩散焊接工艺可以特别有用。因而,可以可能的是金属层能够以相对低的温度(电镀材料的熔化温度)被附连或固定到薄引线框架层,同时在形成合金之后混合引线框架能够然后以相同的低的温度或更高的温度(高到合金的熔化温度)被处理而没有冒然后熔化合金的风险。
依据混合引线框架的示范性实施例,薄引线框架层是双量表(dualgauge)引线框架层。
特别地,薄引线框架层可以在管芯焊盘的区中具有更大的厚度,而同时在结构化的区中具有更薄的厚度(例如,形成混合引线框架的引线)。因而,可以可能的是薄引线框架层已经形成热再分布或热缓冲的部分,同时更薄的一部分(结构化的区)可以灵活地被结构化。
依据混合引线框架的示范性实施例,薄引线框架层通过刻蚀工艺被结构化。
特别地,薄引线框架层可以是所谓的半刻蚀混合引线框架,即混合引线框架从一侧(一个主表面)被刻蚀并且优选地从相对侧不被刻蚀。通过使用用于结构化薄引线框架层的刻蚀工艺,可以可能的是以非常灵活的方式匹配或观察用于总或混合引线框架的设计规则。
依据混合引线框架的示范性实施例,金属层通过冲压工艺形成。
特别地,冲压或穿孔工艺是用于形成未结构化的金属层或金属块的适合和高效工艺。特别地,冲压或穿孔是用于以高效方式形成厚层或结构的低复杂工艺。
在下面描述制造混合引线框架的方法的示范性实施例。然而,关于这些实施例描述的特征能够与混合引线框架和功率封装的示范性实施例组合。
依据方法的示范性实施例,薄引线框架层通过刻蚀工艺被结构化。
依据方法的示范性实施例,金属层通过冲压工艺形成。
依据方法的示范性实施例,附连金属层通过扩散焊接工艺来执行。
然而,也可以使用任何适合的附连工艺,像常用的焊接工艺或粘合工艺。
依据方法的示范性实施例,将金属层附连到薄引线框架层以批量工艺来执行。
特别地,可以提供多个金属层和薄引线框架层,并且多个薄引线框架层和多个金属层分别可以以批量工艺同时或同步彼此互连。比如,附连可以通过混合引线框架扩散焊接批量工艺来执行。
在下面描述功率封装的示范性实施例。然而,关于这些实施例描述的特征能够与混合引线框架和制造混合引线框架的方法的示范性实施例组合。
依据示范性实施例,功率封装进一步包括直接布置在管芯焊盘上的进一步芯片。
就是说进一步芯片或管芯可以直接被布置在管芯焊盘上或附连到管芯焊盘,即不被布置在金属层上而是直接被布置在薄引线框架层的管芯焊盘上。这个直接布置在下述情形下可以是适合的:在操作期间进一步芯片典型地生成更少热量,从而金属层的热容不如针对布置在金属层上的芯片(特别是功率芯片)那样是必要的。特别地,芯片和/或进一步芯片可以是晶体管(特别是功率晶体管),即比如适配于切换具有大于50V的电压电平的信号的晶体管。
依据示范性实施例,功率封装进一步包括封装,该封装包括模制材料。
特别地,封装可以通过下述工艺形成:模制工艺,例如空腔模制工艺,可选地与稍后穿孔单体化组合,或映射(map)模制工艺,可选地与稍后锯切单体化组合。
下面关于附图将更详细描述混合引线框架的特定实施例。
图1A和1B示意性示出包括混合引线框架的功率封装的示范性实施例。特别地,图1A示出包括薄引线框架层101的功率封装100,该薄引线框架层101包括管芯焊盘102和形成薄引线框架层101的引线的结构化的区103。此外,功率封装100包括例如通过任何粘合或焊接工艺附连到管芯焊盘102的厚金属层或金属块104。具有布置在上侧上的接触焊盘(未被示出)的芯片或管芯105被布置或附连到金属层上。
比如,在(功率)晶体管形成芯片的情形下,接触焊盘可以被电连接到晶体管的源极/发射极和/或栅极接触,同时连接到金属层的下侧或底侧可以形成漏极/集电极接触。上侧的接触焊盘可以经由线键合106或夹107连接到薄引线框架层的结构化的区103。此外,在图1A中示出封装描述的部件的封装或模制化合物108。比如,封装可以由空腔模制工艺和稍后的穿孔单体化形成(如由侧向延伸出封装108的引线103指示)。
比较起来图1B示意性示出具有封装118的功率封装110,该封装118由映射模制工艺和稍后的锯切单体化形成,如通过引线113不侧向延伸出封装118的事实指示。功率封装110的其它部件与图1A的部件相同,并且归因于这个原因不再描述。
图1A和1B的实施例的薄引线框架层101的厚度可以在100微米到300微米(特别是大约200微米)的范围中,同时金属层104的厚度可以在600微米到1000微米(特别是大约800微米)的范围中。通常薄引线框架层和金属层的厚度的比率比如可以在1:2到1:10的范围中。特别地,金属层可以包括铜或由铜组成。替选地,也可以使用铝或铁和镍的合金。
图2A到图2D示意性示出依据示范性实施例的制造混合引线框架的工艺。特别地,图2A以侧视图示出标准的半刻蚀引线框架200,其在一侧(图2A中的下侧)上具有如在图2A中由“半圆”或“半椭圆”结构201指示的刻蚀结构。图2B以平面视图示出图2A的引线框架200并且示出管芯焊盘202和引线203。
图2C示出图2C的单个薄引线框架层200,其中金属块(例如,冲压的铜块或板)204被附连到引线框架200,这由箭头205指示。此外,在图2C中示出额外的焊料层或电镀层206,其被电镀或布置在金属块204上并且意图促进或改进金属块204到薄引线框架层200的附连,例如在扩散焊接的情形下可以使用CuSn电镀层。
图2D示出在完成图2C中示出的扩散焊接工艺之后图2C的引线框架200。特别地,图2的工艺或方法描述下述工艺的基本步骤:该工艺能够实现制造某种具有两个子层的双量表混合引线框架并且可能提供良好的热扩散。此外,半刻蚀引线框架的使用可以能够实现映射模制或空腔模制的使用并且可以从管芯焊盘区域或区解耦占用区。
在下面附图和图2的上下文中,应该注意尽管金属层总是被示出比相应的引线框架更薄,但是通常金属层比相应的引线框架更厚。
图3A到3G示意性示出依据示范性实施例的制造功率封装的工艺。特别地,图3A示出制造混合引线框架的批量工艺的第一步骤301,在该第一步骤中提供包括用于相应的金属(铜)层312的多个接收区域311的载体310,该金属(铜)层312包括附连到此的电镀层313。在金属层312被布置在接收区域中之后,引线框架314被布置在载体310上方并且被放在载体310上,如步骤302在图3B中指示的。比如,引线框架314可以是如在图2B中示出的包括管芯焊盘区域和结构化的区域或区(形成引线)的引线框架。
在下一个步骤(图3C)中,通过施加压力(由箭头315指示)和热(由正弦线316指示)到夹具(由层317指示)中的两个子层(金属层和引线框架)来执行扩散焊接工艺303。然后准备好的混合引线框架318能够从载体310去除(图3D)。
在图3E到3G中示出从引线框架318形成功率封装的进一步步骤。特别地,图3E示出在芯片或管芯319被附连到金属层312从而形成芯片布置320(步骤305)之后的引线框架318。图3F示出在芯片319的接触焊盘经由线键合321被电连接到引线之后的芯片布置320。然后包括模制材料的封装322被形成到图3F的芯片布置上(步骤307),如在图3G中指示的。
图4A到4E示意性示出功率封装的示范性实施例。特别地,图4A示出依据第一示范性实施例的第一功率封装400,该第一功率封装400包括薄引线框架层401和通过焊接步骤或层(在图4A中指示为403)附连到该薄引线框架层401的金属层402,其中金属层402具有比薄引线框架层401的管芯焊盘更小的尺寸从而薄引线框架层“伸出”金属层402。此外,功率封装400包括经由键合线405电连接到薄引线框架层401的引线的功率芯片或功率管芯404。此外,在图4A中示出封装406。
特别地,图4B示出依据第二示范性实施例的第二功率封装410,该第二功率封装410类似于图4A中示出的功率封装。然而,相应的金属层412的尺寸具有与相应的薄引线框架层401的管芯焊盘相同的尺寸,从而金属层和薄引线框架层都不伸出混合引线框架的相应的其它子层。其它部件与图4A中示出的第一实施例的部件相同并且不再描述。
特别地,图4C示出依据第三示范性实施例的第三功率封装420,该第三功率封装420类似于图4A中示出的功率封装。然而,相应的金属层422的尺寸比相应的薄引线框架层401的管芯焊盘的尺寸小得多。因而导致下述事实:在管芯焊盘上可获得足够空间,另一个芯片或管芯427能够被布置在管芯焊盘上。如在图4C中指示,在管芯焊盘和另一个芯片427之间不形成额外的金属层。这可以在另一个芯片不提供大量热(例如因为它不是功率芯片)的情形下是有利的。在另一个芯片427也是功率芯片的情形下,在另一个芯片下方可以形成额外的金属层或也可以形成具有用于另一个芯片427的足够尺寸的金属层422。
特别地,图4D示出依据第四示范性实施例的第四功率封装430,该第四功率封装430类似于图4C中示出的功率封装。然而,在芯片404和另一个芯片427之间形成将两个芯片彼此连接的额外夹连接438。
特别地,图4E示出依据第五示范性实施例的第五功率封装440,该第五功率封装440类似于图4A中示出的功率封装。然而,与图4A中示出的功率封装相比较,键合线405中的一个被夹连接449取代。
可以在制造并且提供包括彼此可区别的两个子层的混合引线框架中看到总结各种示范性实施例的示范性方面。特别地,两个子层可以关于不同的功能来优化。比如,薄(半刻蚀)引线框架层可以接管电再分布的功能同时更厚(冲压的)金属层或块可以接管热再分布的功能。此外,金属层关于适配混合引线框架的管芯焊盘的高度以能够实现使用标准的夹厚度材料也可以是有利的。因而,可以可能的是使用标准的引线框架材料厚度和标准的夹材料厚度,从而整个工艺与下述工艺相比较不那么昂贵:该工艺不使用适配金属层,从而管芯厚度和封装厚度的组合将要求非标准的夹材料厚度。
应该注意术语“包括”不排除其它要素或特征,并且“一(a)”或“一个(an)”不排除多个。与不同实施例相关联的所描述的要素也可以被组合。也应该注意参考符号不要被理解为限制权利要求的范围。尽管关于特定实施例已特定示出和描述本发明,但是本领域技术人员应该理解可以在其中做出形式和细节上的各种改变而没有脱离如由所附权利要求限定的本发明的精神和范围。因而本发明的范围由所附权利要求指示并且因此意图涵盖落在权利要求的等价物的含义和范围内的所有改变。
Claims (16)
1.一种混合引线框架,包括:
薄引线框架层,包括管芯焊盘和结构化的区;以及
金属层,比所述薄引线框架层更厚并且布置在所述管芯焊盘上。
2.依据权利要求1的所述混合引线框架,其中所述金属层是未结构化的金属块。
3.依据权利要求1的所述混合引线框架,其中所述金属层包括作为材料的铜。
4.依据权利要求1的所述混合引线框架,其中所述金属层通过粘合工艺被附连到所述薄引线框架层。
5.依据权利要求4的所述混合引线框架,其中所述粘合工艺是扩散焊接工艺。
6.依据权利要求1的所述混合引线框架,其中所述薄引线框架层是双量表引线框架层。
7.依据权利要求1的所述混合引线框架,其中所述薄引线框架层通过刻蚀工艺被结构化。
8.依据权利要求1的所述混合引线框架,其中所述金属层通过冲压工艺形成。
9.一种制造混合引线框架的方法,所述方法包括:
提供薄引线框架层,所述薄引线框架层包括管芯焊盘和结构化的区;
将金属层附连在所述管芯焊盘上,其中所述金属层具有比所述薄引线框架层的厚度更大的厚度。
10.依据权利要求9的所述方法,其中所述薄引线框架层通过刻蚀工艺被结构化。
11.依据权利要求9的所述方法,其中所述金属层通过冲压工艺形成。
12.依据权利要求9的所述方法,其中附连所述金属层通过扩散焊接工艺来执行。
13.依据权利要求9的所述方法,其中将金属层附连到所述薄引线框架层以批量工艺来执行。
14.一种功率封装,包括:
依据权利要求1的混合引线框架;以及
芯片,布置在所述金属层上。
15.依据权利要求14的所述功率封装,进一步包括直接布置在所述管芯焊盘上的进一步芯片。
16.依据权利要求14的所述功率封装,进一步包括封装,该封装包括模制材料。
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Publication number | Priority date | Publication date | Assignee | Title |
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DE102015106148A1 (de) * | 2015-04-22 | 2016-10-27 | Infineon Technologies Austria Ag | Vorrichtung mit einem logischen Halbleiterchip mit einer Kontaktelektrode für Clip-Bonding |
US10504736B2 (en) * | 2015-09-30 | 2019-12-10 | Texas Instruments Incorporated | Plating interconnect for silicon chip |
JP6860334B2 (ja) * | 2016-12-06 | 2021-04-14 | 株式会社東芝 | 半導体装置 |
DE102019112778B4 (de) * | 2019-05-15 | 2023-10-19 | Infineon Technologies Ag | Batchherstellung von Packages durch eine in Träger getrennte Schicht nach Anbringung von elektronischen Komponenten |
CN116613110B (zh) * | 2023-06-16 | 2024-02-23 | 广东气派科技有限公司 | 一种增强散热的盖板封装结构制备方法及盖板封装结构 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070125449A1 (en) * | 2005-12-05 | 2007-06-07 | Ryoichi Kajiwara | High-temperature solder, high-temperature solder paste and power semiconductor device using same |
CN101118895A (zh) * | 2006-08-03 | 2008-02-06 | 飞思卡尔半导体公司 | 具有内置热沉的半导体器件 |
US20080230905A1 (en) * | 2007-03-19 | 2008-09-25 | Karsten Guth | Power Semiconductor Module, Method for Producing a Power Semiconductor Module, and Semiconductor Chip |
CN102683221A (zh) * | 2011-03-17 | 2012-09-19 | 飞思卡尔半导体公司 | 半导体装置及其组装方法 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5126820A (en) * | 1985-02-01 | 1992-06-30 | Advanced Micro Devices, Inc. | Thermal expansion compensated metal lead frame for integrated circuit package |
US20030006055A1 (en) * | 2001-07-05 | 2003-01-09 | Walsin Advanced Electronics Ltd | Semiconductor package for fixed surface mounting |
US6608366B1 (en) * | 2002-04-15 | 2003-08-19 | Harry J. Fogelson | Lead frame with plated end leads |
US6927479B2 (en) * | 2003-06-25 | 2005-08-09 | St Assembly Test Services Ltd | Method of manufacturing a semiconductor package for a die larger than a die pad |
US6977431B1 (en) * | 2003-11-05 | 2005-12-20 | Amkor Technology, Inc. | Stackable semiconductor package and manufacturing method thereof |
US7554179B2 (en) * | 2005-02-08 | 2009-06-30 | Stats Chippac Ltd. | Multi-leadframe semiconductor package and method of manufacture |
US7378300B2 (en) * | 2005-09-22 | 2008-05-27 | Stats Chippac Ltd. | Integrated circuit package system |
KR20080065153A (ko) * | 2007-01-08 | 2008-07-11 | 페어차일드코리아반도체 주식회사 | 메탈 태브 다이 접착 패들(dap)을 구비한 파워소자패키지 및 그 패키지 제조방법 |
JP4926726B2 (ja) * | 2007-01-15 | 2012-05-09 | ローム株式会社 | 半導体装置 |
US9029200B2 (en) * | 2010-07-15 | 2015-05-12 | Infineon Technologies Austria Ag | Method for manufacturing semiconductor devices having a metallisation layer |
DE102011080929B4 (de) * | 2011-08-12 | 2014-07-17 | Infineon Technologies Ag | Verfahren zur Herstellung eines Verbundes und eines Leistungshalbleitermoduls |
KR101675138B1 (ko) * | 2015-02-04 | 2016-11-10 | 현대모비스 주식회사 | 전력반도체 모듈 및 이의 제조방법 |
-
2014
- 2014-08-20 DE DE102014111908.8A patent/DE102014111908A1/de not_active Withdrawn
-
2015
- 2015-08-19 US US14/830,548 patent/US20160056092A1/en not_active Abandoned
- 2015-08-20 CN CN201510513076.9A patent/CN105390469A/zh active Pending
-
2018
- 2018-02-06 US US15/890,071 patent/US20180158758A1/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070125449A1 (en) * | 2005-12-05 | 2007-06-07 | Ryoichi Kajiwara | High-temperature solder, high-temperature solder paste and power semiconductor device using same |
CN101118895A (zh) * | 2006-08-03 | 2008-02-06 | 飞思卡尔半导体公司 | 具有内置热沉的半导体器件 |
US20080230905A1 (en) * | 2007-03-19 | 2008-09-25 | Karsten Guth | Power Semiconductor Module, Method for Producing a Power Semiconductor Module, and Semiconductor Chip |
CN102683221A (zh) * | 2011-03-17 | 2012-09-19 | 飞思卡尔半导体公司 | 半导体装置及其组装方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116613118A (zh) * | 2023-07-19 | 2023-08-18 | 日月新半导体(苏州)有限公司 | 集成电路封装产品以及集成电路导线框架 |
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