CN105051862A - 支撑基板以及半导体用复合晶片 - Google Patents
支撑基板以及半导体用复合晶片 Download PDFInfo
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- CN105051862A CN105051862A CN201480016581.6A CN201480016581A CN105051862A CN 105051862 A CN105051862 A CN 105051862A CN 201480016581 A CN201480016581 A CN 201480016581A CN 105051862 A CN105051862 A CN 105051862A
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Abstract
一种半导体用复合晶片的支撑基板,可以抑制形成有切口的晶片的微粒。半导体用复合晶片的支撑基板(1A)、(1B)由多晶陶瓷烧结体形成,在外周边缘部有切口(2A)、(2B)。切口由烧成面形成。
Description
技术领域
本发明涉及支撑基板以及半导体用复合晶片。
背景技术
以往已知的是,通过将被称为SilicononQuartz(SOQ)、SilicononGlass(SOG)、SilicononSapphire(SOS)的支撑基板、由透明·绝缘基板构成的SOI和GaN、ZnO、金刚石、AlN等透明宽带隙半导体与硅等施主基板接合,可以得到贴合晶片。由于SOQ、SOG、SOS等支撑基板的绝缘性·透明性等,被期待应用于投影仪、高频器件等。此外,宽带隙半导体的薄膜与支撑基板的复合化贴合晶片,被期待应用于高性能激光器和功率器件等。
此种半导体用的复合晶片由支撑基板和施主基板构成,一般,支撑基板、施主基板由单晶材料构成。以前,在基底基板上通过外延生长形成硅层的方法是主流,但近年来,开发了直接接合形成的方法,对半导体器件的性能改善有所帮助。即,此种支撑基板和施主基板介由接合层或粘合层接合、或者直接接合。
另一方面,作为形成CMOS的基材,使用的是半导体(主要是硅)。由于使用了数百的加工工序-设备,因此对于基材晶片设定有通用的标准(SEMI:SemiconductorEquipmentandMaterialsinternational)。
特别实施的有,使用SOS(SilicononSapphire)基板形成CMOS晶体管。该晶片是在硅上接合蓝宝石而制作,要求蓝宝石的形状与硅的形状统一。
作为硅晶片,一般使用的是<100>晶面取向的,基于与掩模图案的整合性,确认晶面取向是很重要的。在SEMI标准下,这被定义为“切口”方法,规定了切口的样式(非专利文献1)。
另一方面,伴随上述的接合技术的进步,也提出了由石英、玻璃、氧化铝等蓝宝石以外的材质构成的支撑基板的各种提案(专利文献1、2、3、4)。
此外,根据专利文献5,通过将不含硅和铝两者的氧化钇、氧化镱、氧化镧、氧化钌的烧结体所构成的覆盖晶片设置在半导体制造内腔的基板架上,抑制硅化合物以及铝化合物的产生。在这里,覆盖晶片上形成有V切口(0022)。
现有技术文献
专利文献
【专利文献1】WO2010/128666A1
【专利文献2】日本专利特开平05-160240
【专利文献3】日本专利特开平05-160240
【专利文献4】日本专利特开2008-288556
【专利文献5】日本专利特开2006-100705
【非专利文献】
【非专利文献1】《使用了面法线方向测定的新晶片边缘截面形状测定法》神户制钢技报Vol.57No.3(2007年12月号)43~48页
发明内容
依据了SEMI标准的晶片,例如8英寸晶片中,作为晶向的显示,必须形成切口,但由于蓝宝石的韧性低,在蓝宝石晶片上形成切口的话,会产生缺损或从磨削部分产生微粒。因此,蓝宝石晶片上,难以良好的形成对应SEMI标准的切口。
另一方面,如专利文献5的记载,也可以考虑在氧化钇等陶瓷构成的晶片上形成切口。此种陶瓷的韧性高于蓝宝石,因此认为容易形成切口。
但是,实际尝试通过磨削加工等形成切口的话,可知洗净后的微粒数很多。在随后的半导体工序,例如SOS等复合晶片形成后的工序中,由于热·搬运等的冲击,恐怕会出现晶片开裂、产生微粒,后续工序的成品率会下降。
本发明的课题是,在半导体用复合晶片的支撑基板中,可以抑制来自形成有切口的晶片的微粒。
本发明是一种半导体用复合晶片的支撑基板,其特征在于,
支撑基板由多晶陶瓷烧结体形成,在支撑基板的外周边缘部有切口,切口由烧成面形成。
此外,本发明涉及一种半导体用复合晶片,其特征在于,具有所述支撑基板、以及与所述支撑基板的接合面接合的施主基板。
通过使用多晶陶瓷烧结体作为支撑基板的材料,应该可以提高材料的韧性,容易在支撑基板上形成切口,使得此时不易产生缺损或微粒。但是,从本发明者的实验结果可以知道,在由多晶陶瓷烧结体构成的支撑基板上形成切口的话,洗净后的微粒数很多,恐怕会在随后的半导体工序中产生不良状况。
因此,本发明者尝试了在通过多晶陶瓷烧结体形成支撑基板的同时,由烧成面(烧结后不进行表面加工的面)成形切口。结果发现,洗净后残留的微粒显著减少。此种烧成面切口的成形,可以通过对用于成形陶瓷成形材料的模具形状进行钻研而实现。
附图说明
【图1】
(a)、(b)分别是显示形成有切口的支撑基板1A、1B的平面图。
【图2】
显示平均粒径的计算方式例的模式图。
【图3】
例示支撑基板的制造工序的流程图。
【图4】
(a)、(b)以及(c)是显示复合晶片的制造顺序的侧视图。
【图5】
切口表面(烧成面)的光学显微镜照片。
【图6】
切口表面(CMP研磨面)的光学显微镜照片。
具体实施方式
以下适当参照附图,更详细地说明本发明。
(用途)
本发明的复合晶片可用于投影仪用发光元件、高频器件、高性能激光器、功率器件、逻辑IC等。
(施主基板)
复合晶片包含本发明的支撑基板和施主基板。
施主基板的材质并无特别限定,但优选从硅、氮化铝、氮化镓、氧化锌及金刚石构成的群中选择。
施主基板具有上述的材质,表面也可具有氧化膜。这是由于,通过氧化膜进行离子注入的话,可以得到控制注入离子的沟道效应的效果。氧化膜优选具有50~500nm的厚度。具有氧化膜的施主基板也包含于施主基板,只要没有特别区分,都称为施主基板。
(支撑基板)
如图1(a)、(b)所示,支撑基板1A、1B例如为圆形,形成有一处切口2A、2B。图1(a)所示的切口2A为U字形,图1(b)所示的切口2B为V字形。这些切口在进行半导体设备制造工序的各项操作时等,用于进行晶片位置或方向的检测等。特别是8英寸以上尺寸的晶片中,作为一般的检测方法引入,以替代定向平面。
在这里,根据本发明,支撑基板的切口由多晶烧结体的烧成面形成。烧成面指的是,陶瓷成形体烧结时得到的面,是未进行机械性表面加工的面。
在这里,所述烧成面中,与研磨面不同,可以观察到来源于陶瓷多晶的晶界。通过光学式显微镜(倍率200倍)的观察,可以理解该烧成面与研磨面的差异。烧成面的拍摄例如图5所示,CMP研磨面的拍摄例如图6所示。
可以知道,烧成面上,拍摄的粒子较明亮,大量排列。另外,邻接的粒子之间形成有相对较暗的线状部分。线状部分相互连接,由此在平面观察下形成网状结构,形成连续相。另一方面,各粒子分别被线状部分包围,形成分散相。可以认为,在烧成面中,由于粒子比晶界略微高出一点,因此容易照射到光,变得明亮。
另一方面,研磨面中,整体的明暗对比度变小。这是由于,存在于烧成面上的大量粒子的表面分别被研磨而变低,与晶界的高低差变小。其结果是,比周围稍高的突起随处可见,在突起的周边存在稍暗的部分。据推测,该突起部分大致相当于粒子,与突起邻接的稍暗部分大致相当于晶界。但是,较亮部分与较暗部分的对比度小,晶界的形状也不鲜明。其结果是,研磨面上,存在与粒子邻接的稍暗的部分,可以认为是晶界,但是,较暗部分在平面观察下没有形成网状结构,也没有形成连续相。此外,各粒子也没有形成被网状的较暗部分包围的分散相。
切口的形状加工较难,在进行磨削、研磨加工时,容易产生微粒和微细的开裂。因此,以烧成面为切口是非常有效的。
例如6英寸晶片中一般的取向平面的情况下,形状上不容易产生微粒和开裂,因此在这一点上,取向平面的情况与本发明的性质不同。
适宜的实施方式中,所述烧成面的表面粗糙度Ra在0.5μm以下,更优选0.4μm以下,进一步优选0.2μm以下。在这里,烧成面的Ra是通过AFM(AtomicForceMicroscope:原子间力电子显微镜)拍摄烧成面的70umx70um的视野范围,根据JISB0601算出的数值。
另外,可以通过研磨形成的切口表面的表面粗糙度Ra在0.7μm以上。
适宜的实施方式中,支撑基板的接合面3的表面粗糙度Ra优选在7nm以下,更优选2nm以下。其较大的话,由于分子间力,会降低施主基板的接合强度。其最优选1nm以下。另外,该Ra是通过AFM(AtomicForceMicroscope:原子间力电子显微镜),对接合面3的70μm×70μm的视野范围进行拍摄,根据JISB0601算出的数值。
构成支撑基板的烧结体的晶粒的平均粒径优选为10~50μm,更优选20~40μm。
在这里,晶粒的平均粒径如下测定。
(1)对多晶陶瓷烧结体的截面镜面研磨,热蚀刻使晶界变得明显后,拍摄显微镜照片(100~200倍),数出单位长度的直线横穿过的粒子数。对不同的3处进行此项操作。另外,单位长度的范围是500μm~1000μm。
(2)取进行操作的3处粒子的平均个数。
(3)通过下式算出平均粒径。
[计算式]
D=(4/π)×(L/n)
[D:平均粒径,L:直线的单位长度,n:3处的平均粒子个数]
平均粒径的计算例如图2所示。不同的3处位置中,单位长度(例如500μm)的直线横穿过的粒子个数分别为22、23、19时,通过上述计算式算出平均粒径D为:
D=(4/π)×[500/{(22+23+19)/3}]=29.9μm。
构成支撑基板的多晶陶瓷烧结体,优选是含有铝原子或二氧化硅原子的陶瓷的烧结体,特别优选为氧化铝、氮化铝、氮化硅、碳化硅。
适宜的实施方式中,构成支撑基板的多晶陶瓷烧结体,以纯度99.9%以上的陶瓷粉末为原料、通过烧结而制造。
透光性氧化铝的情况下,优选对于纯度99.9%以上(优选99.95%以上)的高纯度氧化铝粉末添加100ppm以上、300ppm以下的氧化镁粉末。作为此种高纯度氧化铝粉末,可例示有大明化学工业株式会社制造的高纯度氧化铝粉体。此外,该氧化镁粉末的纯度优选99.9%以上,平均粒径优选0.3μm以下。
多晶陶瓷烧结体的成形方法并无特别限定,可以是刮刀法、挤出法、凝胶注塑法等任意的方法。特别优选使用凝胶注塑法制造空白基板。或者也可以将陶瓷的带状成形体通过具有用于形成切口的目标形状的金属模具进行冲裁加工,制作成形体,将该成形体烧结,由此得到多晶陶瓷烧结体。此时,可以通过该带状成形体的冲裁加工而成形烧成面。
适宜的实施方式中,如图3所示,制造含有陶瓷粉末、分散介质以及凝胶剂的浆料,将该浆料注入模具,使其凝胶化,由此得到成形体。在这里,在凝胶成形阶段,在模具上涂布脱模剂,组合模具,将浆料注入模具。接着,使凝胶在模具内固化,得到成形体,将成形体脱模。接着将模具洗净。将该凝胶成形体烧结,由此得到空白基板。
在这里,本发明中,可以通过模具的内部形状,在成形体上形成切口。
接着,将凝胶成形体干燥,优选在大气中预烧,接着,在氢中正式烧结。正式烧结时的烧结温度,基于烧结体致密化的观点,优选1700~1900℃,更优选1750~1850℃。
此外,在烧结时生成充分致密的烧结体后,可以通过进一步追加实施退火处理来修正翘曲。该退火温度,基于防止变形或产生异常晶粒生长的同时促进烧结助剂排出的观点,优选在烧结时的最高温度±100℃以内,更优选最高温度在1900℃以下。此外,退火时间优选为1~6小时。
另外,退火温度优选在烧结时的最高温度+0~100℃的范围内。
通过对如此得到的空白基板进行精密研磨加工,减小其接合面3的Ra。作为此种精密研磨加工,一般是CMP(ChemicalMechanicalPolishing,化学机械抛光)加工。作为其中使用的研磨浆料,使用的是碱性或中性溶液中分散了30nm~200nm粒径的磨粒的研磨浆料。作为磨粒材质,可例示有,二氧化硅、氧化铝、金刚石、氧化锆、氧化铈,将它们单独或组合使用。此外,抛光垫可例示有,硬质聚氨酯抛光垫、无纺布抛光垫、麂皮绒抛光垫。
此外,理想的是在实施粗研磨加工后,实施最终的精密研磨加工前进行退火处理。退火处理的环境气体可例示有,大气、氢、氮、氩、真空。优选退火温度为1200~1600℃,退火时间为2~12小时。由此,可以无损表面的平滑而促进烧结助剂的排出。
(复合晶片)
复合晶片7,例如图4(c)所示,是支撑基板1A(1B)和施主基板6接合而成的产物。
首先,准备具有切口2A(2B)的规定直径及厚度的支撑基板1A(1B)(图4(a))。此外,准备具有与支撑基板相同直径、并且具有切口5的半导体基板14。接着,通过离子注入法或研磨使得半导体基板14变薄至规定厚度,由此使其成为施主基板6,将施主基板与支撑基板接合,得到复合晶片7(参照图4(c))。
通过离子注入法使半导体基板14薄板化的情况下,向半导体基板14中预先打入离子,将其与支撑基板1A(1B)接合后,机械性或热性剥离一部分半导体基板14。将半导体基板14薄板化时,如果想要减少对于半导体基板14的损伤,优选不使用离子注入法,而使用研磨。
在如此得到的复合晶片7上,之后使用一般的光刻技术绘制图案。具体的,在施主基板6的表面6a涂布光致抗蚀剂并使其干燥,通过光掩模向光致抗蚀剂照射光(掩模曝光)。接着浸渍于显影液,除去不需要的光致抗蚀剂。光致抗蚀剂为负性抗蚀剂的情况下,光致抗蚀剂中照射到光的部分残留在施主基板6上。另一方面,光致抗蚀剂为正性抗蚀剂的情况下,光致抗蚀剂中没有照射到光的部分残留在施主基板6上。然后,通过蚀刻除去施主基板6表面中没有被光致抗蚀剂覆盖的部分。
复合晶片的厚度根据JEITA或SEMI标准确定。例如,4英寸晶片的情况下,厚度可以为0.525mm,6英寸晶片的情况下,厚度可以为0.625mm,8英寸晶片的情况下,厚度可以为0.725mm。
(接合形态)
作为接合所使用的技术,并无特别限定,可以使用例如通过表面活性化直接接合的技术、或使用粘合层的基板接合技术。
直接接合适宜使用通过表面活性化进行的低温接合技术。可以在真空状态下通过O2或N2等离子体实施表面活性化后,令Si等单晶材料在常温下介由SiO2等粘合层与多晶材料接合。
作为粘合层的例子,除了通过树脂粘合以外,可使用SiO2、Al2O3、SiN。
【实施例】
(实施例1)
为了确认本发明的效果,使用透光性氧化铝陶瓷,参照图3,同时根据说明的步骤制作8英寸的支撑基板,实施评价。
首先,为了制作透光性氧化铝陶瓷制的空白基板,调制以下成分混合而成的浆料。
(原料粉末)
·比表面积3.5~4.5m2/g,平均一次粒径0.35~0.45μm的α-氧化铝粉末
100质量份
·MgO(氧化镁)0.025质量份
·ZrO2(氧化锆)0.040质量份
·Y2O3(氧化钇)0.0015质量份
(分散介质)
·戊二酸二甲酯27质量份
·乙二醇0.3质量份
(凝胶剂)
·MDI树脂4质量份
(分散剂)
·高分子表面活性剂3质量份
(催化剂)
·N,N-二甲基氨基己醇0.1质量份
在室温下将该浆料注入铝合金制的模具后,室温下放置1小时。接着40℃下放置30分钟,固化后脱模。再于室温、接着于90℃下分别放置2小时,得到板状的粉末成形体。
将得到的粉末成形体在大气中以1100℃预烧(预烧结)后,在氢3:氮1的气氛中以1750℃烧结,然后,以相同条件实施退火处理,作为空白基板。
但是,本实施例中,通过在凝胶注塑用的模具内部设置切口成形部分,由此在成形体上形成切口。切口成形部分的形态,是在烧结收缩后可以得到SEMI标准下的切口的形状。
对制作的空白基板实施高精度研磨加工。首先通过绿碳化硅进行双面研磨加工调整出形状后,通过金刚石研磨浆实施双面研磨加工。金刚石的粒径为3μm。最后通过SiO2磨粒和金刚石磨粒进行CMP加工,实施洗净。另外,洗净采用的是一般的半导体洗净工序中所使用的RCA洗净。
根据AFM的接合面3的表面粗糙度测定结果,Ra值为1.5nm(□70μm视野)。通过激光显微镜确认烧结体的平均粒径为30μm。
此外,切口的表面粗糙度Ra为0.3μm。
其结果是,洗净后,一个8英寸支撑基板上,大小在2μm以上的微粒数为5个。
(比较例1)
与实施例1同样的制造支撑基板。
切口没有在凝胶注塑成形时成形。作为替代,在CMP加工前通过磨削而形成切口。
根据AFM的接合面表面粗糙度测定结果,Ra值为1.5nm(□70μm视野)。通过激光显微镜确认烧结体的平均粒径为30μm。
此外,切口的表面粗糙度Ra为0.8μm。
其结果是,洗净后,一个8英寸支撑基板上,大小在2μm以上的微粒数约为200个。
Claims (8)
1.一种支撑基板,是半导体用复合晶片的支撑基板,
所述支撑基板由多晶陶瓷烧结体形成,在所述支撑基板的外周边缘部有切口,所述切口由烧结面形成。
2.根据权利要求1所述的支撑基板,其中,所述烧成面的表面粗糙度Ra在0.5μm以下。
3.根据权利要求1或2所述的支撑基板,其中,所述烧成面通过凝胶注塑成形而成形。
4.根据权利要求1或2所述的支撑基板,其中,所述多晶陶瓷烧结体通过带状成形体的烧结而制作,所述带状成形体是使用目标形状的金属模具进行冲裁加工而成的,所述烧成面通过所述带状成形体的所述冲裁加工而成形。
5.根据权利要求1~4任意一项所述的支撑基板,其中,所述多晶陶瓷烧结体为透光性氧化铝。
6.根据权利要求1~5任意一项所述的支撑基板,其中,依据的是SEMI标准。
7.一种半导体用复合晶片,具有权利要求1~6任意一项所述的支撑基板、以及与所述支撑基板的接合面接合的施主基板。
8.根据权利要求7所述的复合晶片,其中,所述施主基板由单晶硅构成。
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CN109075770A (zh) * | 2016-05-30 | 2018-12-21 | 京瓷株式会社 | 复合基板以及使用其的弹性波元件 |
CN113385987A (zh) * | 2020-03-13 | 2021-09-14 | 鸿创应用科技有限公司 | 氮化铝晶圆片的制造方法及其氮化铝晶圆片 |
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CN105074870B (zh) * | 2013-12-25 | 2016-12-07 | 日本碍子株式会社 | 操作基板、半导体用复合基板、半导体电路基板及其制造方法 |
TWD174921S (zh) | 2014-12-17 | 2016-04-11 | 日本碍子股份有限公司 | 複合基板之部分 |
USD809804S1 (en) * | 2014-12-17 | 2018-02-13 | Ngk Insulators, Ltd. | Composite substrate for acoustic wave device |
JP6465785B2 (ja) | 2015-10-14 | 2019-02-06 | クアーズテック株式会社 | 化合物半導体基板 |
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