CN104966715B - Gallium nitride base low-leakage current clamped beam field-effect transistor phase inverter and preparation method - Google Patents

Gallium nitride base low-leakage current clamped beam field-effect transistor phase inverter and preparation method Download PDF

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CN104966715B
CN104966715B CN201510378327.7A CN201510378327A CN104966715B CN 104966715 B CN104966715 B CN 104966715B CN 201510378327 A CN201510378327 A CN 201510378327A CN 104966715 B CN104966715 B CN 104966715B
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clamped beam
mesfet
type
photoresist
grid
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CN104966715A (en
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廖小平
王凯悦
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Southeast University
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Southeast University
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Abstract

The present invention is a kind of gallium nitride base low-leakage current clamped beam field-effect transistor phase inverter and preparation method, and the GaN base low-leakage current clamped beam MESFET phase inverters are made up of clamped beam N-type MESFET and clamped beam p-type MESFET.The MESFET's of the phase inverter is produced on semi-insulating GaN substrate, and fixed beam structure is devised above its grid.Clamped beam envisaged underneath battery lead plate.The actuation voltage of clamped beam is designed as the absolute value of the threshold voltage equal to type MESFET.When the voltage between clamped beam and battery lead plate is less than the absolute value of threshold voltage, clamped beam is suspended in the top of grid, it is now breaking at grid, MESFET is also not turned on, and the voltage only between clamped beam and battery lead plate is when reaching or surpassing the absolute value of threshold voltage, clamped beam can just pulled down to and be attached on grid, grid and clamped beam short circuit, so that MESFET is turned on.The present invention increases the impedance of grid at work, reduces grid leakage current, significantly reduces power consumption.

Description

Gallium nitride base low-leakage current clamped beam field-effect transistor phase inverter and preparation method
Technical field
The present invention proposes GaN base low-leakage current clamped beam MESFET phase inverters, belongs to the technology of microelectromechanical systems Field.
Background technology
With the development of microelectronics and microwave communication techniques, the requirement to RF IC performance both at home and abroad is increasingly Height, people it is also proposed higher requirement to the speed and power consumption of device.Metal-semiconductor field effect transistor (MESFET) has There is the advantages that electron mobility is high, carrier drift speed is fast, and energy gap is big, capability of resistance to radiation is strong, operating temperature range is wide, And it is widely used in the fields such as fiber optic communication, mobile communication, very-high speed computer, high-speed measuring instrument device, Aero-Space.And with The continuous diminution of device feature size, especially after deep submicron process is entered, the scale of chip constantly increases, inside collection Into transistor size sharply increase, clock frequency more and more higher.Numerous metal-semiconductor field effect transistors (MESFET) exist Very high operation at frequencies, the power problemses of chip are caused to become to become increasingly conspicuous.High power consumption can make chip overheating, can not only reduce Chip performance can also shorten its service life.Too high power consumption can also make various Mobile portable formula equipment have to face power supply and continue The problems such as boat and radiating.Therefore, the too high power consumption of integrated circuit proposes higher want to the heat dispersion and stability of equipment Ask, the endurance of various Mobile portable formula equipment is also by increasing challenge.Therefore, low power dissipation design is ultra-large It is more and more important in integrated circuit design process.
The power consumption of common MESFET devices mainly includes two aspects, on the one hand refers to that AC signal produces during MESFET work Raw dynamic power consumption;And on the other hand it is loss caused by leakage current.And mainly having two kinds for leakage current, one kind is grid electricity The grid leakage current that pressure zone comes, leakage current when ending when another between source and drain.And the research for MESFET devices at present Focus mostly in the reduction to MESFET dynamic power consumptions.The research of reduction to leakage current is seldom.The present invention is based on GaN techniques Devise a kind of GaN base low-leakage current clamped beam MESFET phase inverters with extremely low grid leakage current.
The content of the invention
Technical problem:It is an object of the invention to provide a kind of gallium nitride base low-leakage current clamped beam field-effect transistor paraphase Device and preparation method, the phase inverter is when MESFET phase inverters work, it is often desirable that it is for 0 in the electric current of grid.Tradition MESFET grid and active area are Schottky contacts, so inevitably having certain DC leakage current.Collecting on a large scale Into in circuit, the presence of this leakage current can increase power consumption of the phase inverter in work.And this leakage current is in the present invention Effectively reduced.
Technical scheme:The gallium nitride base low-leakage current clamped beam field-effect transistor phase inverter of the present invention is by clamped beam N-type MESFET and clamped beam p-type MESFET is formed, and the MESFET in the phase inverter is produced on semi-insulating GaN substrate, and its input is drawn Line is made using gold, and clamped beam N-type MESFET source ground, clamped beam p-type MESFET source electrode connects power supply, clamped beam N-type MESFET drain electrode and clamped beam p-type MESFET drain electrode short circuit, clamped beam N-type MESFET and clamped beam p-type MESFET grid Pole forms Schottky contacts with active layer, and clamped beam, two MESFET clamped beam short circuit, clamped beam are devised above grid Liang Gemao areas are produced on semi-insulating GaN substrate, two battery lead plates in each clamped beam envisaged underneath, are covered above battery lead plate It is stamped silicon nitride layer, each MESFET battery lead plate and the source shorted of the MESFET.
Clamped beam N-type MESFET threshold voltage designs are on the occasion of clamped beam p-type MESFET threshold voltage designs are negative Value, and the absolute value of clamped beam N-type MESFET and clamped beam p-type MESFET threshold voltage be designed as it is equal, under clamped beam Pull-up voltage is designed as the absolute value of the threshold voltage equal to MESFET, and when input high level, clamped beam N-type MESFET's is clamped Voltage between beam and battery lead plate is more than the absolute value of threshold voltage, so clamped beam is pulled down on grid, clamped beam and grid Short circuit, while the voltage between grid and clamped beam N-type MESFET source electrode is also greater than threshold voltage, so clamped beam N-type MESFET is turned on, and the voltage between clamped beam p-type MESFET clamped beam and battery lead plate is less than the absolute value of threshold voltage, so Clamped beam is to suspend, and grid is in breaking, and the voltage between grid and clamped beam p-type MESFET source electrode is close to 0, so clamped Beam p-type MESFET ends, and so as to export low level, and when input low level, situation is just the opposite, clamped beam N-type MESFET Clamped beam suspend, the clamped beam in cut-off, and clamped beam p-type MESFET is pulled down, is on, so as to which phase inverter exports High level, so when the voltage between clamped beam and battery lead plate is less than the absolute value of threshold voltage, clamped beam is suspended in grid Top, be now breaking at grid, MESFET is not turned on, and the voltage only between clamped beam and battery lead plate reaches or greatly Clamped beam, which can just pull down to, when the absolute value of threshold voltage is attached on grid, clamped beam and grid short circuit, so that MESFET Conducting, compared to traditional type MESFET, the clamped beam of the MESFET in the present invention has one when suspending between grid and clamped beam Layer of air layer, it is breaking at grid, so DC leakage current also greatly reduces, significantly reduces power consumption.
The preparation method of the GaN base low-leakage current clamped beam MESFET phase inverters of the present invention is as follows:
1) semi-insulating GaN substrate is prepared;
2) deposit silicon nitride, one layer of silicon nitride is grown with plasma-enhanced chemical vapour deposition technique (PECVD), Then photoetching and etch silicon nitride, the silicon nitride of clamped beam p-type MESFET active areas is removed;
3) clamped beam p-type MESFET active area ion implantings:After injecting boron, anneal in a nitrogen environment;After the completion of annealing, P is carried out at high temperature+Dopant redistribution, form the p-type active layer of clamped beam p-type MESFET active areas;
4) silicon nitride layer is removed:Silicon nitride is all removed using dry etching technology;
5) deposit silicon nitride, one layer of silicon nitride is grown with plasma-enhanced chemical vapour deposition technique (PECVD), Then photoetching and etch silicon nitride, the silicon nitride of clamped beam N-type MESFET active areas is removed;
6) clamped beam N-type MESFET active area ion implantings:After injecting phosphorus, anneal in a nitrogen environment;After the completion of annealing, N is carried out at high temperature+Dopant redistribution, form the N-type active layer of clamped beam N-type MESFET active areas;
7) silicon nitride layer is removed:Silicon nitride is all removed using dry etching technology;
8) photoetching grid region, the photoresist in grid region is removed;
9) electron beam evaporation titanium/platinum/gold;
10) titanium/platinum/gold on photoresist and photoresist is removed;
11) heat, titanium/platinum/billon is formed Schottky contacts with p-type GaN active layers and N-type GaN active layers;
12) photoresist is coated, photoetching simultaneously etches clamped beam N-type MESFET source electrodes and the photoresist of drain region;
13) heavily doped N-type impurity is injected, in the N-type heavy doping that clamped beam N-type MESFET source electrodes and drain region are formed Area, short annealing processing is carried out after injection;
14) photoresist is coated, photoetching simultaneously etches clamped beam p-type MESFET source electrodes and the photoresist of drain region;
15) heavily doped P-type impurity is injected, in the p-type heavy doping that clamped beam p-type MESFET source electrodes and drain region are formed Area, short annealing processing is carried out after injection;
16) photoetching source electrode and drain electrode, lead, source electrode and the photoresist of drain electrode are removed;
17) it is evaporated in vacuo gold germanium ni au;
18) the gold germanium ni au on photoresist and photoresist is removed;
19) alloying forms Ohmic contact, forms lead, source electrode and drain electrode;
20) photoresist is coated, removes the photoresist of the anchor zone position of input lead, battery lead plate and clamped beam;
21) first layer gold is evaporated, its thickness is about 0.3 μm;
22) gold on photoresist and photoresist is removed, preliminarily forms the anchor area of input lead, battery lead plate and clamped beam;
23) deposit silicon nitride:Grown with plasma-enhanced chemical vapour deposition technique (PECVD)Thick Silicon nitride medium layer;
24) photoetching and etch nitride silicon dielectric layer, the silicon nitride being retained on battery lead plate;
25) deposit and photoetching polyimide sacrificial layer:The polyimides sacrifice of 1.6 μ m-thicks is coated in gallium arsenide substrate Layer, it is desirable to fill up pit;Photoetching polyimide sacrificial layer, only retain the sacrifice layer below clamped beam;
26) titanium/gold/titanium is evaporated, its thickness is 500/1500/Evaporate the down payment for plating;
27) photoetching:The photoresist in place will be electroplated by removing;
28) plating gold, its thickness are 2 μm;
29) photoresist is removed:The photoresist in place need not be electroplated by removing;
30) titanium/gold/titanium is anti-carved, corrodes down payment, forms clamped beam;
31) polyimide sacrificial layer is discharged:Developer solution soaks, and removes the polyimide sacrificial layer under clamped beam, deionization Water soaks slightly, absolute ethyl alcohol dehydration, volatilizees, dries under normal temperature.
In the present invention, the battery lead plate below each MESFET clamped beam and the source shorted of the MESFET.Clamped beam N It on the occasion of, clamped beam p-type MESFET threshold voltage designs is negative value that type MESFET threshold voltage designs, which are, and clamped beam N-type The absolute value of MESFET and clamped beam p-type MESFET threshold voltage is designed as equal.The actuation voltage of clamped beam be designed as with The absolute value of MESFET threshold voltage is equal.When input high level, between clamped beam N-type MESFET clamped beam and battery lead plate Voltage be more than the absolute value of threshold voltage, so clamped beam is pulled down on grid, clamped beam and grid short circuit, while grid Voltage between source electrode is also greater than threshold voltage, so clamped beam N-type MESFET is turned on.And clamped beam p-type MESFET's is clamped Voltage between beam and battery lead plate is less than the absolute value of threshold voltage, so clamped beam is to suspend, grid is in open circuit, while grid Voltage between pole and source electrode is close to 0, so clamped beam p-type MESFET ends, so as to phase inverter output low level.It is and low when inputting During level, situation is just the opposite, and clamped beam N-type MESFET clamped beam suspends, in cut-off, and clamped beam p-type MESFET Clamped beam is pulled down, and is on.So as to phase inverter output high level.So during MESFET in the present invention works, solid When voltage between strutbeam and battery lead plate is less than the absolute value of threshold voltage, clamped beam is suspended in above grid, and grid is disconnected Road, MESFET is also not turned on.When voltage only between clamped beam and battery lead plate reaches or surpasses the absolute value of threshold voltage, Clamped beam can just be pulled down to and is attached on grid, clamped beam and grid short circuit, so that MESFET is turned on.Compared to traditional The clamped beam of MESFET in the MESFET present invention is all to suspend when not pulling down, and has a layer of air between clamped beam and grid Layer, it is breaking at grid, so DC leakage current greatly reduces in work.
Beneficial effect:Input voltage is not total at work for the GaN base low-leakage current clamped beam MESFET phase inverters of the present invention Be to be carried on grid, when clamped beam suspends, there is a layer of air layer between clamped beam and grid, be at grid it is breaking, effectively Reduction grid leakage current.So that the power consumption of the GaN base low-leakage current clamped beam MESFET phase inverters in the present invention obtains Effectively reduce, performance is also improved.
Brief description of the drawings
Fig. 1 is the schematic diagram of GaN base low-leakage current clamped beam MESFET phase inverters of the present invention,
Fig. 2 is the top view of GaN base low-leakage current clamped beam MESFET phase inverters of the present invention,
Fig. 3 be Fig. 2 GaN base low-leakage current clamped beam MESFET phase inverters P-P ' to profile,
Fig. 4 be Fig. 2 GaN base low-leakage current clamped beam MESFET phase inverters A-A ' to profile,
Fig. 5 be Fig. 2 GaN base low-leakage current clamped beam MESFET phase inverters B-B ' to profile,
Figure includes:Clamped beam N-type MESFET1, clamped beam p-type MESFET2, semi-insulating GaN substrate 3, input lead 4, Grid 5, clamped beam 6, anchor area 7, battery lead plate 8, silicon nitride layer 9, p-type active layer 10, N-type active layer 11, clamped beam N-type MESFET Source electrode 12, clamped beam p-type MESFET source electrode 13, lead 14, clamped beam N-type MESFET drain electrode 15, clamped beam p-type MESFET drain electrode 16.
Embodiment
The present invention is made up of clamped beam N-type MESFET1 and clamped beam p-type MESFET2, and the transistor of the phase inverter is based on Semi-insulating GaN substrate 3 is made, and its input lead 4 is made using gold.Clamped beam N-type MESFET1 source electrode 12 is grounded, clamped Beam p-type MESFET2 source electrode 13 connects power supply.Clamped beam N-type MESFET1 drain electrode 15 and clamped beam p-type MESFET2 drain electrode 16 Short circuit.The grid 5 of MESFET in the present invention forms Schottky contacts with active layer, and clamped beam 6 is devised above grid 5. Two MESFET clamped beams are short circuits.The Liang Gemao areas 7 of clamped beam 6 are produced on semi-insulating GaN substrate 3.In each clamped beam 6 Two battery lead plates 8 of envisaged underneath, the top of battery lead plate is covered with silicon nitride layer 9.Each MESFET battery lead plate 8 is with being somebody's turn to do MESFET source shorted.
In the present invention, clamped beam N-type MESFET1 threshold voltage designs are on the occasion of clamped beam p-type MESFET2 threshold Threshold voltage is designed as negative value, and the absolute value of clamped beam N-type MESFET1 and clamped beam p-type MESFET2 threshold voltage is designed as It is equal, and the actuation voltage of clamped beam 6 be designed as it is equal with the absolute value of type MESFET threshold voltage.In the present invention MESFET input signal is loaded directly on grid 5, but is carried on clamped beam 6.It is clamped when input high level Voltage between beam N-type MESFET1 clamped beam 6 and battery lead plate 8 is more than the absolute value of threshold voltage, so clamped beam 6 is pulled down Onto grid 5, clamped beam 6 and the short circuit of grid 5, while the voltage between grid 5 and clamped beam N-type MESFET1 source electrode 12 is also big In threshold voltage, so clamped beam N-type MESFET1 is turned on.And between clamped beam p-type MESFET2 clamped beam 6 and battery lead plate 8 Voltage is less than the absolute value of threshold voltage, so clamped beam 6 is to suspend, grid 5 is in open circuit, grid 5 and clamped beam p-type Voltage between MESFET2 source electrode 13 is close to 0, so clamped beam p-type MESFET2 ends, so as to export low level.And when input During low level, situation is just the opposite, and clamped beam N-type MESFET1 clamped beam 6 suspends, in cut-off, and clamped beam p-type MESFET2 clamped beam 6 is pulled down, and is on.So as to phase inverter output high level.MESFET in the present invention is worked Cheng Zhong, when the voltage between clamped beam 6 and battery lead plate 8 is less than the absolute value of threshold voltage, clamped beam 6 is suspended in grid 5 Top, it is breaking at grid 5, MESFET is also not turned on.Voltage only between clamped beam 6 and battery lead plate 8 reaches or surpasses During the absolute value of threshold voltage, clamped beam 6 can be just pulled down on the grid 5 being attached to below, clamped beam 6 and the short circuit of grid 5, from And turn on MESFET.Compared to traditional MESFET, the clamped beam 6 of the MESFET in the present invention when suspending, clamped beam 6 with There is a layer of air between grid 5, be to disconnect at grid, so DC leakage current also greatly reduces.
The preparation method of GaN base low-leakage current clamped beam MESFET phase inverters includes following steps:
1) semi-insulating GaN substrate 3 is prepared;
2) deposit silicon nitride, one layer of silicon nitride is grown with plasma-enhanced chemical vapour deposition technique (PECVD), Then photoetching and etch silicon nitride, the silicon nitride of clamped beam p-type MESFET2 active areas is removed;
3) clamped beam p-type MESFET2 active area ion implantings:After injecting boron, anneal in a nitrogen environment;Annealing is completed Afterwards, P is carried out at high temperature+Dopant redistribution, form the p-type active layer 10 of clamped beam p-type MESFET2 active areas;
4) silicon nitride is removed:Silicon nitride is all removed using dry etching technology;
5) deposit silicon nitride, one layer of silicon nitride is grown with plasma-enhanced chemical vapour deposition technique (PECVD), Then photoetching and etch silicon nitride, the silicon nitride of clamped beam N-type MESFET1 active areas is removed;
6) clamped beam N-type MESFET1 active area ion implantings:After injecting phosphorus, anneal in a nitrogen environment;Annealing is completed Afterwards, N is carried out at high temperature+Dopant redistribution, form the N-type active layer 11 of clamped beam N-type MESFET1 active areas;
7) silicon nitride is removed:Silicon nitride is all removed using dry etching technology;
8) photoetching grid region, the photoresist in grid region is removed;
9) electron beam evaporation titanium/platinum/gold;
10) titanium/platinum/gold on photoresist and photoresist is removed;
11) heat, titanium/platinum/billon is formed schottky junctions with p-type GaN active layers 10 and N-type GaN active layers 11 Touch;
12) photoresist is coated, photoetching simultaneously etches clamped beam N-type MESFET1 source electrodes and the photoresist of drain region;
13) heavily doped N-type impurity is injected, in the N-type heavy doping that clamped beam N-type MESFET1 source electrodes and drain region are formed Area, short annealing processing is carried out after injection;
14) photoresist is coated, photoetching simultaneously etches clamped beam p-type MESFET2 source electrodes and the photoresist of drain region;
15) heavily doped P-type impurity is injected, in the p-type heavy doping that clamped beam p-type MESFET2 source electrodes and drain region are formed Area, short annealing processing is carried out after injection;
16) photoetching source electrode and drain electrode, lead, source electrode and the photoresist of drain electrode are removed;
17) it is evaporated in vacuo gold germanium ni au;
18) the gold germanium ni au on photoresist and photoresist is removed;
19) alloying forms Ohmic contact, forms lead 14, source electrode and drain electrode;
20) photoresist is coated, removes the photoresist of the position of anchor area 7 of input lead 4, battery lead plate 8 and clamped beam;
21) first layer gold is evaporated, its thickness is about 0.3 μm;
22) gold on photoresist and photoresist is removed, preliminarily forms the anchor area of input lead 4, battery lead plate 8 and clamped beam 7;
23) deposit silicon nitride:Grown with plasma-enhanced chemical vapour deposition technique (PECVD)Thick Silicon nitride medium layer;
24) photoetching and etch nitride silicon dielectric layer, the silicon nitride layer 9 being retained on battery lead plate;
25) deposit and photoetching polyimide sacrificial layer:The polyimides sacrifice of 1.6 μ m-thicks is coated in gallium arsenide substrate Layer, it is desirable to fill up pit;Photoetching polyimide sacrificial layer, only retain the sacrifice layer of the lower section of clamped beam 6;
26) titanium/gold/titanium is evaporated, its thickness is 500/1500/Evaporate the down payment for plating;
27) photoetching:The photoresist in place will be electroplated by removing;
28) plating gold, its thickness are 2 μm;
29) photoresist is removed:The photoresist in place need not be electroplated by removing;
30) titanium/gold/titanium is anti-carved, corrodes down payment, forms clamped beam 6;
31) polyimide sacrificial layer is discharged:Developer solution soaks, and removes the polyimide sacrificial layer under clamped beam, deionization Water soaks slightly, absolute ethyl alcohol dehydration, volatilizees, dries under normal temperature.
Difference with the prior art of the present invention is:
The present invention can effectively reduce the grid leakage currents of MESFET at work, reduce power consumption, improve performance.This hair Phase inverter in bright is made up of clamped beam N-type MESFET and clamped beam p-type MESFET.Clamped beam MESFET and traditional MESFET Maximum difference is, fixed beam structure is designed with above clamped beam MESFET grid, and clamped beam envisaged underneath has battery lead plate, Each MESFET battery lead plate and the source shorted of the MESFET.Clamped beam MESFET input signal is loaded directly into grid On extremely, but it is carried on clamped beam.The actuation voltage of clamped beam is designed as the absolute value of the threshold voltage equal to MESFET. When the absolute value of threshold voltage of the voltage between clamped beam and battery lead plate less than MESFET, clamped beam has with grid below Certain gap, is now, at grid breaking, MESFET is also not turned on.Only when the voltage between clamped beam and battery lead plate During the absolute value of the threshold voltage equal to or more than MESFET, clamped beam can be just pulled down on the grid being attached to below, Gu Strutbeam and grid short circuit, now MESFET conductings.So the clamped beam of the MESFET in the present invention is all outstanding when not being pulled down Floating, clamped beam has certain gap with grid below, is to disconnect at grid, so DC leakage current also subtracts significantly It is small, so that power consumption is effectively lowered.
Meet that the structure of conditions above is considered as the GaN base low-leakage current clamped beam MESFET phase inverters of the present invention.

Claims (2)

  1. A kind of 1. gallium nitride base low-leakage current clamped beam field-effect transistor phase inverter, it is characterized in that the phase inverter is by clamped beam N Type MESFET(1)With clamped beam p-type MESFET(2)Form, the MESFET in the phase inverter is produced on semi-insulating GaN substrate(3) On, its input lead(4)Made using gold, clamped beam N-type MESFET(1)Source electrode (12) ground connection, clamped beam p-type MESFET Source electrode (13) meet power supply, clamped beam N-type MESFET(1)Drain electrode (15) and clamped beam p-type MESFET(2)Drain electrode (16) it is short Connect, clamped beam N-type MESFET(1)With clamped beam p-type MESFET(2)Grid(5)Schottky contacts are formed with active layer, in grid Pole(5)Top devises clamped beam(6), two MESFET clamped beam(6)Short circuit, clamped beam(6)Liang Gemao areas(7)It is produced on Semi-insulating GaN substrate(3)On, in each clamped beam(6)Two battery lead plates of envisaged underneath(8), battery lead plate(8)Top covering There is silicon nitride layer(9), each MESFET battery lead plate(8)With the source shorted of the MESFET.
  2. A kind of 2. preparation side of gallium nitride base low-leakage current clamped beam field-effect transistor phase inverter as claimed in claim 1 Method, it is characterised in that the preparation method of the phase inverter is as follows:
    1)Semi-insulating gallium nitride substrate is prepared;
    2)Deposit silicon nitride, with plasma-enhanced chemical vapour deposition technique(PECVD)Growth one
    Layer silicon nitride, then photoetching and etch silicon nitride, remove the silicon nitrides of clamped beam p-type MESFET active areas;
    3)Clamped beam p-type MESFET active area ion implantings:After injecting boron, anneal in a nitrogen environment;After the completion of annealing, P is carried out under high temperature+Dopant redistribution, form the p-type active layer of clamped beam p-type MESFET active areas;
    4)Silicon nitride layer is removed:Silicon nitride is all removed using dry etching technology;
    5)Deposit silicon nitride, one layer of silicon nitride is grown with plasma-enhanced chemical vapour deposition technique PECVD, then Photoetching and etch silicon nitride, remove the silicon nitride of clamped beam N-type MESFET active areas;
    6)Clamped beam N-type MESFET active area ion implantings:After injecting phosphorus, anneal in a nitrogen environment;After the completion of annealing, N is carried out under high temperature+Dopant redistribution, form the N-type active layer of clamped beam N-type MESFET active areas;
    7)Silicon nitride layer is removed:Silicon nitride is all removed using dry etching technology;
    8)Photoetching grid region, the photoresist in grid region is removed;
    9)Electron beam evaporation titanium-platinum-gold;
    10)Titanium-platinum-gold on photoresist and photoresist is removed;
    11)Heat, titanium-platinum-gold is formed Schottky contacts with p-type GaN active layers and N-type GaN active layers;
    12)Photoresist is coated, photoetching simultaneously etches clamped beam N-type MESFET source electrodes and the photoresist of drain region;
    13)Heavily doped N-type impurity is injected, N-type heavily doped region, injection are formed in clamped beam N-type MESFET source electrodes and drain region Short annealing processing is carried out afterwards;
    14)Photoresist is coated, photoetching simultaneously etches clamped beam p-type MESFET source electrodes and the photoresist of drain region;
    15)Heavily doped P-type impurity is injected, p-type heavily doped region, injection are formed in clamped beam p-type MESFET source electrodes and drain region Short annealing processing is carried out afterwards;
    16)Photoetching source electrode and drain electrode, lead, source electrode and the photoresist of drain electrode are removed;
    17)It is evaporated in vacuo gold-germanium-ni-au;
    18)Gold-germanium-ni-au on photoresist and photoresist is removed;
    19)Alloying forms Ohmic contact, forms lead, source electrode and drain electrode;
    20)Photoresist is coated, removes the photoresist of the anchor zone position of input lead, battery lead plate and clamped beam;
    21)First layer gold is evaporated, its thickness is about 0.3 μm;
    22)The gold on photoresist and photoresist is removed, preliminarily forms the anchor area of input lead, battery lead plate and clamped beam;
    23)Deposit silicon nitride:With 1000 thick silicon nitride of plasma-enhanced chemical vapour deposition technique PECVD growths Dielectric layer;
    24)Photoetching and etch nitride silicon dielectric layer, the silicon nitride being retained on battery lead plate;
    25)Deposit and photoetching polyimide sacrificial layer:The polyimide sacrificial layer of 1.6 μ m-thicks is coated on gallium nitride substrate, Ask and fill up pit;Photoetching polyimide sacrificial layer, only retain the sacrifice layer below clamped beam;
    26)Titanium-gold-titanium is evaporated, its thickness is respectively 500-1500-300:Evaporate the down payment for plating;
    27)Photoetching:The photoresist in place will be electroplated by removing;
    28)Plating gold, its thickness are 2μm;
    29)Photoresist is removed:The photoresist in place need not be electroplated by removing;
    30)Titanium-gold-titanium is anti-carved, corrodes down payment, forms clamped beam;
    31)Polyimide sacrificial layer is discharged:Developer solution soaks, and removes the polyimide sacrificial layer under clamped beam, deionized water is slightly Slightly soak, absolute ethyl alcohol dehydration, volatilize, dry under normal temperature.
CN201510378327.7A 2015-07-01 2015-07-01 Gallium nitride base low-leakage current clamped beam field-effect transistor phase inverter and preparation method Expired - Fee Related CN104966715B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6787438B1 (en) * 2001-10-16 2004-09-07 Teravieta Technologies, Inc. Device having one or more contact structures interposed between a pair of electrodes
CN102543572A (en) * 2010-12-31 2012-07-04 上海丽恒光微电子科技有限公司 Micro electro mechanical system (MEMS) switch apparatus, logic gate and integrated circuit

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7495952B2 (en) * 2005-07-13 2009-02-24 Cornell Research Foundation, Inc. Relay-connected semiconductor transistors
DE112011102203B4 (en) * 2010-06-29 2021-09-30 International Business Machines Corporation Electromechanical switch unit and method for actuating the same
US8635765B2 (en) * 2011-06-15 2014-01-28 International Business Machines Corporation Method of forming micro-electrical-mechanical structure (MEMS)

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6787438B1 (en) * 2001-10-16 2004-09-07 Teravieta Technologies, Inc. Device having one or more contact structures interposed between a pair of electrodes
CN102543572A (en) * 2010-12-31 2012-07-04 上海丽恒光微电子科技有限公司 Micro electro mechanical system (MEMS) switch apparatus, logic gate and integrated circuit

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