CN1048819C - 在半导体器件中制作阻挡扩散金属层的方法 - Google Patents

在半导体器件中制作阻挡扩散金属层的方法 Download PDF

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CN1048819C
CN1048819C CN96108935A CN96108935A CN1048819C CN 1048819 C CN1048819 C CN 1048819C CN 96108935 A CN96108935 A CN 96108935A CN 96108935 A CN96108935 A CN 96108935A CN 1048819 C CN1048819 C CN 1048819C
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barrier metal
diffusion barrier
metal layer
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崔璟根
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SK Hynix Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855—After-treatment introducing at least one additional element into the layer
    • H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28568—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising transition metals
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855—After-treatment introducing at least one additional element into the layer

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Abstract

一种制作半导体器件的阻挡扩散金属层的方法，该方法可避免所述半导体器件的金属导线材料扩散进入所述金属导线下的硅层，其步骤包括：为防止在所述硅层和阻挡扩散金属层间的界面形成硅化物，将所述硅层表面暴露于氧等离子体中；在所述硅层上形成第一阻挡扩散金属层；将氧离子注入所述第一阻挡扩散金属层；再在所述第一阻挡扩散金属层上形成第二阻挡扩散金属层。

Description

在半导体器件中制作阻挡扩散金属层的方法
本发明涉及一种在半导体器件中制作阻挡扩散金属层(diffu-sion barrier metal layer)的方法。此方法能够在半导体器件的金属导线形成过程中防止金属导线物质扩散进入其层下，更具体地说，涉及一种能用在深和狭窄接触区的制作阻挡扩散金属层的方法。
在256MDRAM以上的高度集成半导体器件中，通常使用氧化钌(RuO)层作为阻挡扩散金属层，并且作为铝、钨或铜形成的金属导线的粘合层。在现有技术中，氧化钌层是用物理气相沉积(PVD)或化学气相沉积(CVD)的方法形成的。若使用PVD方法，钌和氧化合形形成氧化钌层。若使用CVD方法，钌源气体和氧通过金属有机化学气相沉积(MOCVD)方法化合形成氧化钌层。
然而，在使用CVD方法形成氧化钌层的地方，杂质会引入氧化钌层，这会增大该层的电阻值。若使用PVD方法，氧化钌层的台阶覆盖性不良，可能通过氧化钌层和硅的反应形成硅化物层。此外，在氧化钌层的沉积过程中，氧化率太低以至不能形成稳定的氧化钌层。
本发明的目的在于提供一种在半导体器件中制作阻挡扩散金属层的方法，以便能够防止在阻挡扩散金属层和硅层的界面形成硅化物层，而在高温下形成稳定的金属氧化物层。
为完成本发明的目的，提供了一种在半导体器件中制作阻挡扩散金属层的方法，以防止在所述半导体器件中的金属导线材料扩散进入所述金属导线下的硅层，该方法包括的步骤为：将所述的硅层表面暴露于氧等离子区域，以防止在所述硅层和阻挡金属扩散层之间的界面上形成硅化物；在所述硅层上形成第一个阻挡扩散金属层；将氧离子注入所述第一阻挡扩散金属层；以及在所述第一阻挡扩散金属层上形成第二阻挡扩散金属层。
本发明的其它目的和方案将通过参照附图对实施例的描述变得更加明显。附图中：
图1A到图1F为根据本发明的一个实施例形成阻挡扩散金属层的过程的剖视图。
参照附图描述本发明的最佳实施例如下，图1A到图1F是作为阻挡扩散金属层的氧化钌层的形成过程的剖视图。
如图1A所示，绝缘层3在硅衬底1和场氧化层2上形成，导电层4在场氧化层2上形成。然后，绝缘层5在衬底1的整个表面上形成，绝缘层3和5有选择地被除去以形成接触孔，由此在硅衬底1和导电层4上暴露出预定部分。
如图1B所示，衬底1的整个表面被暴露于O2等离子体6中，这里，O2等离子体6附着于在其上形成导电层4和绝缘层5的衬底1的整个表面，O2等离子体在低于50W的低功率下和在等离子体增强化学气相沉积(PECVD)室中5sccm到50sccm的气流下形成。如上所述，借助于O2等离子体处理，有可能在下述热处理期间防止在钌和硅的界面上形成硅化物，并且在高温下形成稳定的氧化钌层。
如图1C所示，在形成导电层4和绝缘层5的衬底1的整个表面上，在PVD溅射室中形成100到500厚度的第一钌层7。然后，将O2注入第一钌层7的整个表面。这里，实现O2的注入，要根据钌层7的厚度考虑投射范围Rp，例如，如果第一钌层的厚度为200，O2应以1015～1019个离子/cm2的剂量和以50keV的能级被注入。
如图1D所示，第二钌层9在与第一钌层7同样的条件下形成。然后，将形成第一和第二钌层7和9的衬底1放入把氩和氧，或氮和氧在其中混合的管中热处理一到五小时。依此项处理如图1E所示，最终的氧化钌层10被形成。这里，引入管中的氩/氧或氮/氧气流大约为100sccm/10sccm到2000sccm/300sccm，管中温度约为400℃到700℃。如上所述，O2被注入到第一和第二钌层之间并在管中实现热处理，由此稳定的氧化钌层能够被形成。图1F示出一个器件的剖视图，在这个器件中使用氧化钌层10作为扩散阻挡层而形成金属导线11，金属导线11由铝、钨或铜形成。
根据如上所述的本发明，有可能在钌层和硅层间的界面避免形成硅化物。这样可以获得稳定的氧化钌层。应用这种稳定的氧化钌层作为扩散阻挡层，能够防止金属导线的物质扩散并形成低电阻的金属塞。
尽管本发明的最佳实施例为说明的目的已经公开，本领域的技术人员将认识到，不偏离后附权利要求中所公开的发明范围和精神的各种修改、补充和替换都是可行的。

Claims (11)

1、一种在半导体器件中制作阻挡扩散金属层的方法，该方法可防止在所述半导体器件中的金属导线材料扩散进入所述金属导线下的硅层，其特征在于所述方法包括如下步骤：
将所述硅层表面暴露于氧等离子体中，以防止在所述的硅层和阻挡扩散金属层之间的界面上形成硅化物；
在所述硅层上形成第一阻挡扩散金属层；
在所述的第一阻挡扩散金属层中注入氧离子；并且
在所述第一阻挡扩散金属层上形成第二阻挡扩散金属层。
2、根据权利要求1所述的方法，其特征在于所述第一和第二阻挡扩散金属层为钌层。
3、根据权利要求1所述的方法，其特征在于所述O2等离子体是在低于50W的低功率和在PECVD室中5sccm到50sccm的气流下形成的。
4、根据权利要求2所述的方法，其特征在于所述的氧离子的密度为1015～1019个离子/cm2的剂量。
5、根据权利要求2所述的方法，其特征在于所述的第一阻挡扩散金属层的形成厚度为100埃到500埃。
6、根据权利要求1所述的方法，其特征在于形成所述第二阻挡扩散金属层的步骤进一步包括所述第一和第二阻挡扩散金属层的氧化步骤。
7、根据权利要求6所述的方法，其特征在于所述氧化步骤为在一个管中进行热处理一至五小时，管中氩和氧被混合。
8、根据权利要求7所述的方法，其特征在于所述管中的氩/氧的气流量为100sccm/10sccm到2000sccm/300sccm。
9、根据权利要求6所述的方法，其特征在于，所述氧化步骤为在一个管中进行热处理一至五小时，管中氮和氧被混合。
10、根据权利要求9所述的方法，其特征在于，所述管中的氮/氧的气流量为100sccm/10sccm到2000sccm/300sccm。
11、根据权利要求8或10所述的方法，其特征在于，所述管中的温度为400℃到700℃。
CN96108935A 1995-05-17 1996-05-17 在半导体器件中制作阻挡扩散金属层的方法 Expired - Fee Related CN1048819C (zh)

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US5637533A (en) 1997-06-10
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GB2300970B (en) 1999-10-13
KR0172772B1 (ko) 1999-03-30
CN1147145A (zh) 1997-04-09
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TW301020B (zh) 1997-03-21
GB9610393D0 (en) 1996-07-24

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