CN104865764B - Wiring structure and array substrate - Google Patents
Wiring structure and array substrate Download PDFInfo
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- CN104865764B CN104865764B CN201510334200.5A CN201510334200A CN104865764B CN 104865764 B CN104865764 B CN 104865764B CN 201510334200 A CN201510334200 A CN 201510334200A CN 104865764 B CN104865764 B CN 104865764B
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- metal wire
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
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- Microelectronics & Electronic Packaging (AREA)
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Abstract
The invention discloses a kind of Wiring structure and array substrates, belong to display technology field, solve the technical issues of prior art is difficult to effectively prevent static discharge.The Wiring structure includes a plurality of first metal wire and a plurality of second metal wire；Insulating layer is provided between a plurality of first metal wire and a plurality of second metal wire, and the projection of a plurality of first metal wire and a plurality of second metal wire intersects.The present invention can be used for the display devices such as LCD TV, liquid crystal display, mobile phone, tablet computer.
Description
Technical field
The present invention relates to display technology fields, specifically, are related to a kind of Wiring structure and array substrate.
Background technology
With the development of display technology, liquid crystal display has become most commonly seen display device.
Array substrate is the important component in liquid crystal display.In the manufacturing process of array substrate, it usually needs successively
Gate metal layer, active layer, source-drain electrode metal layer, the conductor structures such as transparent electrode layer are formed, also need to form multilayer therebetween exhausted
Edge layer.In the manufacturing process of array substrate, each conductor structure can continuous stored charge, when charge accumulated to a certain extent
When, static discharge (Electro-Static Discharge, abbreviation ESD) will occur.As shown in Figure 1, gate metal layer and
Metal routing 10 in source-drain electrode metal layer is due to larger cone angle, being particularly susceptible generation static discharge, this will puncture
Insulating layer between gate metal layer and source-drain electrode metal layer causes to occur between gate metal layer and source-drain electrode metal layer short
Road.
Electrostatic protection circuit is both provided in current array substrate, to prevent the generation of static discharge, but transparent
Before electrode layer is formed, electrostatic protection circuit is formed completely not yet, so the effect for preventing static discharge can not be played.It is and quiet
Before discharge of electricity commonly takes place in transparent electrode layer formation, therefore the prior art is difficult to effectively prevent the generation of static discharge.
Invention content
The purpose of the present invention is to provide a kind of Wiring structure and array substrates, are difficult to effectively prevent to solve the prior art
The technical issues of static discharge.
The present invention provides a kind of Wiring structure, including a plurality of first metal wire and a plurality of second metal wire；
Insulating layer, and described a plurality of first are provided between a plurality of first metal wire and a plurality of second metal wire
The projection of metal wire and a plurality of second metal wire intersects.
Further, a plurality of first metal wire is parallel to each other, a plurality of second metal wire is parallel to each other.
Preferably, the spacing between the first adjacent metal wire is within 4 to 7 microns, the second adjacent metal wire it
Between spacing within 4 to 7 microns.
Preferably, the width of the first metal wire and the second metal wire is within 10 to 50 microns.
Preferably, the length of the first metal wire and the second metal wire is at 10 millimeters or more.
Preferably, the material of the first metal wire and the second metal wire is copper.
The present invention also provides a kind of array substrate, above-mentioned Wiring structure is provided in the array substrate.
Further, the Wiring structure is set to the edges of boards region of the array substrate.
Preferably, the first metal wire is located at gate metal layer, and the second metal wire is located at source-drain electrode metal layer.
Further, a plurality of first metal wire and a plurality of second metal wire are connected with public electrode wire.
Present invention offers following advantageous effects：In Wiring structure provided by the invention, including cross one another a plurality of
One metal wire and a plurality of second metal wire increase the density of metal routing in regional area.Due to metal routing density very
Greatly, it can make the first metal wire and the second metal wire therein that there is the cone angle than other region biggers, therefore the region also more holds
Static discharge easily occurs.In the manufacturing process of array substrate, the region where the Wiring structure can be easier than other regions
Static discharge occurs, so as to play a protective role to other regions.Also, Wiring structure provided by the invention independent of
Transparent electrode, therefore protective effect can be just played before transparent electrode layer formation, so as to effectively prevent static discharge
Generation.
Other features and advantages of the present invention will be illustrated in the following description, also, partial becomes from specification
It obtains it is clear that being understood by implementing the present invention.The purpose of the present invention and other advantages can be by specification, rights
Specifically noted structure is realized and is obtained in claim and attached drawing.
Description of the drawings
It is required in being described below to embodiment for the clearer technical solution illustrated in the embodiment of the present invention
Attached drawing does simple introduction：
Fig. 1 is the schematic diagram of the cone angle of metal routing；
Fig. 2 is the schematic diagram of Wiring structure provided in an embodiment of the present invention；
Fig. 3 is the schematic diagram of array substrate provided in an embodiment of the present invention.
Specific embodiment
Carry out the embodiment that the present invention will be described in detail below with reference to accompanying drawings and embodiments, how the present invention is applied whereby
Technological means solves technical problem, and the realization process for reaching technique effect can fully understand and implement according to this.It needs to illustrate
As long as not forming conflict, each embodiment in the present invention and each feature in each embodiment can be combined with each other,
The technical solution formed is within protection scope of the present invention.
The embodiment of the present invention provides a kind of Wiring structure, can be applied in the array substrate of liquid crystal display.Such as Fig. 2 institutes
Show, which includes a plurality of first metal wire 201 and a plurality of second metal wire 202.A plurality of first metal wire 201 and a plurality of
Second metal wire 202 is located at different metal figure layers, is set between a plurality of first metal wire 201 and a plurality of second metal wire 202
There is insulating layer, and the projection of a plurality of first metal wire 201 and a plurality of second metal wire 202 intersects.
In Wiring structure provided in an embodiment of the present invention, including cross one another a plurality of first metal wire 201 and a plurality of
Two metal wires 202 increase the density of metal routing in regional area.Since the density of metal routing is very big, can make therein
First metal wire 201 and the second metal wire 202 have a cone angle than other region biggers, thus the region be also easier to occur it is quiet
Discharge of electricity.In the manufacturing process of array substrate, the region where the Wiring structure can be easier that electrostatic occurs than other regions
Electric discharge, so as to play a protective role to other regions.Also, Wiring structure provided in an embodiment of the present invention is independent of saturating
Prescribed electrode, therefore protective effect can be just played before transparent electrode layer formation, so as to effectively prevent static discharge
Occur.
Embodiment one：
The present embodiment provides a kind of array substrates, are provided with Wiring structure as shown in Figure 2.As shown in figure 3, conduct
One preferred embodiment is provided with multigroup Wiring structure 301, and these Wiring structures 301 are respectively provided with and battle array in the array substrate
The edges of boards region 310 of row substrate, so as to which the aperture opening ratio of display area 320 will not be influenced because of these Wiring structures 301.
As shown in Fig. 2, a plurality of first metal wire 201 is parallel to each other, a plurality of second metal wire 202 is also parallel to each other, and
First metal wire 201 and the second metal wire 202 are orthogonal.
In the present embodiment, spacing d1 between the first adjacent metal wire 201 is less than the line width D1 of its own, and adjacent the
Spacing d2 between two metal wires 202 makes the density of metal routing in regional area significantly increase again smaller than the line width D2 of its own
Greatly, so as to make the first metal wire 201 and the second metal wire 202 that there is the cone angle of bigger.Between the first adjacent metal wire 201
Spacing d2 between spacing d1 and the second adjacent metal wire 202 is preferably within 4 to 7 microns, the width of the first metal wire 201
The width D 2 of D1 and the second metal wire 202 is preferably within 10 to 50 microns.
The length L2 of the length L1 of first metal wire 201 and the second metal wire 202 preferably at 10 millimeters or more, makes cabling
Structure 301 has relatively large size, to improve the ability of its stored charge.
In the present embodiment, the first metal wire 201 is located at gate metal layer, i.e. the first metal wire 201 and display area 320
Scan line (not shown), public electrode wire (not shown) are located at same figure layer.In the manufacturing process of array substrate,
First metal wire 201, scan line, public electrode wire can be with forming in a patterning processes, without for the first metal
Line 201 individually carries out a patterning processes.
On the other hand, the second metal wire 202 is located at source-drain electrode metal layer, i.e. the second metal wire 202 and display area 320
Data line (not shown) is located at same figure layer.In the manufacturing process of array substrate, the second metal wire 202 and data line can
To be formed in a patterning processes, without individually carrying out a patterning processes for the second metal wire 202.
As a preferred embodiment, the material of the first metal wire 201 and the second metal wire 202 is copper, i.e. gate metal
The material of layer and source-drain electrode metal layer is copper.Copper is a kind of very low conductor material of resistivity, makees metal routing using copper,
The impedance of metal routing can effectively be reduced.Especially in large scale liquid crystal display, metal routing has very big in itself
Length, using copper can meet it is low-impedance under the premise of, make metal routing still have lesser width, so as to improve liquid crystal
The aperture opening ratio of display.
In addition, there is larger cone angle using the metal routing that copper is formed, it is easier to static discharge occur.Due to edges of boards area
The density of metal routing is larger in the Wiring structure 301 in domain 310, thus the first metal wire 201 and the second metal wire 202 have than
The cone angle of the metal routing bigger in other regions is also easier to that static discharge occurs.
In the manufacturing process of array substrate, the region where Wiring structure 301 can be easier to occur quiet than other regions
Discharge of electricity, so as to play a protective role to other regions.Also, the Wiring structure 301 is independent of transparent electrode, therefore
Protective effect can be just played before transparent electrode layer formation, so as to effectively prevent the generation of static discharge.
In addition, after static discharge occurs for Wiring structure 301, it is exhausted between the first metal wire 201 and the second metal wire 202
Edge layer is breakdown, makes 202 short circuit of the first metal wire 201 and the second metal wire, is then conducive to gate metal layer and source-drain electrode metal
The whole current potential of layer is identical, generation electrostatic between gate metal layer and source-drain electrode metal layer is avoided to put so as to more efficient
Electricity.
In the present embodiment, the first metal wire 201 and the second metal wire 202 are connected with public electrode wire.Public electrode wire
Gate metal layer is predominantly located at, also some is located at source-drain electrode metal layer.Therefore, the first metal wire 201 can with positioned at grid
The public electrode wire of pole metal layer is connected directly, and the second metal wire 202 can be with the public electrode wire positioned at source-drain electrode metal layer
It is connected directly.
Public electrode wire positioned at gate metal layer and the public electrode wire positioned at source-drain electrode metal layer were manufactured subsequently
It natively needs to link together in journey.Wiring structure 301 in the present embodiment is after occurring static discharge, the first metal wire
201 can also link together with the second metal wire 202, so the first metal wire 201 and the second metal wire 202 can be collectively as
A part for public electrode wire does not need to carry out any processing to Wiring structure 301 again.
Embodiment two：
The present embodiment and embodiment one are essentially identical, and difference is：In the present embodiment, positioned at the of gate metal layer
One metal wire is connected with scan line, and the second metal wire positioned at source-drain electrode metal layer is connected with data line.In this way in array substrate
Manufacturing process in, the first metal wire and the second metal wire can preferably play a protective role to scan line and data line.
As shown in Figures 2 and 3, specifically, after static discharge occurs for Wiring structure 301, the first metal wire 201 and the
Insulating layer between two metal wires 202 is breakdown, makes 202 short circuit of the first metal wire 201 and the second metal wire, is shown to avoid panel
Show and static discharge occurs between scan line and data line in region 320.
Due in above process, between the first metal wire 201 and the second metal wire 202 due to insulating layer is breakdown
Short circuit, array substrate manufacture after the completion of, before array substrate is tested, it is also necessary to using laser to it is therein walk knot
Structure 301 is cut, and being electrically connected for each Wiring structure 301 and other regions is disconnected, to avoid between scan line and data line
Short circuit is occurred by Wiring structure 301.
While it is disclosed that embodiment as above, but the content only to facilitate understand the present invention and adopt
Embodiment is not limited to the present invention.Any those skilled in the art to which this invention pertains are not departing from this
Under the premise of the disclosed spirit and scope of invention, any modification and change can be made in the implementing form and in details,
But the scope of patent protection of the present invention, still should be subject to the scope of the claims as defined in the appended claims.
Claims (8)
1. a kind of Wiring structure, applied in the array substrate of liquid crystal display, which is characterized in that the Wiring structure is located at institute
The edges of boards region of array substrate is stated, the Wiring structure includes a plurality of first metal wire and a plurality of second metal wire；
First metal wire is located at the gate metal layer of the array substrate, and second metal wire is located at the array substrate
Source-drain electrode metal layer；
Insulating layer, and a plurality of first metal are provided between a plurality of first metal wire and a plurality of second metal wire
The projection of line and a plurality of second metal wire intersects；The line for being smaller than its own between the first adjacent metal wire
It is wide；
Wherein, the insulating layer at the Wiring structure is by electrostatic breakdown so that first metal wire and second metal
Line short circuit, to protect the circuit in viewing area.
2. Wiring structure according to claim 1, which is characterized in that a plurality of first metal wire is parallel to each other, described
A plurality of second metal wire is parallel to each other.
3. Wiring structure according to claim 2, which is characterized in that the spacing between the first adjacent metal wire is 4 to 7
Within micron, the spacing between the second adjacent metal wire is within 4 to 7 microns.
4. Wiring structure according to claim 1, which is characterized in that the width of the first metal wire and the second metal wire exists
Within 10 to 50 microns.
5. Wiring structure according to claim 1, which is characterized in that the length of the first metal wire and the second metal wire exists
10 millimeters or more.
6. Wiring structure according to claim 1, which is characterized in that the material of the first metal wire and the second metal wire is
Copper.
7. a kind of array substrate, setting is just like claim 1 to 6 any one of them Wiring structure in the array substrate.
8. array substrate according to claim 7, which is characterized in that a plurality of first metal wire and described a plurality of second
Metal wire is connected with public electrode wire.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510334200.5A CN104865764B (en) | 2015-06-16 | 2015-06-16 | Wiring structure and array substrate |
| PCT/CN2015/083423 WO2016201741A1 (en) | 2015-06-16 | 2015-07-07 | Wiring structure and array substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510334200.5A CN104865764B (en) | 2015-06-16 | 2015-06-16 | Wiring structure and array substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104865764A CN104865764A (en) | 2015-08-26 |
| CN104865764B true CN104865764B (en) | 2018-06-19 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510334200.5A Active CN104865764B (en) | 2015-06-16 | 2015-06-16 | Wiring structure and array substrate |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN104865764B (en) |
| WO (1) | WO2016201741A1 (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20180079550A (en) * | 2016-12-30 | 2018-07-11 | 엘지디스플레이 주식회사 | Display panel |
| CN107844010A (en) * | 2017-11-21 | 2018-03-27 | 武汉华星光电半导体显示技术有限公司 | Array base palte and display device |
| CN107910338B (en) * | 2017-12-06 | 2020-05-19 | 深圳市华星光电技术有限公司 | Array substrate and display device |
| KR102652718B1 (en) * | 2019-03-29 | 2024-04-01 | 삼성전자주식회사 | Display module and driving method of the display module |
| CN111323984B (en) * | 2020-03-25 | 2023-04-11 | 京东方科技集团股份有限公司 | Array substrate, display panel and display device |
| CN114792697A (en) * | 2022-04-11 | 2022-07-26 | 武汉华星光电技术有限公司 | Display back plate and display device |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20080020331A (en) * | 2006-08-31 | 2008-03-05 | 삼성전자주식회사 | Thin film transistor substrate |
| CN101825821A (en) * | 2008-12-26 | 2010-09-08 | 乐金显示有限公司 | Mother substrate for liquid crystal display device and method of fabricating the same |
| CN102289115A (en) * | 2010-06-21 | 2011-12-21 | 北京京东方光电科技有限公司 | Method for manufacturing master board and TFT (Thin Film Transistor) array substrate |
| CN103034008A (en) * | 2012-12-17 | 2013-04-10 | 京东方科技集团股份有限公司 | Antistatic structure of liquid crystal panel and manufacturing method thereof, and repairing method of connecting line |
-
2015
- 2015-06-16 CN CN201510334200.5A patent/CN104865764B/en active Active
- 2015-07-07 WO PCT/CN2015/083423 patent/WO2016201741A1/en active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20080020331A (en) * | 2006-08-31 | 2008-03-05 | 삼성전자주식회사 | Thin film transistor substrate |
| CN101825821A (en) * | 2008-12-26 | 2010-09-08 | 乐金显示有限公司 | Mother substrate for liquid crystal display device and method of fabricating the same |
| CN102289115A (en) * | 2010-06-21 | 2011-12-21 | 北京京东方光电科技有限公司 | Method for manufacturing master board and TFT (Thin Film Transistor) array substrate |
| CN103034008A (en) * | 2012-12-17 | 2013-04-10 | 京东方科技集团股份有限公司 | Antistatic structure of liquid crystal panel and manufacturing method thereof, and repairing method of connecting line |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2016201741A1 (en) | 2016-12-22 |
| CN104865764A (en) | 2015-08-26 |
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