CN104822032B - A kind of signal acquisition and automatic exposure circuit and its method based on linear CCD - Google Patents
A kind of signal acquisition and automatic exposure circuit and its method based on linear CCD Download PDFInfo
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- CN104822032B CN104822032B CN201510187707.2A CN201510187707A CN104822032B CN 104822032 B CN104822032 B CN 104822032B CN 201510187707 A CN201510187707 A CN 201510187707A CN 104822032 B CN104822032 B CN 104822032B
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- ccd
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Abstract
The present invention discloses a kind of signal acquisition based on linear CCD and automatic exposure circuit and its method, belongs to field of photoelectric technology.The circuit includes microprocessor, the ccd signal collection being connected by microprocessor SPI interface, I/O interfaces with microprocessor and converter unit, linear CCD is connected with microprocessor SPI interface and ccd signal collection with converter unit respectively by its interface, wherein, trigger module compared with the ccd signal collection includes with converter unit, and trigger module connected the CCD output voltages amplification module and dynamic threshold generation module compared with.Signal acquisition of the present invention and automatic exposure circuit and its method, it is not necessary to A/D change, can in certain range of light intensity can adjust automatically CCD time for exposure, strong adaptability.
Description
Technical field
The present invention relates to a kind of signal acquisition based on linear CCD and automatic exposure circuit and its method, belong to photoelectricity skill
Art field.
Background technology
TSL1401CL is a linear CCD, and its core is the photosensitive array of 128 photodiodes compositions, behind array
There is row's integrating capacitor, photodiode produces photoelectric current under luminous energy stroke, forms active integrating circuit, then integration electricity
Hold is exactly to be used for storing the electric charge after luminous energy conversion.The electric charge of integrating capacitor storage is more, illustrates that is photosensitive corresponding to front
The light intensity of diode collection is bigger.Be reflected on pixel is exactly that pixel grey scale is low.Light intensity becomes close to saturation, pixel gray level
Be bordering on it is complete white, then it is bigger in white level, output voltage values.Preceding 18 clock cycle are the pixel-reset time, without integration with
Exposure, the 19th CLK to next SI is the time for exposure, therefore in the operating process of linear CCD, SI signals are equivalent to one
Individual mark, after it is changed into high level, it is possible to the sampling of data, hits are carried out after the arrival of each CLK signal high level
According to time for exposure be to be determined by preceding 19th CLK times occurred to this SI high level.Light is stronger, integration
The electric charge speed of electric capacity storage is faster, and the cycle being exposed should be shorter, and light is weaker, the electric charge speed of integrating capacitor storage
Slower, the cycle being exposed should be longer.
Current linear CCD time for exposure adjustment and collecting method, mainly have following two:
1st, microprocessor changes the analog voltage data for directly gathering CCD outputs by A/D, is converted to digital information, micro-
Processor adjusts the time interval between SI twice, this method is mainly analyzed using microprocessor software by data analysis
Data, CPU programs are complicated, and acquisition speed is slower, and adaptive capacity to environment is poor;
2nd, using hardware circuit binaryzation monochrome pixels point voltage, but CCD 128 pixel threshold reference voltages are phases
With, cause CCD both sides corresponding pixel points to be judged by accident.
In view of this, the present inventor is studied this, specially develops a kind of signal acquisition based on linear CCD and oneself
Thus dynamic exposure circuit and its method, this case produce.
The content of the invention
It is an object of the invention to provide a kind of signal acquisition based on linear CCD and automatic exposure circuit and its method, no
Need A/D to change, can in certain range of light intensity can adjust automatically CCD time for exposure, strong adaptability.
To achieve these goals, solution of the invention is:
A kind of signal acquisition and automatic exposure circuit based on linear CCD, including microprocessor, pass through microprocessor SPI
The collection of ccd signal that interface, I/O interfaces are connected with microprocessor and converter unit, linear CCD by its interface respectively with micro- place
Reason device SPI interface and ccd signal collection are connected with converter unit, wherein, compared with the ccd signal collection includes with converter unit
Trigger module, and trigger module connected the CCD output voltages amplification module and dynamic threshold generation module compared with.
Preferably, the CCD output voltages amplification module includes amplifier, the slide rheostat being connected with amplifier,
The input in the same direction of the amplifier is connected by a resistance with the voltage output end of linear CCD, the output end of amplifier with than
First comparator, the second comparator compared with trigger module are connected, and are put by the big minor adjustment of resistance for changing the first slide rheostat
The multiplication factor of big device.
Preferably, the dynamic threshold generation module includes counter, pass through the p-type MOS being connected with door with counter
Pipe, N-type metal-oxide-semiconductor, and the follower being connected with p-type metal-oxide-semiconductor, N-type metal-oxide-semiconductor, wherein, p-type metal-oxide-semiconductor and the 3rd slide rheostat
It is connected, N-type metal-oxide-semiconductor is connected with the 4th slide rheostat, and the output end of follower is first connected a resistance, then one in parallel is charged
It is connected after electric capacity with first comparator input.
Preferably, the relatively trigger module includes being connected in parallel on the first comparator of amplifier out, second compared
Device, and the trigger being connected with the second comparator output terminal, the input in the same direction of second comparator and second slide change
Resistance device is connected, and the output end of first comparator and trigger is connected with the SPI interface of microprocessor.
Preferably, the trigger uses model 74HC74 trigger.
A kind of signal acquisition and automatic explosion method based on linear CCD, comprise the following steps:
1)The SPI interface of microprocessor is operated under holotype first, it is 400KHZ to set working frequency CLK, simultaneously
Work clock using CLK as linear CCD, sets the timer of microprocessor, makes timing(That is the time for exposure)Initial value
5 milliseconds are set to, as the initial value of linear CCD exposure, every 5 milliseconds of generations Interruption, it is continuously defeated by MOSI mouths to enable SPI
Go out 16 byte datas(1 0x80, remaining 15 0x00, SI high level start linear CCD), form the SI that linear CCD needs
Signal, while MOSI signals and CLK signal that microprocessor is sent open as enabling signal SI, the CLK of linear CCD
Linear CCD work;
2)Linear CCD is transported to amplifier under conditions of CLK and SI, by output voltage by a resistance, passes through first
Slide rheostat adjusts the multiple of amplifier, and the output voltage values of amplifier are observed by oscillograph, makes intermediary image vegetarian refreshments white
Level point value records middle and both sides pixel white point and stain average voltage close to 4V;
3)The resistance of the 3rd slide rheostat and the 4th slide rheostat is adjusted, that is, adjusts the output of two slide rheostats
Voltage, and then by combining the conducting and/or cut-off of field-effect management and control p-type metal-oxide-semiconductor, N-type metal-oxide-semiconductor, charging capacitor discharge and recharge
Export dynamic threshold reference voltage VREF;
4)The second slide rheostat is adjusted, pressure-dividing output voltage value VMAX, makes VMAX=4V;
5)The output voltage values of linear CCD are amplified into two comparators by amplifier, and mould is produced with dynamic threshold
The magnitude of voltage VREF of block output compares, and output represents the value MISO of pixel black and white in front of linear CCD, when MISO=1, illustrates this
Pixel is white, otherwise to be black, after MOSI first high level output, and the MISO inputs of continuous 128 CLK clocks
Exactly represent the value of 128 monochrome pixels points in front of CCD;The set end of the value connection trigger of the output compared with VMAX, MOSI
The reset terminal of control trigger, in first high level signal of MOSI signal outputs, trigger reset output signal OVER is
Low level, once as long as the magnitude of voltage that amplifier exports between 1-128 CLK is once more than VMAX, make trigger set,
Output signal OVER can be always maintained at high level, until the high level of next MOSI signals arrives;
6)Whenever timer produces interruption, microprocessor will judge whether exposure is excessive according to the value of OVER signals, exposure
Time(The about time interval between SI signals twice)As timing, if OVER=1, the time for exposure is long, changes
Timing parameters, shorten timing, reduce the time for exposure;Otherwise it is assumed that the time for exposure is inadequate, timing is lengthened, so repeatedly
Adjustment, ensure that the output voltage of the linear CCD maximum after amplification is maintained at 4V or so.
Signal acquisition and automatic exposure circuit and its method of the present invention based on linear CCD are in certain range of light intensity
It is interior can adjust automatically CCD time for exposure, when both can guarantee that light intensity, white pixel point output voltage is unsaturated, and and can ensures light
When weak, pixel output voltage is less low, can guarantee that substantially under different light, and output voltage corresponding to monochrome pixels point is protected
Hold in certain dynamic range, and monochrome pixels point, dynamic threshold ginseng can be differentiated using dynamic threshold reference voltage
The characteristics of examining voltage be:The threshold reference voltage of 128 pixels shows arc shaped in front of corresponding CCD, middle high, both sides
It is low, to want to coincide the characteristics of this feature and linear CCD itself, under same environment, the phototube circuit output voltage on both sides is low,
Dynamic threshold reference voltage can avoid the erroneous judgement of both sides pixel well, in addition, the exposure method is adaptable, and
And changed without using A/D, it is not necessary to which special Timing driver generation circuit, SPI are operated under holotype, are simultaneously emitted by starting letter
Number and receive Pixel Information, both provided enabling signal CLK, the SI of linear CCD needs, while also acquire in front of CCD 128
The information of pixel, cpu resource is saved, software programming is simpler, can either also can be in physical culture in laboratory fluorescent lamp environment
Normal exposure under the strong illumination of shop.
The present invention is described in further detail below in conjunction with drawings and the specific embodiments.
Brief description of the drawings
Fig. 1 is the signal acquisition and automatic exposure circuit theory diagram based on linear CCD of the present embodiment;
Fig. 2 is the ccd signal collection and converter unit theory diagram of the present embodiment;
Fig. 3 is the CCD output voltages amplification module of the present embodiment and compares trigger module circuit diagram;
Fig. 4 is the dynamic threshold generation module circuit diagram of the present embodiment.
Embodiment
As shown in Figure 1-2, a kind of signal acquisition and automatic exposure circuit based on linear CCD, including microprocessor 1, lead to
Cross microprocessor SPI interface, ccd signal collection and converter unit 2, the linear CCD 3 that I/O interfaces are connected with microprocessor 1 pass through
Its interface is connected with microprocessor SPI interface and ccd signal collection with converter unit 2 respectively, wherein, the ccd signal collection
Trigger module 22 compared with including with converter unit 2, and the connected CCD output voltages amplification module 21 of trigger module 22 compared with
With dynamic threshold generation module 23.
As shown in Figure 3-4, the CCD output voltages amplification module 21 includes amplifier U2, the cunning being connected with amplifier U2
Dynamic rheostat RV1, the amplifier U2 input in the same direction pass through a resistance R1 and the voltage output end (AO ends) of linear CCD 3
It is connected, the amplifier U2 output end first comparator U6 of trigger module 22, the second comparator phase U7 company with compared with, passes through change
The first slide rheostat RV1 big minor adjustment amplifier U2 of resistance multiplication factor.The dynamic threshold generation module 23 includes
Counter U1, by p-type metal-oxide-semiconductor Q2, the N-type metal-oxide-semiconductor Q1 being connected with door U5 with counter U1, and with p-type metal-oxide-semiconductor Q2, N-type
Follower U3 connected metal-oxide-semiconductor Q1, wherein, p-type metal-oxide-semiconductor Q2 is connected with the 3rd slide rheostat RV3, N-type metal-oxide-semiconductor Q1 and the 4th
Slide rheostat RV4 is connected, and follower U3 output end is first connected after a resistance R9, then one charging capacitor C1 of parallel connection with
One comparator U6 inputs are connected.The relatively trigger module 22 includes being connected in parallel on the first comparator of amplifier U2 output ends
U6, the second comparator U7, and the trigger U4 being connected with the second comparator U7 output ends, the second comparator U7's is in the same direction
Input is connected with the second slide rheostat RV2, first comparator U6 and trigger U4 output end with microprocessor 1
SPI interface is connected.In the present embodiment, trigger U4 uses model 74HC74 trigger.
Signal acquisition and automatic explosion method based on linear CCD, comprise the following steps:
1) SPI interface of microprocessor 1 is operated under holotype first, it is 400KHZ to set working frequency CLK, simultaneously
Work clocks of the CLK as linear CCD 3, the timer of microprocessor 1 is set, makes timing(That is the time for exposure)Initial value
5 milliseconds are set to, the initial value exposed as linear CCD 3, every 5 milliseconds of generations Interruption, it is continuous by MOSI mouths to enable SPI
(i.e. 128, the 1st is high level 1 to 16 byte datas of output, and other 127 SI needed 0), to form linear CCD 3 believe
Number(The high level of one CLK clock), while MOSI signals that microprocessor 1 is sent and CLK signal are as linear
CCD3 enabling signal SI, CLK, start linear CCD 3 and start working;
2) operating voltage of linear CCD 3 is 5V,(In different time for exposure and different light intensity, by linear CCD circuit
The amplifier of inside modules insertion or outside amplification, each pixel output voltage range can be between 0-5V.)Linear CCD 3 exists
Under conditions of CLK and SI, amplifier U2 multiple is adjusted by the first slide rheostat RV1, amplifier is observed by oscillograph
U2 output voltage values CCD-AO, make intermediary image vegetarian refreshments white point level value close to 4V, at the same record middle and both sides pixel white point and
Stain average voltage Vw、Vb;
3) the 3rd slide rheostat RV3 and the 4th slide rheostat RV4 resistance is adjusted, that is, adjusts two slip variable resistances
The output voltage of device, magnitude of voltage V is produced respectivelyw,Vb。In dynamic threshold generation module, with Vw,VbFor discharge and recharge reference voltage,
In preceding 96 cycles of 128 clk cycles, low level, the Q2 conductings of combination FET p-type metal-oxide-semiconductor, N-type MOS are exported with door U5
Pipe Q1 ends, and charging capacitor C1 chargings export threshold reference voltage VREF, the magnitude of voltage VREF from VbBegin to ramp up close to simultaneously
Keep Vw;In rear 32 cycles of 128 clk cycles, high level, p-type metal-oxide-semiconductor Q2 cut-offs, N-type metal-oxide-semiconductor Q1 are exported with door U5
Conducting, charging capacitor C1 electric discharges, output reference voltage VREF is from VwBegin to decline close to VB,;SPI terminates after 128 clocks,
CLK stops, and is exported with door U5 and keeps high level, and output reference voltage VREF keeps VB,When ensureing that next SI starts CCD, reference
Voltage VREF is from VbStart(Because the defects of linear CCD, is:Output voltage corresponding to intermediary image vegetarian refreshments is high, the electricity of both sides output
Force down, so circuit guarantee both sides are low as the threshold reference voltage both sides of black and white vegetarian refreshments binaryzation, it is middle high;Again due to electric discharge
It hurry up, so the charging interval is longer than discharge time.)
4)The second slide rheostat RV2 is adjusted, pressure-dividing output voltage value VMAX, makes VMAX=4V;
5)The output voltage AO values of linear CCD 3 are CCD-AO after amplifier U2 amplifications, and CCD-AO enters two ratios
Compared with device, the value MISO for representing pixel black and white in front of linear CCD is exported compared with VREF, when MISO=1, illustrates that this pixel is
In vain, otherwise to be black, after MOSI first high level output, the MISO inputs of continuous 128 CLK clocks are exactly to represent
The value of 128 monochrome pixels points in front of CCD;The value connection trigger U4 of the output compared with VMAX set end, MOSI controls are touched
Device U4 reset terminal is sent out, trigger U4 reset output signals OVER is low electricity in first high level signal of MOSI signal outputs
It is flat, once as long as once CCD-AO signal values are more than VMAX between 1-128 CLK, make trigger U4 set, output signal
OVER can be always maintained at high level, until the high level of next MOSI signals arrives;
6)Whenever timer produces interruption, microprocessor 1 will judge whether exposure is excessive according to the value of OVER signals, exposure
Time(The about time interval between SI signals twice)As timing, if OVER=1, the time for exposure is long, changes
Timing parameters, shorten timing, reduce the time for exposure;Otherwise it is assumed that the time for exposure is inadequate, timing is lengthened, so repeatedly
Adjustment, ensure that the output voltage of the linear CCD maximum after amplification is maintained at 4V or so.
Above-described embodiment and schema and non-limiting product form of the invention and style, any art it is common
The appropriate change or modification that technical staff is done to it, it all should be regarded as not departing from the patent category of the present invention.
Claims (4)
1. a kind of signal acquisition and automatic exposure circuit based on linear CCD, it is characterised in that:Including microprocessor, by micro-
The ccd signal collection and converter unit, linear CCD that processor SPI interface, I/O interfaces are connected with microprocessor pass through its interface
It is connected respectively with microprocessor SPI interface and ccd signal collection with converter unit, wherein, the ccd signal collection and conversion are single
Member includes comparing trigger module, and the connected CCD output voltages amplification module of trigger module and dynamic threshold produce compared with
Module;The CCD output voltages amplification module includes amplifier, the slide rheostat being connected with amplifier, the amplifier
Input in the same direction is connected by a resistance with the voltage output end of linear CCD, the output end of the amplifier trigger module compared with
First comparator, the second comparator are connected, the times magnification of the big minor adjustment amplifier of resistance by changing the first slide rheostat
Number;The dynamic threshold generation module includes counter, by p-type metal-oxide-semiconductor, the N-type metal-oxide-semiconductor being connected with door with counter, with
And the follower being connected with p-type metal-oxide-semiconductor, N-type metal-oxide-semiconductor, wherein, p-type metal-oxide-semiconductor is connected with the 3rd slide rheostat, N-type metal-oxide-semiconductor
It is connected with the 4th slide rheostat, the output end of follower is first connected after a resistance, then a charging capacitor in parallel with first
Comparator input terminal is connected.
2. a kind of signal acquisition and automatic exposure circuit based on linear CCD as claimed in claim 1, it is characterised in that:Institute
State and compare trigger module and include being connected in parallel on first comparator, the second comparator of amplifier out, and with the second comparator
The connected trigger of output end, the input in the same direction of second comparator are connected with the second slide rheostat, first comparator
It is connected with the output end of trigger with the SPI interface of microprocessor.
3. a kind of signal acquisition and automatic exposure circuit based on linear CCD as claimed in claim 2, it is characterised in that:Institute
State the trigger that trigger uses model 74HC74.
4. the signal acquisition of as claimed in claim 1 a kind of signal acquisition and automatic exposure circuit based on linear CCD and from
Dynamic exposure method, it is characterised in that comprise the following steps:
1)The SPI interface of microprocessor is operated under holotype first, it is 400KHZ to set working frequency CLK, while by CLK
As the work clock of linear CCD, the timer of microprocessor is set, timing initial value is set to 5 milliseconds, as linear
The initial value of CCD exposures, every 5 milliseconds of generations Interruption, enables SPI and continuously exports 16 byte datas, shape by MOSI mouths
The SI signals that linear CCD needs, while MOSI signals that microprocessor is sent and CLK signal are as linear CCD
Enabling signal SI and CLK, start linear CCD work;
2)Linear CCD is transported to amplifier under conditions of CLK and SI, by output voltage by a resistance, is slided by first
Rheostat adjusts the multiple of amplifier, and the output voltage values of amplifier are observed by oscillograph, makes intermediary image vegetarian refreshments white point electric
Level values record middle and both sides pixel white point and stain average voltage close to 4V;
3)The resistance of the 3rd slide rheostat and the 4th slide rheostat is adjusted, that is, adjusts the output electricity of two slide rheostats
Pressure, and then by combining the conducting and/or cut-off of field-effect management and control p-type metal-oxide-semiconductor, N-type metal-oxide-semiconductor, charging capacitor discharge and recharge is defeated
Go out dynamic threshold reference voltage VREF;
4)The second slide rheostat is adjusted, pressure-dividing output voltage value VMAX, makes VMAX=4V;
5)The output voltage values of linear CCD are amplified into two comparators by amplifier, defeated with dynamic threshold generation module
The magnitude of voltage VREF gone out compares, and output represents the value MISO of pixel black and white in front of linear CCD, when MISO=1, illustrates this pixel
Point is white, and otherwise to be black, after MOSI first high level output, the MISO inputs of continuous 128 CLK clocks are exactly
Represent the value of 128 monochrome pixels points in front of CCD;The set end of the value connection trigger of the output compared with VMAX, MOSI controls
The reset terminal of trigger, in first high level signal of MOSI signal outputs, trigger reset output signal OVER is low electricity
It is flat, once as long as the magnitude of voltage that amplifier exports between 1-128 CLK is once more than VMAX, make trigger set, export
Signal OVER can be always maintained at high level, until the high level of next MOSI signals arrives;
6)Whenever timer produces interruption, microprocessor will judge to expose whether excessive, the time for exposure according to the value of OVER signals
As timing, if OVER=1, the time for exposure is long, changes timing parameters, shortens timing, when reducing exposure
Between;Otherwise it is assumed that the time for exposure is inadequate, timing is lengthened, is so adjusted repeatedly, ensure the output voltage of linear CCD by putting
Maximum is maintained at 4V after big.
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US20240073558A1 (en) * | 2021-05-11 | 2024-02-29 | Boe Technology Group Co., Ltd. | Virtual image display system, data processing method thereof and display apparatus |
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