CN104821927A - Multiplied-sampling-based parallel burst signal detection system in burst demodulation - Google Patents
Multiplied-sampling-based parallel burst signal detection system in burst demodulation Download PDFInfo
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Abstract
The invention discloses a multiplied-sampling-based parallel burst signal detection system in burst demodulation. The system includes an I-path buffer module, a Q-path buffer module, an N-path sample point data complex transformation module, an N-path complex sample point data differential complex multiplication module, N paths of M-bit shift registers, N paths of correlation addition modules and an optimal decision module. According to the system of the invention, firstly, N paths of sample point data of I paths of sampling signals and Q paths of sampling signals are stored; secondly, N paths of front and rear code element data are read respectively and are subjected to complex differential multiplication computation, so that real-part data in N paths of complex signals can be obtained and are stored in the M-bit shift registers; N paths of parallel register sequences are respectively subjected to correlation addition with a known M-bit burst preamble code element difference sequence in each clock period, so that N paths of correlation values can be obtained; and optimal sampling point-based capture output can be obtained through calculation of the optimal decision module. With the multiplied-sampling-based parallel burst signal detection system in burst demodulation of the invention adopted, problems existing in optimal sampling point capture performed on random multiple paths of sampling signals on which frequency deviation exist can be solved, symbol synchronization of the sampling signals being not accurately determined.
Description
Technical field
The invention discloses the parallel burst signal detection system based on multiple sampling in a kind of burst demodulation, all be widely used in the communication systems such as wideband satellite communication, deep space communication, mobile communication, belong to MF-TDMA/TDM communication system burst demodulation technical field.
Background technology
Along with the development of communication technology of satellite, satellite communication system is towards future developments such as sweetly disposition on large bandwidth, Large Copacity, two-forty, star.Traditional F DMA/TDM communication system can not meet the growth requirement of satellite communication, and MF-TDMA/TDM communication system can adapt to this development trend well.In MF-TDMA/TDM communication system burst communication, that on whole star, burst receiver carries out the synchronous basis of subsequent demodulation to the detection of burst preamble head signal, simultaneously due under Low SNR, the difference of signal and noise becomes very little, and this proposes higher requirement to the detection perform of burst preamble head signal.To the signal after optimum sampling, frame synchronization is carried out for the many employings of burst preamble head input design with front top guide acquisition sequence to catch in the past, under optimum sampling point, carry out burst preamble head input, there is optimum acquisition performance.But also there is some problems in this situation, because in burst communication situation, there is the burst interval time between burst frame and burst frame, likely a part of noise can be carried out estimation error computing together with valid data when carrying out symbol synchronization error and estimating like this, cause the symbol synchronization error estimated not to be optimal estimated value, therefore also do not reach optimum effect.At present increasing research mainly utilize burst preamble header sequence there is stronger autocorrelation performance, synchronously burst signal detection is carried out at non-closely coincide to front top guide, because these methods are faced with the problem such as acquisition performance and resolution system residual frequency departure how found in many times of symbol sampler situations close to optimum sampling point, will directly affect the burst acquisition performance under Low SNR.
Detection for burst preamble head signal adopts energy measuring method, two slip window sampling and based on methods such as FFT coherent detections more, document [1] research adopts lead code to carry out signal detecting method, devise QPSK modulation system, its I/Q road lead code adopts " 010101 " sequence of some as lead code, first carries out complex conjugate to matched filtering data ask modular arithmetic z at receiving terminal
k, then power is averaging to L section observation symbolic number, calculate z simultaneously
ksecondary power spectrum, and compare with the ratio of average power and threshold value and judge whether lock-on signal.Have studied burst preamble head in document [2] and adopt 256 " 0101 " sequences, the same document of its leading head inspecting method [1] is similar, signal complex conjugate after matched filtering is averaging, and carries out in conjunction with FFT related operation the method that thresholding compares and judge whether lock-on signal.In file [3], the method for research and utilization sliding window obtains the optimum sampling point of leading header sequence, and judges whether lock-on signal in conjunction with the method that FFT correlation energy calculates and thresholding compares.In document [4], employing is carried out asking mould square to received signal, and then the mode of carrying out Dual-window slip calculates peak value, and judges whether lock-on signal with the method that judgement threshold compares.The burst signal capturing method that document [5] utilizes carrier synchronization auxiliary sequencel, bit synchronization auxiliary sequencel and unique word to combine, it is the initial synchronisation demodulation completing burst with carrier synchronization sequence and bit synchronization sequence, has carried out catching burst by THE DETECTION OF UNIQUE.
List of references:
[1] Du Dan etc., a kind of detection of burst communication signals and bit timing algorithm for estimating, radio communication technology, 2007,1 phase
[2] Li Mingguang, the realization of low signal-to-noise ratio burst communication modem technology, Xian Electronics Science and Technology University's academic dissertation, 2011
The FPGA of [3] Liu Xiaojuan etc., DVB-quick Timing Synchronization of S burst communication realizes, remote measuring and controlling, 2007.6 phases
[4] Feng Wenjiang etc., a kind of signal detection improvement algorithm of applicable burst communication, University Of Chongqing's journal, 2007,2 phases
[5] Fumihiro Yamashita, Masaaki Tabata etc., Multi-Carrier Multi-RateModem for Universal FDMA/TDMA system, the 24th AIAA INTELSAT system meeting.
Summary of the invention
Technology of the present invention is dealt with problems and is: overcome the deficiencies in the prior art, parallel burst signal detection system based on multiple sampling in a kind of burst demodulation is provided, realize to non-closely coincide synchronous and before there is the high-speed burst of frequency deviation top guide multiple sampling signal carry out parallel burst and detect, under low signal-to-noise ratio environment, there is the acquisition performance close to optimum sampling point.
Technical solution of the present invention is:
Parallel burst signal detection system based on multiple sampling in a kind of burst demodulation comprises: module, N road M bit shift register, the relevant accumulator module in N road and optimal judgement module are taken advantage of again with Q road cache module, N road sampling point data complex transformation module, N road duplicate sample point data difference in I road:
First according to design requirement certainty annuity sample rate, in satellite high-speed burst demodulation system sample rate set up 2 times, 4 times of counting character rate and more than, namely every symbol is by 2,4 and represented with last sampled point, referred to here as N doubly, N=2
i(i=1,2...), adopt N times of symbol sampler rate if actual in system, then this detection method just needs the parallel processing of N road.
Using the input as burst signal detection system of baseband I road sampled signal (in-phase branch) after matched filtering process and Q road sampled signal (quadrature branch) each N road sampling point data, start process.
I road and Q circuit-switched data cache module, the N road In inputted in real time and Qn sampling point data parallel are stored stored in buffering area successively, when I road and the detection of Q circuit-switched data cache module reach certain storage data volume D, I road and Q circuit-switched data cache module are from initial address successively output sample data; N road sampling point data complex transformation module, the N road In exported in I road and Q circuit-switched data cache module i-th address in real time and Qn sampling point data carry out plural sampling point conversion according to I+ (-Q) × j mode, generate N road to walk abreast complex signal sampling point data, and outputted to N road sampling point data difference and take advantage of module again, wherein address i starts from scratch;
N road sampling point data difference takes advantage of module again, the address, N road i-th of complex signal sampling point data and the present clock period complex signal sampling point data that walk abreast that walked abreast the address, N road i-th-1 of preceding clock cycle carry out N multiple multiplication, and the sign bit exporting the real part of N road complex data is to N road M bit shift register;
N road real part data are moved in N number of M bit shift register by N road M bit shift registration module respectively, and the N road M bit register sequence after each data shifts is exported to N road and to be correlated with accumulator module;
N is correlated with on road accumulator module, within each sampling period, N road M bit shift register sequential value and known M position burst preamble head difference sequence is carried out N related operation respectively, and carries out cumulative summation to N number of correlation result, exports N road correlation;
Optimum sampling judgement output module, optimum sampling point selection is carried out to the N road correlation of input: first according to the positive-negative relationship of the sign bit determination correlation of every road correlation, then alternative positive peak and threshold value compare, if the L road in N road is positive peak and is greater than the threshold value of regulation, then think that L road is for now optimum sampling point, and draw and catch output under optimum sampling point, wherein L is less than or equal to N.
D is more than or equal to 10.
N is the symbol sampler rate of system reality, N=2
i(i=1,2...).
The present invention's advantage is compared with prior art:
(1) the present invention is applicable under low signal-to-noise ratio environment top guide signal capture before High-Speed Burst Communication, burst detection can be carried out by the multi-channel sampling signal synchronous to non-closely coincide, and the differential relationship of code element eliminates residual frequency departure to the impact of acquisition performance before and after utilizing, by adding up to the relevant of each sampling point and carry out optimum sampling point judgement, draw and catch output under optimum sampling point, there is top guide acquisition performance preferably, accuracy improves greatly, implementation structure of the present invention is simple, general simultaneously, has certain autgmentability.
(2) the present invention can determine to process degree of parallelism according to the N of reality times of symbol sampler rate, and carry out optimum sampling point judgement and best capture output, versatility strengthens greatly, reduces design cost and improves design efficiency.
Accompanying drawing explanation
Fig. 1 burst frame form of the present invention;
Fig. 2 structural representation of the present invention;
FPGA implementation structure is detected based on 4 tunnels of the 4 samplings burst preamble head that walks abreast in Fig. 3 embodiment of the present invention;
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is further described in detail.
As shown in Figure 1, 2, the parallel burst signal detection system based on multiple sampling in a kind of burst demodulation of the present invention comprises: module, N road M bit shift register, the relevant accumulator module in N road and optimal judgement module are taken advantage of again with Q road cache module, N road sampling point data complex transformation module, N road duplicate sample point data difference in I road:
Using the input as burst signal detection system of baseband I road sampled signal (in-phase branch) after matched filtering process and Q road sampled signal (quadrature branch) each N road sampling point data;
I road and Q circuit-switched data cache module, the N road In inputted in real time and Qn sampling point data parallel are stored stored in buffering area successively, when I road and the detection of Q circuit-switched data cache module reach certain storage data volume D, I road and Q circuit-switched data cache module are from initial address successively output sample data; D is more than or equal to 10; N is the symbol sampler rate of system reality, N=2
i(i=1,2...); N road sampling point data complex transformation module, the N road In exported in I road and Q circuit-switched data cache module i-th address in real time and Qn sampling point data carry out plural sampling point conversion according to I+ (-Q) × j mode, generate N road to walk abreast complex signal sampling point data, and outputted to N road sampling point data difference and take advantage of module again, wherein address i starts from scratch;
N road sampling point data difference takes advantage of module again, the address, N road i-th of complex signal sampling point data and the present clock period complex signal sampling point data that walk abreast that walked abreast the address, N road i-th-1 of preceding clock cycle carry out N multiple multiplication, and the sign bit exporting the real part of N road complex data is to N road M bit shift register; This module needs to utilize former and later two code elements to carry out calculus of differences, the relative relation data before and after being formed between code element;
N road real part data are moved in N number of M bit shift register by N road M bit shift registration module respectively, and the N road M bit register sequence after each data shifts is exported to N road and to be correlated with accumulator module;
N is correlated with on road accumulator module, within each sampling period, N road M bit shift register sequential value and known M position burst preamble head difference sequence is carried out N related operation respectively, and carries out cumulative summation to N number of correlation result, exports N road correlation;
Optimum sampling judgement output module, optimum sampling point selection is carried out to the N road correlation of input: first according to the positive-negative relationship of the sign bit determination correlation of every road correlation, then alternative positive peak and threshold value compare, if the L road in N road is positive peak and is greater than the threshold value of regulation, then think that L road is for now optimum sampling point, and draw and catch output under optimum sampling point, wherein L is less than or equal to N.
With a specific embodiment, specific works process of the present invention and operation principle are described further below:
As shown in Figure 3, assuming that certain High-Speed Burst Communication system symbol rate is 150Mbps, systematic sampling rate is 4 times of character rates, and namely 150*4Mbps, M are 128.Burst frame structure is made up of 128 front top guide symbols, 16 unique words and 4032 effective informations, and modulation system is QPSK, requires that work signal to noise ratio Eb/No is 2dB.As shown in Figure 3, the 4 road parallel baseband sampled signals be input as after matched filtering of native system, wherein 4 sampling points of 4 road parallel sampling data representations, 1 code element input simultaneously, and concrete steps that burst preamble head catches are as follows to adopt the present invention to carry out:
(1) by each 4 tunnel number of samples in the I road after matched filtering and Q road factually time stored in I road and Q road cache module (cache module adopts RAM), the initial memory address of RAM is started from scratch, when the data buffer storage amount in RAM is greater than 10, start the sampling point data exported in RAM, output data address is started from scratch, under each clock triggers, address adds 1, if now read the I1 stored for n-th time in I road and Q road RAM respectively
n| Q1
nto I4
n| Q4
neach 4 road sampling point data, also need to read the I1 stored for (n-1)th time in RAM simultaneously
n-1| Q1
n-1to I4
n-1| Q4
n-1each 4 road sampling point data, the sampling point data read (n-1)th time export as the sampling point data of last code element, and the sampling point data read n-th time export as the sampling point data of current symbol;
(2) by the I1 of current symbol
n| Q1
nto I4
n| Q4
neach 4 road sampling point data pluralize according to I+ (Q) × j formal argument, and by the I1 of last code element
n-1| Q1
n-1to I4
n-1| Q4
n-1each 4 road sampling point data pluralize according to I+ (-Q) × j formal argument, using front and back code element plural number sample value as a and the b input input value of 4 multiple multipliers, carry out the multiple multiplication between the code element of front and back, the sampling point data of former and later two code elements are utilized to carry out calculus of differences at this, relative relation data before and after being formed between code element, under each clock cycle triggers, take advantage of the real part P1 to P4 of result to export again on 4 tunnels, get the sign bit S1 to S4 of P1 to P4 again, in the shift register of corresponding immigration 4 128, the 128 potential difference sub-sequences that each shift register is known with this locality again carry out same or computing, export 4 tunnel 128 bit sequences, 4 tunnel 128 bit sequences are added up by turn, export 4 roads to be correlated with accumulation result Rela1 to Rela4,
(3) a be correlated with road of positive peak in accumulated value and threshold value of 4 roads is selected to make comparisons, threshold value is decided to be 76, determines whether to catch according to comparative result, if catch, then think that this road is optimum sampling point, the information such as mark, initial address and optimum sampling point of catching export; If do not catch, then restart the computing in next cycle.
The unspecified part of the present invention belongs to general knowledge as well known to those skilled in the art.
Claims (3)
1. in burst demodulation based on a parallel burst signal detection system for multiple sampling, it is characterized in that comprising: module, N road M bit shift register, the relevant accumulator module in N road and optimal judgement module are taken advantage of again with Q road cache module, N road sampling point data complex transformation module, N road duplicate sample point data difference in I road:
I road and Q circuit-switched data cache module, the N road In inputted in real time and Qn sampling point data parallel are stored stored in buffering area successively, when I road and the detection of Q circuit-switched data cache module reach certain storage data volume D, I road and Q circuit-switched data cache module are from initial address successively output sample data; N road sampling point data complex transformation module, the N road In exported in I road and Q circuit-switched data cache module i-th address in real time and Qn sampling point data carry out plural sampling point conversion according to I+ (-Q) × j mode, generate N road to walk abreast complex signal sampling point data, and outputted to N road sampling point data difference and take advantage of module again, wherein address i starts from scratch;
N road sampling point data difference takes advantage of module again, the address, N road i-th of complex signal sampling point data and the present clock period complex signal sampling point data that walk abreast that walked abreast the address, N road i-th-1 of preceding clock cycle carry out N multiple multiplication, and the sign bit exporting the real part of N road complex data is to N road M bit shift register;
N road real part data are moved in N number of M bit shift register by N road M bit shift registration module respectively, and the N road M bit register sequence after each data shifts is exported to N road and to be correlated with accumulator module;
N is correlated with on road accumulator module, within each sampling period, N road M bit shift register sequential value and known M position burst preamble head difference sequence is carried out N related operation respectively, and carries out cumulative summation to N number of correlation result, exports N road correlation;
Optimum sampling judgement output module, optimum sampling point selection is carried out to the N road correlation of input: first according to the positive-negative relationship of the sign bit determination correlation of every road correlation, then alternative positive peak and threshold value compare, if the L road in N road is positive peak and is greater than the threshold value of regulation, then think that L road is for now optimum sampling point, and draw and catch output under optimum sampling point, wherein L is less than or equal to N.
2. in a kind of burst demodulation according to claim 1 based on the parallel burst signal detection system of multiple sampling, it is characterized in that: described D is more than or equal to 10.
3. in a kind of burst demodulation according to claim 1 based on the parallel burst signal detection system of multiple sampling, it is characterized in that: described N is the symbol sampler rate of system reality, N=2
i(i=1,2...).
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105072067A (en) * | 2015-08-27 | 2015-11-18 | 西安电子科技大学 | Method for detecting burst-mode signal in low signal to noise ratio |
| CN107733516A (en) * | 2017-09-20 | 2018-02-23 | 西安空间无线电技术研究所 | A kind of burst communication signals detection method |
| CN107846262A (en) * | 2017-09-27 | 2018-03-27 | 西安空间无线电技术研究所 | A kind of demodulation code speed detection method based on difference related operation |
| CN108777670A (en) * | 2018-05-31 | 2018-11-09 | 清华大学 | A kind of frame synchornization method and device |
| CN109756968A (en) * | 2019-01-25 | 2019-05-14 | 北京睿信丰科技有限公司 | The precise synchronization timing method and precise synchronization timing means of single carrier spread spectrum system |
| CN111934815A (en) * | 2020-06-29 | 2020-11-13 | 南京天际行云科技有限公司 | Transform domain-based single-channel multi-channel burst signal rapid detection method |
| CN116132232A (en) * | 2021-11-15 | 2023-05-16 | 西安电子科技大学 | Multipath parallel up-sampling method for high-speed digital communication |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101174849A (en) * | 2006-10-31 | 2008-05-07 | 中科院嘉兴中心微***所分中心 | Spread-spectrum code chip synchronous catching and tracing method and device of wireless sensing net node |
| US20090310651A1 (en) * | 2006-03-31 | 2009-12-17 | The Regents Of The University Of California | Spread-spectrum receiver and reception method |
| US20110188614A1 (en) * | 2010-02-04 | 2011-08-04 | Jeng-Hong Chen | Simplified acquisition apparatus and method for a bluetooth receiver |
| CN103199887A (en) * | 2013-03-11 | 2013-07-10 | 北京航空航天大学 | General capture method applied to direct spread spectrum signal |
| CN103414674A (en) * | 2013-07-18 | 2013-11-27 | 西安空间无线电技术研究所 | MAPSK self-adaptive demodulating system |
-
2015
- 2015-04-27 CN CN201510206372.4A patent/CN104821927B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090310651A1 (en) * | 2006-03-31 | 2009-12-17 | The Regents Of The University Of California | Spread-spectrum receiver and reception method |
| CN101174849A (en) * | 2006-10-31 | 2008-05-07 | 中科院嘉兴中心微***所分中心 | Spread-spectrum code chip synchronous catching and tracing method and device of wireless sensing net node |
| US20110188614A1 (en) * | 2010-02-04 | 2011-08-04 | Jeng-Hong Chen | Simplified acquisition apparatus and method for a bluetooth receiver |
| CN103199887A (en) * | 2013-03-11 | 2013-07-10 | 北京航空航天大学 | General capture method applied to direct spread spectrum signal |
| CN103414674A (en) * | 2013-07-18 | 2013-11-27 | 西安空间无线电技术研究所 | MAPSK self-adaptive demodulating system |
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105072067A (en) * | 2015-08-27 | 2015-11-18 | 西安电子科技大学 | Method for detecting burst-mode signal in low signal to noise ratio |
| CN105072067B (en) * | 2015-08-27 | 2018-02-23 | 西安电子科技大学 | The detection method of burst under a kind of low signal-to-noise ratio |
| CN107733516A (en) * | 2017-09-20 | 2018-02-23 | 西安空间无线电技术研究所 | A kind of burst communication signals detection method |
| CN107846262A (en) * | 2017-09-27 | 2018-03-27 | 西安空间无线电技术研究所 | A kind of demodulation code speed detection method based on difference related operation |
| CN107846262B (en) * | 2017-09-27 | 2020-11-20 | 西安空间无线电技术研究所 | Demodulation code rate detection method based on differential correlation operation |
| CN108777670B (en) * | 2018-05-31 | 2020-11-10 | 清华大学 | Frame synchronization method and device |
| CN108777670A (en) * | 2018-05-31 | 2018-11-09 | 清华大学 | A kind of frame synchornization method and device |
| CN109756968A (en) * | 2019-01-25 | 2019-05-14 | 北京睿信丰科技有限公司 | The precise synchronization timing method and precise synchronization timing means of single carrier spread spectrum system |
| CN109756968B (en) * | 2019-01-25 | 2021-03-30 | 北京睿信丰科技有限公司 | Precise synchronization timing method and device for single carrier spread spectrum system |
| CN111934815A (en) * | 2020-06-29 | 2020-11-13 | 南京天际行云科技有限公司 | Transform domain-based single-channel multi-channel burst signal rapid detection method |
| CN111934815B (en) * | 2020-06-29 | 2022-08-09 | 南京天际行云科技有限公司 | Transform domain-based single-channel multi-channel burst signal rapid detection method |
| CN116132232A (en) * | 2021-11-15 | 2023-05-16 | 西安电子科技大学 | Multipath parallel up-sampling method for high-speed digital communication |
| CN116132232B (en) * | 2021-11-15 | 2024-04-19 | 西安电子科技大学 | Multipath parallel up-sampling method for high-speed digital communication |
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