CN104810409A - Silicon carbide diode and manufacturing method thereof - Google Patents
Silicon carbide diode and manufacturing method thereof Download PDFInfo
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- CN104810409A CN104810409A CN201410037059.8A CN201410037059A CN104810409A CN 104810409 A CN104810409 A CN 104810409A CN 201410037059 A CN201410037059 A CN 201410037059A CN 104810409 A CN104810409 A CN 104810409A
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- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 300
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 164
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 34
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 239000010410 layer Substances 0.000 claims description 149
- 238000000034 method Methods 0.000 claims description 28
- 239000002019 doping agent Substances 0.000 claims description 19
- 238000002161 passivation Methods 0.000 claims description 19
- 230000015572 biosynthetic process Effects 0.000 claims description 17
- 239000011241 protective layer Substances 0.000 claims description 16
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- 238000000059 patterning Methods 0.000 claims description 14
- 230000008859 change Effects 0.000 claims description 10
- 239000011248 coating agent Substances 0.000 claims description 9
- 238000000576 coating method Methods 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 9
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 6
- 238000001020 plasma etching Methods 0.000 claims description 6
- 239000002356 single layer Substances 0.000 claims description 6
- 239000010936 titanium Substances 0.000 claims description 6
- 229910052719 titanium Inorganic materials 0.000 claims description 6
- 230000007704 transition Effects 0.000 claims description 6
- 230000007797 corrosion Effects 0.000 claims description 5
- 238000005260 corrosion Methods 0.000 claims description 5
- 238000005468 ion implantation Methods 0.000 claims description 4
- 238000005275 alloying Methods 0.000 claims description 3
- 238000000137 annealing Methods 0.000 claims description 3
- 229910052796 boron Inorganic materials 0.000 claims description 3
- 238000003475 lamination Methods 0.000 claims description 3
- 229910044991 metal oxide Inorganic materials 0.000 claims 1
- 150000004706 metal oxides Chemical class 0.000 claims 1
- 238000000206 photolithography Methods 0.000 claims 1
- 230000015556 catabolic process Effects 0.000 abstract description 4
- 238000004377 microelectronic Methods 0.000 abstract description 2
- 230000005684 electric field Effects 0.000 description 9
- 230000008569 process Effects 0.000 description 6
- 230000006872 improvement Effects 0.000 description 4
- 238000009826 distribution Methods 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- IJGRMHOSHXDMSA-UHFFFAOYSA-N nitrogen Substances N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
- Bipolar Transistors (AREA)
Abstract
The invention relates to a microelectronic device and a manufacturing method thereof, and specifically relates to a silicon carbide diode and a manufacturing method thereof. The silicon carbide diode comprises a silicon carbide substrate of a first conductivity type which is provided with a low-doping-concentration first layer of silicon carbide of the first conductivity type, a first region of silicon carbide which is of a second conductivity type and is formed on the first layer of silicon carbide, a second region of silicon carbide which is of the second conductivity type and is disposed on the first layer of silicon carbide, a first electrode which is disposed on the second region of silicon carbide, and a second electrode which is disposed on the silicon carbide substrate, wherein the second region of silicon carbide, the first region of silicon carbide and the first layer of silicon carbide form a mesa structure which is used for providing edge end protection for the silicon carbide diode. The invention further provides the manufacturing method. The manufacturing process of the silicon carbide diode is simplified, the voltage endurance capability is improved, edge end breakdown and breakdown voltage drift of the device are prevented, the reverse working voltage is improved, the reverse leakage current is reduced, and the stability is increased.
Description
Technical field
The present invention relates to a kind of microelectronic component and manufacture method thereof, be specifically related to a kind of silicon carbide diode and manufacture method thereof.
Background technology
Carborundum (SiC) has about 3 × 10
6the critical breakdown strength, about 2.0 × 10 of V/cm
7the high saturation drift velocity of cm/sec and the high heat conductance of about 4.9W/cmK, can produce withstand voltage, more elevated operating temperature, more high power density and higher frequency device higher relative to silicon (Si) device in theory.Therefore SiC is considered to desirable and is applicable to high-voltage applications.But the difficult point in manufacturing and the complexity of manufacture process limit the application of SiC device in high voltage occasion.
Summary of the invention
For the deficiencies in the prior art, an object of the present invention is to provide a kind of silicon carbide diode with mesa edge termination, another object is to provide a kind of for the manufacture of this method with the silicon carbide diode of mesa edge termination, the present invention makes silicon carbide diode manufacture process simplify, voltage endurance capability improves, and prevents device edge termination from puncturing and puncture voltage drift, improves working inverse voltage, reduce reverse leakage current, increase stability.
The object of the invention is to adopt following technical proposals to realize:
The invention provides a kind of silicon carbide diode, its improvements are, described silicon carbide diode comprises:
There is the silicon carbide substrates of the first conduction type;
Described silicon carbide substrates has the ground floor carborundum of the first conduction type of low doping concentration;
First district's carborundum, has the second conduction type and is formed on ground floor carborundum;
Second district's carborundum, has the second conduction type and on first district's carborundum, second district's carborundum, first district's carborundum and ground floor carborundum form mesa structure, for providing edge termination to protect for silicon carbide diode;
The first electrode on second district's carborundum; And
The second electrode in silicon carbide substrates.
Further, described silicon carbide diode comprises second layer carborundum, and it is arranged between silicon carbide substrates and ground floor carborundum, and second layer carborundum is the first conduction type, and its doping content is greater than the doping content of ground floor carborundum.
Further, second district's carborundum, first district's carborundum and ground floor carborundum are configured to a mesa structure.
Further, described second district's carborundum is made up of the silicon carbide layer of second conduction type.
Further, described second district's carborundum is made up of the silicon carbide layer of two or more the second stacked conduction types.
Further, described first district's carborundum is formed on ground floor carborundum.
Further, described first district's carborundum is positioned at the outward flange of second district's carborundum.
Further, described first district's carborundum by second conduction type and the silicon carbide layer that its doping content is greater than ground floor silicon carbide doped concentration form, protect for the formation of edge termination.
Further, described first district's carborundum by two or more second conduction types and the silicon carbide layer that its doping content is greater than ground floor silicon carbide doped concentration form, protect for the formation of edge termination.
Further, described first conduction type comprises n-type conductivity carborundum, and the second conduction type comprises p-type conductivity carborundum; Or
Described first conduction type comprises the carborundum of p-type electric-conducting, and the second conduction type comprises n-type conductivity carborundum.
Further, described first electrode is made up of titanium or titanium alloy-layer lamination.
The present invention is based on the manufacture method of a kind of silicon carbide diode that another object provides, its improvements are, described manufacture method comprises the steps:
A, on silicon carbide substrates epitaxial silicon carbide;
B, on sic deposited oxide layer or layer laminate are as the first mask layer;
C, on the first mask layer, form organic mask layer, photoetching is carried out to etch layer layer;
D, realized the oxide skin(coating) sidewall of gradual change and graphical by the etch layer layer gradually changed;
E, use reactive ion etching carborundum, and by the Graphic transitions of oxide skin(coating) on carborundum;
F, to be formed edge termination protection on sic by the dopant of ion implantation second conduction type;
G, silicon carbide make metal level and by oxide skin(coating) remove, formed Ohm contact electrode;
H, making silicon carbide protective layer, and form electrode contact window;
I, be packaged into silicon carbide diode device.
Further, in described steps A, form N-shaped epitaxial loayer ground floor carborundum having in high concentration N-shaped silicon carbide substrates; This N-shaped epitaxial loayer has from the thickness of 5 to 350 μm with from 1 × 10
14cm
-3to 1 × 10
17cm
-3n-shaped doping content;
Have N-shaped second layer carborundum between ground floor carborundum 12 and silicon carbide substrates 10, this N-shaped epitaxial loayer has from the thickness of 1 to 10 μm with from 1 × 10
17cm
-3to 2 × 10
18cm
-3n-shaped doping content;
Then on N-shaped ground floor carborundum, p-type third layer carborundum is grown; P-type third layer carborundum 13 has from the thickness of 0.1 to 5 μm with from 1 × 10
17cm
-3to about 5 × 10
18cm
-3p-type doping content;
P-type third layer carborundum makes p-type the 4th layer of carborundum forming ohmic contact, to provide the ohmic contact of the first electrode; P type the 4th layer of carborundum 14 has the thickness from 0.01 to 1 μm, and has from 5 × 10
18cm
-3to 1 × 10
20cm
-3p-type doping content.
Further, in described step B, p-type the 4th layer of carborundum forms the first mask layer, and the first mask layer is single layer oxide or oxide compound-laminated.
Further, in described step C, the first mask layer forms photo etched mask second mask layer, and by graphical for the second mask layer.
Further, in described step D, complete the graphical of the first mask layer by the figure of the second mask layer; Second mask layer is oxidized and the solution removal that is corroded gradually along with the corrosion of the first mask layer, forms the first mask layer sidewall of inclination gradual change; Described second mask layer thickness is 0.5 μm to 5 μm; The single layer oxide of the first mask layer or oxide compound-laminatedly to have from 10
15cm
-3to 10
19cm
-3doping content.
Further, in described step e, remove the second mask layer, and by the Graphic transitions of patterned first mask layer on the carborundum of correspondence, form silicon carbide table board structure by utilizing first mask layer with the patterning of sidewall profile as reactive ion etching mask;
Mesa structure extends to N-shaped ground floor carborundum from the second silicon carbide region, and the second silicon carbide region is formed on p-type third layer carborundum and p-type the 4th layer of carborundum; The ground floor carborundum of the second silicon carbide region makes low doping concentration first silicon carbide region, adulterates from 1 × 10
16cm
-3to 1 × 10
19cm
-3p-type dopant, share structure for providing the voltage of table top bottom.
Further, in described step F, remove the first mask layer, make the window that also patterning the 3rd mask layer has corresponding to p-type first silicon carbide region with formation; P-type first silicon carbide region is formed by the 3rd mask layer implanted with p-type dopant in N-shaped ground floor carborundum of patterning; The concentration of dopant of p-type first silicon carbide region is 10% to 100% of the concentration of dopant of third layer carborundum.
Further, in described step G, remove the 3rd mask layer and the formation of the surface passivation protective layer of deposited oxide or passivating material; Surface passivation protective layer has the thickness from 0.1 μm to 2 μm; The high annealing that silicon carbide diode is exposed to from 900 DEG C to 1850 DEG C reaches 1-100 minute.
Further, in described step H, in surface passivation protective layer, form contact window, and form the first electrode by contact window; And form the second electrode on silicon carbide substrates; The metal electrode contact made is being carried out alloying or is being sputtered covering metal layer, for the connection gone between in metal electrode contact under the high temperature of 900 DEG C to 1500 DEG C.
Compared with the prior art, the beneficial effect that the present invention reaches is:
1, the silicon carbide diode with mesa edge termination provided by the invention, and for the manufacture of having the method for silicon carbide diode of mesa edge termination, silicon carbide diode manufacture method is simplified, voltage endurance capability improves, prevent device edge breakdown and puncture voltage drift, improve working inverse voltage, reduce reverse leakage current, increase stability.
2, the diode with table top terminal protection structure that the present invention relates to is easier to manufacture, and can have end use efficiency and the reliability of the improvement being better than plane terminal diode.Due to the existence of inclined table sidewall, the Electric Field Distribution of silicon carbide is more even, therefore can provide more high-tension protection and can not puncture in the position of table top bottom or knot.
3, silicon carbide diode manufacture method provided by the invention is more simple, and it can have identical or higher performance characteristic, particularly high voltage tolerance performance.
Accompanying drawing explanation
Fig. 1 is the sectional view of the silicon carbide diode device of specific embodiment provided by the invention;
Fig. 2 is the silicon carbide diode structure chart forming ground floor mask on sic provided by the invention;
Fig. 3 provided by the inventionly forms second layer mask and silicon carbide diode structure chart after patterning on ground floor mask;
Fig. 4 is provided by the invention by mask patterning for the ground floor silicon carbide diode structure chart with the sidewall profile of inclination gradual change corresponding to the second mask with formation;
Fig. 5 is removal second layer mask provided by the invention, and forms the carborundum pattern corresponding with ground floor mask;
Fig. 6 is the silicon carbide diode structure chart after removal ground floor mask provided by the invention;
Fig. 7 is that another mask of patterning provided by the invention forms the silicon carbide diode structure chart had corresponding to injection second conductivity type silicon carbide district opening;
Fig. 8 is the silicon carbide diode structure chart in formation second conductivity type silicon carbide district provided by the invention;
Fig. 9 is the silicon carbide diode structure chart of another mask layer of removal provided by the invention;
Figure 10 is the silicon carbide diode structure chart that the optional cover layer of deposited oxide provided by the invention or other passivating materials is formed;
Figure 11 is the silicon carbide diode structure chart of formation electrode contact provided by the invention;
Wherein: 10-silicon carbide substrates, 12-ground floor carborundum, 13-third layer carborundum, 14-the 4th layer of carborundum, 15-first district carborundum, 22-first electrode, 23-second electrode, 30-wafer surface passivation protection layer, 100-first mask layer, 110-second mask layer, 120-the 3rd mask layer;
Figure 12 is the flow chart of manufacture silicon carbide diode provided by the invention.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in further detail.
The invention provides the more simple silicon carbide diode manufacturing process of one, it can have identical or higher performance characteristic, particularly high voltage tolerance performance.The invention provides a kind of method for the manufacture of silicon carbide diode.This manufacture method relates to the surface deposition one deck oxide mask in SiC wafer.A mask layer puts on oxide mask layer on the surface.The oxide skin(coating) sidewall of gradual change is formed by the mask layer corrosion gradually changed.Use reactive ion etching carborundum by the Graphic transitions of oxide skin(coating) on carborundum.Edge termination is formed to improve diode behavior by the dopant of ion implantation second conduction type.One metal level or metal stacking to be deposited in wafer surface and to remove, mask to form Ohm contact electrode.Deposition surface protective layer, etches electrode contact window.Optionally, the surface passivation protective layer of one deck or layer laminate can be deposited, and be etched to metal level formation surface protection.Its flow chart as shown in figure 12.
The silicon carbide diode that the process that a kind of application for patent according to the present invention describes is formed has been shown in Fig. 1.Wherein have Metal contacts preferably form the first electrode 22 by titanium or titanium alloy-layer lamination and be incorporated in the second stacked silicon carbide region, wherein the second silicon carbide region comprises third layer carborundum 13 and the 4th layer of carborundum 14.One ion implantation edge termination region first silicon carbide region 15 preferably utilizes the dopant ion of the second conduction type, such as boron and/or aluminium, be formed at the outward flange position of second silicon carbide region of closing on the first electrode 22 and mesa structure in the ground floor carborundum 12 of SiC wafer.Wafer surface passivation protection layer 30 to be deposited on subsequently on wafer and to form the contact window of the first electrode 22.The silicon carbide diode of such making has required attribute and works according to required.
In Fig. 2-Figure 11, order shows the process of silicon carbide diode constructed in accordance.Hereafter will be described in detail this.This process of the present invention is also for device provides surface passivation and edge termination processing method.Passivation protection material is put in wafer surface so that the basic skills stablizing its electrical activity is known by those skilled in that art.But adopting masking film to form the mesa edge end-o f-pipe-control with gradual sidewall is significantly improve existing methodical one.
As seen from Fig. 1, the silicon carbide diode device architecture of some embodiments of the present invention comprises the single crystal silicon carbide substrate 10 of the first conduction type.The first surface of single crystal silicon carbide substrate 10 provides N-shaped silicon carbide epitaxial layers ground floor carborundum 12.The p-type third layer carborundum 13 that extension is formed is on the ground floor carborundum 12 of N-shaped, and p-type the 4th layer of carborundum 14 that extension is formed is on p-type third layer carborundum 13, and 13 and 14 form the second silicon carbide region jointly, and can provide the anode of device.N-shaped silicon carbide epitaxial layers ground floor carborundum 12 forms low concentration p-type area first silicon carbide region 15, and provide the edge termination of device anode to protect, it is also provided in N-shaped first silicon carbide layer 12.The wafer surface passivation protection material be applicable to is as SiO
2insulating barrier, extends, and covers the top of ground floor carborundum 12 above the first electrode 22, and part first electrode 22 not being passivated protective material covering provides positive contact window.The face of the substrate 10 relative with the second silicon carbide region provides cathode contacts second electrode 23.
Close on low concentration p-type silicon carbide region first silicon carbide region 15 of the second silicon carbide region, concentrate in order to avoid anode edge end electric field.In certain embodiments, low concentration p-type first silicon carbide region 15 is between ground floor carborundum 12 and passivation protection layer 22.And p-type first silicon carbide region 15 can be connected with the external boundary side of contiguous p-type second silicon carbide region substantially.Especially, in some embodiments of the invention, p-type area 15 extends to but does not surmount the inward flange of p-type second silicon carbide region.
The mesa structure that epitaxial p-type third layer carborundum 13 and high concentration of p-type ohmic contact the 4th layer of carborundum 14 form p-type second silicon carbide region is comprised by providing; and form low doping concentration p-type first silicon carbide region 15, can be silicon carbide diode device provides and has the protection of mesa edge end.The diode with mesa edge end operator guards that the present invention relates to is easier to manufacture, and can have end use efficiency and the reliability of the improvement being better than plane terminal diode.And due to the existence of inclined table sidewall, the Electric Field Distribution of silicon carbide diode device is more even, and therefore device can work at a higher voltage and can not puncture in the position of table top bottom or pn knot.And, form extensive protection structure by the table top of implanted with p-type first silicon carbide region 15 pairs of p-type second silicon carbide region, the peak electric field of table top bottom can be reduced.Thus, such as, expect that the silicon carbide diode device of some embodiments of the present invention can have the withstand voltage of more than 10kV.
Alternatively, may be provided in the electric field termination structure of terminal, peripheral with the outward flange making the having lateral depletion of N-shaped ground floor carborundum 12 can not arrive chip.Especially, form a groove by n-type region ground floor carborundum 12 surface outside implanted with p-type first silicon carbide region 15 and form electric field termination structure.This electric field termination structure can form the distribution having and surround device edge end operator guards.But the present invention should not be construed as the silicon carbide diode being confined to have specific electric field termination structure.Such as, may be provided in the high concentration N-shaped injection region outside implanted with p-type silicon carbide region 15.
The manufacture method of some embodiments of the present invention will be described now.As seen in Figure 2, N-shaped epitaxial loayer ground floor carborundum 12 is formed having in high concentration n-type substrate 10.This N-shaped epitaxial loayer can have from 5 to about 350 μm thickness and from about 1 × 10
14cm
-3to about 1 × 10
17cm
-3n-shaped doping content.In certain embodiments of the invention, ground floor carborundum 12 be about 100 μm thick, dopant is nitrogen N, doping content about 5 × 10
14cm
-3.In certain embodiments of the invention, N-shaped second layer carborundum between ground floor carborundum 12 and silicon carbide substrates 10, can be had, this N-shaped epitaxial loayer can have from 1 to about 10 μm thickness and from about 1 × 10
17cm
-3to about 2 × 10
18cm
-3n-shaped doping content.Then on N-shaped ground floor carborundum 12, p-type third layer carborundum 13 is grown.P-type third layer carborundum 13 can have from the thickness of about 0.1 to 5 μm with from about 1 × 10
17cm
-3to about 5 × 10
18cm
-3p-type doping content.In certain embodiments of the invention, p-type third layer carborundum 13 thickness is about 2 μm, and doping content is about 2 × 10
18cm
-3.P-type third layer carborundum 13 makes p-type the 4th layer of carborundum 14 forming ohmic contact, to provide the ohmic contact of the first electrode 22.P type the 4th layer of carborundum 14 has the thickness of from about 0.01 to about 1 μm, and has from about 5 × 10
18cm
-3to about 1 × 10
20cm
-3p-type doping content.It can be single layer oxide or oxide compound-laminated that p-type the 4th layer of carborundum 14 is formed the first mask layer 100, first mask layer 100.
As Fig. 3 and seen in fig. 4, the first mask layer 100 forms photo etched mask second mask layer 110, and by graphical for the second mask layer 110.The graphical of the first mask layer 100 is completed by the figure of the second mask layer 110.In certain embodiments, be the initial conditions of the second mask layer 110 as shown in phantom in Figure 4, in patterning process, change the second mask layer 110 shown in solid line gradually into.Second mask layer 110 can be oxidized and the solution removal that is corroded gradually along with the corrosion of the first mask layer 100 in certain embodiments of the invention, thus forms the first mask layer 100 sidewall of inclination gradual change.In certain embodiments of the invention, the second mask layer 110 has and meets corrosion and form the first suitable mask layer 100 and to tilt thickness needed for gradual change side wall construction and structure, such as, from 0.5 μm to about 5 μm.In certain embodiments of the invention, the first mask layer 100 single layer oxide or oxide compound-laminatedly to have from about 10
15cm
-3to about 10
19cm
-3doping content.
As seen in Figure 5, remove the second mask layer 110, and by the Graphic transitions of patterned first mask layer 100 on the silicon carbide wafer of correspondence.By utilize there is the first mask layer 100 of the patterning of specific sidewall profile form silicon carbide table board structure as reactive ion etching mask.This mesa structure can extend to N-shaped ground floor carborundum 12 from the second silicon carbide region, and in the present embodiment, the second silicon carbide region is formed on p-type third layer carborundum 13 and p-type the 4th layer of carborundum 14.The ground floor carborundum 12 closing on the second silicon carbide region makes low doping concentration first silicon carbide region, adulterates from about 1 × 10
16cm
-3to about 1 × 10
19cm
-3p-type dopant share structure to provide the voltage of table top bottom.
Fig. 6, Fig. 7 and Fig. 8 show the formation of p-type first silicon carbide region 15 of some embodiments of the present invention.As Fig. 6 and Fig. 7 finding, remove the first mask layer 100, make the window that also patterning the 3rd mask layer 120 has corresponding to p-type first silicon carbide region 15 with formation.As seen in Figure 8, p-type first silicon carbide region 15 is formed by the 3rd mask layer 120 implanted with p-type dopant in N-shaped ground floor carborundum 12 of patterning.In the off case, what this p-type first silicon carbide region 15 was formed can be at least part of shielding p-type second silicon carbide region edge termination by the impact of high electric field, device may be made can to tolerate higher reverse voltage.
Any one or more suitable p-type dopant can be utilized.The concentration of dopant of p-type first silicon carbide region 15 is in some embodiments of the invention 0.1 to 100% of concentration of dopant of third layer carborundum 13, and in certain embodiments of the invention, is from 10 to 20% (such as about 1 × 10
17cm
-3).
Fig. 9 and Figure 10 shows removal the 3rd mask layer 120 and the formation of the optional surface passivation protective layer 30 of deposited oxide or other passivating materials.Surface passivation protective layer 30 can have the thickness from about 0.1 μm to about 2 μm.In either case, no matter whether use surface passivation protective layer 30, device is all exposed to from about 900 DEG C to about 1850 DEG C and in certain embodiments for the high annealing of about 1800 DEG C reaches a few minutes, as ten minutes, to activate the P-type dopant injected.
As shown in Figure 10, contact window can be formed in surface passivation protective layer 30, and form the first electrode 22 by contact window.Similarly can form the second electrode 23 in silicon carbide substrates 10.The electrode ohmic contact material be applicable to includes but not limited to nickel, titanium alloy and aluminium.And, as understood by those skilled in the art, multilayer material also can be utilized to realize electrode contact.Then alloying can carried out to the Metal Contact made under the high temperature of about 900 DEG C to about 1500 DEG C.Also covering metal layer can be sputtered on these electrode contacts, so that the connection of lead-in wire.
The order of the step in Figure 10 and Figure 11 can be changed.Then provide surface passivation protective layer 30 by making and patterned metal layer, and the window forming the first electrode 22 in surface passivation protective layer 30 is formed.
Finally should be noted that: above embodiment is only in order to illustrate that technical scheme of the present invention is not intended to limit, although with reference to above-described embodiment to invention has been detailed description, those of ordinary skill in the field are to be understood that: still can modify to the specific embodiment of the present invention or equivalent replacement, and not departing from any amendment of spirit and scope of the invention or equivalent replacement, it all should be encompassed in the middle of right of the present invention.
Claims (20)
1. a silicon carbide diode, is characterized in that, described silicon carbide diode comprises:
There is the silicon carbide substrates of the first conduction type;
Described silicon carbide substrates has the ground floor carborundum of the first conduction type of low doping concentration;
First district's carborundum, has the second conduction type and is formed on ground floor carborundum;
Second district's carborundum, has the second conduction type and on ground floor carborundum, second district's carborundum, first district's carborundum and ground floor carborundum form mesa structure, for providing edge termination to protect for silicon carbide diode;
The first electrode on second district's carborundum; And
The second electrode in silicon carbide substrates.
2. silicon carbide diode as claimed in claim 1, it is characterized in that, described silicon carbide diode comprises second layer carborundum, it is arranged between silicon carbide substrates and ground floor carborundum, second layer carborundum is the first conduction type, and its doping content is greater than the doping content of ground floor carborundum.
3. silicon carbide diode as claimed in claim 2, it is characterized in that, second district's carborundum, first district's carborundum and ground floor carborundum are configured to a mesa structure.
4. silicon carbide diode according to claim 3, is characterized in that, described second district's carborundum is made up of the silicon carbide layer of second conduction type.
5. silicon carbide diode as claimed in claim 3, it is characterized in that, described second district's carborundum is made up of the silicon carbide layer of two or more the second stacked conduction types.
6. silicon carbide diode as claimed in claim 3, it is characterized in that, described first district's carborundum is formed on ground floor carborundum.
7. silicon carbide diode as claimed in claim 3, it is characterized in that, described first district's carborundum is positioned at the outward flange of second district's carborundum.
8. silicon carbide diode as claimed in claim 4, is characterized in that, described first district's carborundum by second conduction type and the carborundum that its doping content is greater than ground floor silicon carbide doped concentration form, protect for the formation of edge termination.
9. silicon carbide diode as claimed in claim 5, is characterized in that, described first district's carborundum by two or more second conduction types and the carborundum that its doping content is greater than ground floor silicon carbide doped concentration form, protect for the formation of edge termination.
10. silicon carbide diode as claimed in claim 1, it is characterized in that, described first conduction type comprises n-type conductivity carborundum, and the second conduction type comprises p-type conductivity carborundum; Or
Described first conduction type comprises the carborundum of p-type electric-conducting, and the second conduction type comprises n-type conductivity carborundum.
11. silicon carbide diodes as claimed in claim 1, is characterized in that, described first electrode is made up of titanium or titanium alloy-layer lamination.
The manufacture method of 12. 1 kinds of silicon carbide diodes, is characterized in that, described manufacture method comprises the steps:
A, on silicon carbide substrates epitaxial silicon carbide;
B, on sic making oxide skin(coating) or layer laminate are as the first mask layer;
C, on the first mask layer, form the second mask layer, and photolithography patterning is carried out to the second mask layer;
D, realized the oxide skin(coating) sidewall of gradual change and graphical by the mask layer gradually changed;
E, use reactive ion etching carborundum, and by the Graphic transitions of oxide skin(coating) on carborundum;
F, to be formed edge termination protection on sic by the dopant of ion implantation second conduction type;
G, in silicon carbide deposited metal oxide skin(coating) to be removed;
H, making silicon carbide protective layer, and form electrode contact window;
I, be packaged into silicon carbide diode device.
13. manufacture methods as claimed in claim 12, is characterized in that, in described steps A, form N-shaped ground floor carborundum having in high concentration N-shaped silicon carbide substrates; This N-shaped epitaxial loayer has from the thickness of 5 to 350 μm with from 1 × 10
14cm
-3to 1 × 10
17cm
-3n-shaped doping content;
Have N-shaped second layer carborundum between ground floor carborundum 12 and silicon carbide substrates 10, this N-shaped epitaxial loayer has from the thickness of 1 to 10 μm with from 1 × 10
17cm
-3to 2 × 10
18cm
-3n-shaped doping content;
Then on N-shaped ground floor carborundum, p-type third layer carborundum is grown; P-type third layer carborundum 13 has from the thickness of 0.1 to 5 μm with from 1 × 10
17cm
-3to about 5 × 10
18cm
-3p-type doping content;
P-type third layer carborundum makes p-type the 4th layer of carborundum forming ohmic contact, to provide the ohmic contact of the first electrode; P type the 4th layer of carborundum 14 has the thickness from 0.01 to 1 μm, and has from 5 × 10
18cm
-3to 1 × 10
20cm
-3p-type doping content.
14. manufacture methods as claimed in claim 12, is characterized in that, in described step B, p-type the 4th layer of carborundum forms the first mask layer, and the first mask layer is single layer oxide or oxide compound-laminated.
15. manufacture methods as claimed in claim 12, is characterized in that, in described step C, the first mask layer form photo etched mask second mask layer, and by graphical for the second mask layer.
16. manufacture methods as claimed in claim 12, is characterized in that, in described step D, complete the graphical of the first mask layer by the litho pattern of the second mask layer; Second mask layer is oxidized and the solution removal that is corroded gradually along with the corrosion of the first mask layer, forms the first mask layer sidewall of inclination gradual change; Described second mask layer thickness is 0.5 μm to 5 μm; The single layer oxide of the first mask layer or oxide compound-laminatedly to have from 10
15cm
-3to 10
19cm
-3doping content.
17. manufacture methods as claimed in claim 12, it is characterized in that, in described step e, remove the second mask layer, and by the Graphic transitions of patterned first mask layer on the carborundum of correspondence, be there is by utilization the reactive ion etching mask formation silicon carbide table board structure of the first mask layer as carborundum of the patterning of the sidewall profile of inclination gradual change;
Mesa structure extends to N-shaped ground floor carborundum from the second silicon carbide region, and the second silicon carbide region etches formation on p-type third layer carborundum and p-type the 4th layer of carborundum; Ground floor carborundum makes low doping concentration first silicon carbide region, adulterates from 1 × 10
16cm
-3to 1 × 10
19cm
-3p-type dopant, for providing table top bottom edge end operator guards.
18. manufacture methods as claimed in claim 12, is characterized in that, in described step F, remove the first mask layer, make the window that also patterning the 3rd mask layer has corresponding to p-type first silicon carbide region with formation; P-type first silicon carbide region is formed by the 3rd mask layer implanted with p-type dopant in N-shaped ground floor carborundum of patterning; The concentration of dopant of p-type first silicon carbide region is 10% to 100% of the concentration of dopant of third layer carborundum.
19. manufacture methods as claimed in claim 12, is characterized in that, in described step G, remove the 3rd mask layer and the formation of the surface passivation protective layer of deposited oxide or passivating material; Surface passivation protective layer has the thickness from 0.1 μm to 2 μm; The high annealing that silicon carbide diode is exposed to from 900 DEG C to 1850 DEG C reaches 1-100 minute.
20. manufacture methods as claimed in claim 12, is characterized in that, in described step H, in surface passivation protective layer, form contact window, and form the first electrode by contact window; And form the second electrode on silicon carbide substrates; The metal electrode contact made is being carried out alloying or is being sputtered covering metal layer, for the connection gone between in metal electrode contact under the high temperature of 900 DEG C to 1500 DEG C.
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| CN201410037059.8A CN104810409A (en) | 2014-01-26 | 2014-01-26 | Silicon carbide diode and manufacturing method thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410037059.8A CN104810409A (en) | 2014-01-26 | 2014-01-26 | Silicon carbide diode and manufacturing method thereof |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111129165A (en) * | 2019-12-05 | 2020-05-08 | 中国电子科技集团公司第十三研究所 | Schottky diode and preparation method thereof |
| CN111129164A (en) * | 2019-12-05 | 2020-05-08 | 中国电子科技集团公司第十三研究所 | Schottky diode and preparation method thereof |
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| CN1902760A (en) * | 2003-12-03 | 2007-01-24 | 关西电力株式会社 | Silicon carbide semiconductor device and its manufacturing method |
| WO2007100364A1 (en) * | 2006-02-28 | 2007-09-07 | Cree, Inc. | High power silicon diodes |
| EP2154725A1 (en) * | 2007-04-26 | 2010-02-17 | The Kansai Electric Power Co., Inc. | Silicon carbide zener diode |
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| JP2988589B2 (en) * | 1995-12-14 | 1999-12-13 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Semiconductor device for surface mounting suitable for relatively high voltage and method of manufacturing the same |
| CN1902760A (en) * | 2003-12-03 | 2007-01-24 | 关西电力株式会社 | Silicon carbide semiconductor device and its manufacturing method |
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| CN111129165A (en) * | 2019-12-05 | 2020-05-08 | 中国电子科技集团公司第十三研究所 | Schottky diode and preparation method thereof |
| CN111129164A (en) * | 2019-12-05 | 2020-05-08 | 中国电子科技集团公司第十三研究所 | Schottky diode and preparation method thereof |
| CN111129164B (en) * | 2019-12-05 | 2023-09-26 | 中国电子科技集团公司第十三研究所 | Schottky diode and preparation method thereof |
| CN111129165B (en) * | 2019-12-05 | 2023-11-28 | 中国电子科技集团公司第十三研究所 | Schottky diode and preparation method thereof |
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