CN104809984B - 源极驱动电路、源极驱动装置、显示面板及显示装置 - Google Patents
源极驱动电路、源极驱动装置、显示面板及显示装置 Download PDFInfo
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Abstract
本发明提供一种源极驱动电路、源极驱动装置、显示面板及显示装置,属于显示技术领域,其可解决现有的源极驱动电路功耗大、寿命短的问题。本发明的源极驱动电路包括:第一运算放大器、输出选择单元;其中,第一运算放大器的同相输入端接收模拟量的数据电压信号,反相输入端与其输出端连接,且输出端还与输出选择单元上的数据电压信号输入端连接,用于将模拟量的数据电压信号进行放大;输出选择单元上还具有参考电压信号输入端和选择控制信号输入端,用于在选择控制信号输入端上所输入的选择控制信号的控制下,选择性的将放大后的模拟量的数据电压信号或者参考电压信号输入端所输入的参考电压信号输出给数据线。本发明的源极驱动电路功耗低。
Description
技术领域
本发明属于显示技术领域,具体涉及一种源极驱动电路、源极驱动装置、显示面板及显示装置。
背景技术
有机发光显示器(OLED)相比现在的主流显示技术薄膜晶体管液晶显示器(TFT-LCD),具有广视角、高亮度、高对比度、低能耗、体积更轻薄等优点,是目前平板显示技术关注的焦点。
OLED显示装置通常是由OLED显示面板,以及用于驱动OLED显示面板的***电路组成。其中,OLED显示面板上包括交叉设置的多条栅线和多条数据线,以及设置在交叉位置处的像素单元。***电路包括源极驱动芯片和栅极驱动芯片。具体的,栅极驱动芯片通过栅线为与该栅线连接的像素单元进行扫描,源极驱动芯片通过数据线为与该数据线连接的像素单元充放电。
图1为现有的具有补偿功能源极驱动芯片的内部电路图,该电路包括数模转换器DAC、输出选择单元MUX、运算放大器OP、选择输出选择单元MUX;其中,数模转换器DAC一端接数字量的数据电压信号data,另一端接输出选择单元MUX的数据信号输入端;该数模转换器DAC用于将数字量的数据电压信号data转换成模拟量的数据电压信号,并将该信号传递给输出选择单元MUX;输出选择单元MUX上还具有参考电压输入端,输出选择单元MUX还与选择控制线和运算放大器OP连接,用于在选择控制线上所输入的选择控制信号SEL的控制下,将模拟量的数据电压信号或者参考电压输入端上输入的参考电压输出给运算放大器OP;运算放大器OP用于将输入至其内的电压信号进行放大给数据线DataLine。
发明人发现现有技术中至少存在如下问题:无论是模拟量的数据电压信号还是参考电压输入端上输入的参考电压均要输出给运算放大器OP进行放大,因此造成运算放大器OP功耗较大,将会产生大量的热,从而导致源极驱动芯片的由于温度过高,造成寿命减短。
发明内容
本发明所要解决的技术问题包括,针对现有的源极驱动芯片存在的上述的问题,提供一种功耗小、寿命长的源极驱动电路、源极驱动装置、显示面板及显示装置。
解决本发明技术问题所采用的技术方案是一种源极驱动电路包括:第一运算放大器、输出选择单元;其中,
所述第一运算放大器的同相输入端接收模拟量的数据电压信号,反相输入端连接其输出端,且输出端还与所述输出选择单元上的数据电压信号输入端连接,用于将所述模拟量的数据电压信号进行放大;
所述输出选择单元上还具有参考电压信号输入端和选择控制信号输入端,用于在所述选择控制信号输入端上所输入的选择控制信号的控制下,选择性的将放大后的模拟量的数据电压信号或者所述参考电压信号输入端所输入的参考电压信号输出给数据线。
优选的是,所述源极驱动电路还包括数模转换器;
所述数模转换器的一端接收数字量的数据电压信号,另一端连接所述第一运算放大器的输入端,用于将数字量的数据电压信号转换成模拟量的数据电压信号。
优选的是,所述第一运算放大器包括第一晶体管~第九晶体管,以及存储电容;其中,
所述第一晶体管的第一极连接第二晶体管的第一极,第二极连接第三晶体管的第一极,控制极连接同相输入端;
所述第二晶体管的第一极连接第五晶体管的第二极,第二极连接第四晶体管的第一极,控制极连接反相输入端;
所述第三晶体管的第一极还连接其控制极,第二极连接低电源电压端,控制极还连接第四晶体管的控制极;
所述第四晶体管的第一极还连存储电容的第一端,第二极连接低电源电压端,所述存储电容的第二端连接输出端;
所述第五晶体管的第一极连接高电源电压端,第二极连接第一晶体管和第二晶体管的第一极,控制极连接第八晶体管的控制极;
所述第六晶体管的第一极连接高电源电压端,第二极连接第七晶体管的第一极输出端,控制极连接第五晶体管和第八晶体管的控制极,以及第八晶体管的第二极;
所述第七晶体管的第一极连接存储电容的第二端和输出端,第二极连接低电源电压端,控制极连接存储电容的第一端;
所述第八晶体管的第一极连接高电源电压端,第二极连接第九晶体管的第一极,控制极连接其第二极和第五晶体管的控制极;
第九晶体管的第一极连接第八晶体管的第二极,第二极连接其控制极和低电源电压端。
优选的是,所述输出选择单元包括一个N型晶体管和一个P型晶体管;
所述N型晶体管和P型晶体管中的一者的第一极连接数据电压信号输入端,另一者的第一极连接参考电压信号输入端,两者的第二极连接在一起并与所述源极驱动电路的输出端连接,两者的控制极连接在一起并与选择控制信号输入端连接。
进一步优选的是,所述数模转换器包括:2n个串联在一起的电阻,n为大于等于1的整数,以及多级逻辑开关;
第一级逻辑开关中的每一逻辑开关分别连接在与其对应的电阻的第一端,下一级逻辑开关中的每一个逻辑开关连接其上一级逻辑开关中两个相邻的逻辑开关的输出,且各级逻辑开关中任意两相邻的逻辑开关是采用不同逻辑电平控制的。
解决本发明技术问题所采用的技术方案是一种源极驱动装置包括多个上述的源极驱动电路。
优选的是,所述源极驱动装置还包括第二运算放大器;
所述第二运算放大器的同相输入端连接参考电压信号,反相输入端与其输出端,其输出端还连接输出选择单元的参考电压信号输入端,用于将参考电压信号进行放大,并将放大后的参考电压信号输出给所述输出选择单元的参考电压信号输入端。
进一步优选的是,所述第二运算放大器与所述第一运算放大器的结构相同。
解决本发明技术问题所采用的技术方案是一种显示面板,其包括上述源极驱动装置。
解决本发明技术问题所采用的技术方案是一种显示装置,其包括上述显示面板。
本发明具有如下有益效果:
由于在本发明中的源极驱动电路中,选取合适的参考电压源,以使其输出合适的参考电压信号,其中第一运算放大器仅仅对模拟量的数据电信号进行放大,而无需在对参考电压信号进行放大,故第一运算放大器上所产生的功耗也只是由数据电压信号所带来,故本发明中的第一运算放大器较现有的而言,功耗较小,也就是说产生的热量较少,不会造成源极驱动电路温度过高,导致其寿命下降的问题。同理,本发明的源极驱动装置、显示面板、显示装置均功耗较小,寿命长。
附图说明
图1为现有的源极驱动芯片内部的结构图;
图2为本发明的实施例1的源极驱动电路的结构图;
图3为本发明的实施例1的源极驱动装置的结构图;
图4为本发明的实施例1的源极驱动电路中的第一运算放大器的电路图;
图5为本发明的实施例1的源极驱动电路中的输出选择单元的电路图;
图6为本发明的实施例1的源极驱动电路中的数模转换器的电路图。
其中附图标记为:OP、运算放大器;OP1、第一运算放大器;OP2、第二运算放大器;DAC、数模转换器;MUX、输出选择单元;Vref、参考电压信号;data、数字量的数据电压信号;DataLine、数据线;SEL、选择控制信号。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案,下面结合附图和具体实施方式对本发明作进一步详细描述。
实施例1:
如图2所示,本实施例提供一种源极驱动电路,其包括:第一运算放大器OP1、输出选择单元MUX;其中,所述第一运算放大器OP1的同相输入端接收模拟量的数据电压信号,反相输入端连接其输出端,且输出端还与所述输出选择单元MUX上的数据电压信号输入端连接,用于将所述模拟量的数据电压信号进行放大;所述输出选择单元MUX上还具有参考电压信号Vref输入端和选择控制信号SEL输入端,用于在所述选择控制信号SEL输入端上所输入的选择控制信号SEL的控制下,选择性的将放大后的模拟量的数据电压信号或者所述参考电压信号Vref输入端所输入的参考电压信号Vref输出给数据线DataLine。
由于在本实施例中的源极驱动电路中,选取合适的参考电压源,以使其输出合适的参考电压信号Vref,其中第一运算放大器OP1仅仅对模拟量的数据电信号进行放大,而无需在对参考电压信号Vref进行放大,故第一运算放大器OP1上所产生的功耗也只是由数据电压信号所带来,故本实施例中的第一运算放大器OP1较现有的而言,功耗较小,也就是说产生的热量较少,不会造成源极驱动电路温度过高,导致其寿命下降的问题。
优选的,本实施例的源极驱动电路还包括数模转换器DAC;所述数模转换器DAC的一端接收数字量的数据电压信号data,另一端连接所述第一运算放大器OP1的输入端,用于将数字量的数据电压信号data转换成模拟量的数据电压信号。
具体的,如图4所示,本实施例中的第一运算放大器OP1包括第一晶体管M1~第九晶体管M9,以及存储电容C1;其中,所述第一晶体管M1的第一极连接第二晶体管M2的第一极,第二极连接第三晶体管M3的第一极,控制极连接同相输入端;所述第二晶体管M2的第一极连接第五晶体管M5的第二极,第二极连接第四晶体管M4的第一极,控制极连接反相输入端;所述第三晶体管M3的第一极还连接其控制极,第二极连接低电源电压端,控制极还连接第四晶体管M4的控制极;所述第四晶体管M4的第一极还连存储电容C1的第一端,第二极连接低电源电压端,所述存储电容C1的第二端连接输出端;所述第五晶体管M5的第一极连接高电源电压端,第二极连接第一晶体管M1和第二晶体管M2的第一极,控制极P连接第八晶体管M8的控制极;所述第六晶体管M6的第一极连接高电源电压端,第二极连接第七晶体管M7的第一极输出端,控制极连接第五晶体管M5和第八晶体管M8的控制极,以及第八晶体管M8的第二极;所述第七晶体管M7的第一极连接存储电容C1的第二端和输出端,第二极连接低电源电压端,控制极连接存储电容C1的第一端;所述第八晶体管M8的第一极连接高电源电压端,第二极连接第九晶体管M9的第一极,控制极连接其第二极和第五晶体管M5的控制极;第九晶体管M9的第一极连接第八晶体管M8的第二极,第二极连接其控制极和低电源电压端。
当然,本实施例中的第一运算放大器OP1也不局限于上述结构,也可以是本领域技术人员所公知的其它结构。
如图5所示,本实施例中的输出选择单元MUX包括一个N型晶体管和一个P型晶体管;所述N型晶体管和P型晶体管中的一者的第一极连接数据电压信号输入端,另一者的第一极连接参考电压信号Vref输入端,两者的第二极连接在一起并与其输出端连接,两者的控制极连接在一起并与选择控制信号SEL输入端连接。
具体的,由于N型晶体管和P型晶体管是采用不同的逻辑电平信号进行控制的,因此该可以输出选择单元MUX选择性的输出数据电压信号或者参考电压信号Vref。
如图6所示,本实施例中的数模转换器DAC包括:2n个串联在一起的电阻,n为大于等于1的整数,以及多级逻辑开关;第一级逻辑开关中的每一逻辑开关分别连接在与其对应的电阻的第一端,下一级逻辑开关中的每一个逻辑开关连接其上一级逻辑开关中两个相邻的逻辑开关的输出,且各级逻辑开关中任意两相邻的逻辑开关是采用不同逻辑电平控制的。
需要说明的是,图6中所示的是以n=10为例进行示意的数模转换器DAC,该示意图为本领域技术人员所公知,在此不再详细描述。
当然,本实施例中的数模转换器DAC也不局限于上述结构,也可以是本领域技术人员所公知的其它结构。
需要说明的是,本实施例所提供的源极驱动电路实际上是集成在一个芯片里面的,由于第一运算放大器OP1的功耗降低,此时芯片的热量也会减少,故芯片的寿命更长。
如图3所示,相应的,本实施例还提供一种源极驱动装置,其包括多个上述的源极驱动电路,通过多个源极驱动电路以驱动显示面板上的多根数据线DataLine。
优选的,本实施例的源极驱动装置还包括第二运算放大器;所述第二运算放大器用于将参考电压信号Vref进行放大,并将放大后的参考电压信号Vref输出给所述输出选择单元MUX的参考电压信号Vref输入端。
也就是说,在参考电压信号Vref不足以满足数据线DataLine上的需要时,需要将参考电压信号Vref进行放大。而在本实施例中采用外部增加第二运算放大器的方式,此时并不会造成源极驱动电路的功耗的增加,也就不会影响源极驱动电路的性能。
其中,所述第二运算放大器与所述第一运算放大器OP1的结构相同。在此不再相信描述了。当然也可以与第一运算放大器OP1的结构不同,采用其它型号的运算放大器也是可行的。
相应的,本实施例还提供一种显示面板,其包括上述的源极驱动装置。
相应的,本实施例还提供了一种显示装置,其包括上述显示面板。该显示装置可以为:手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
当然,本实施例的显示装置中还可以包括其他常规结构,如电源单元、显示驱动单元等。
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。
Claims (10)
1.一种源极驱动电路,其特征在于,所述源极驱动电路包括:第一运算放大器、输出选择单元;其中,
所述第一运算放大器的同相输入端接收模拟量的数据电压信号,反相输入端连接其输出端,且输出端还与所述输出选择单元上的数据电压信号输入端连接,用于将所述模拟量的数据电压信号进行放大;
所述输出选择单元上还具有参考电压信号输入端和选择控制信号输入端,用于在所述选择控制信号输入端上所输入的选择控制信号的控制下,选择性的将放大后的模拟量的数据电压信号或者所述参考电压信号输入端所输入的参考电压信号输出给数据线。
2.根据权利要求1所述的源极驱动电路,其特征在于,所述源极驱动电路还包括数模转换器;
所述数模转换器的一端接收数字量的数据电压信号,另一端连接所述第一运算放大器的同相输入端,用于将数字量的数据电压信号转换成模拟量的数据电压信号。
3.根据权利要求1或2所述的源极驱动电路,其特征在于,所述第一运算放大器包括第一晶体管~第九晶体管,以及存储电容;其中,
所述第一晶体管的第一极连接第二晶体管的第一极,第二极连接第三晶体管的第一极,控制极连接同相输入端;
所述第二晶体管的第一极连接第五晶体管的第二极,第二极连接第四晶体管的第一极,控制极连接反相输入端;
所述第三晶体管的第一极还连接其控制极,第二极连接低电源电压端,控制极还连接第四晶体管的控制极;
所述第四晶体管的第一极还连存储电容的第一端,第二极连接低电源电压端,所述存储电容的第二端连接输出端;
所述第五晶体管的第一极连接高电源电压端,第二极连接第一晶体管和第二晶体管的第一极,控制极连接第八晶体管的控制极;
所述第六晶体管的第一极连接高电源电压端,第二极连接第七晶体管的第一极输出端,控制极连接第五晶体管和第八晶体管的控制极,以及第八晶体管的第二极;
所述第七晶体管的第一极连接存储电容的第二端和输出端,第二极连接低电源电压端,控制极连接存储电容的第一端;
所述第八晶体管的第一极连接高电源电压端,第二极连接第九晶体管的第一极,控制极连接其第二极和第五晶体管的控制极;
第九晶体管的第一极连接第八晶体管的第二极,第二极连接其控制极和低电源电压端。
4.根据权利要求1或2所述的源极驱动电路,其特征在于,所述输出选择单元包括一个N型晶体管和一个P型晶体管;
所述N型晶体管和P型晶体管中的一者的第一极连接数据电压信号输入端,另一者的第一极连接参考电压信号输入端,两者的第二极连接在一起并与所述源极驱动电路的输出端连接,两者的控制极连接在一起并与选择控制信号输入端连接。
5.根据权利要求2所述的源极驱动电路,其特征在于,所述数模转换器包括:2n个串联在一起的电阻,n为大于等于1的整数,以及多级逻辑开关;
第一级逻辑开关中的每一逻辑开关分别连接在与其对应的电阻的第一端,下一级逻辑开关中的每一个逻辑开关连接其上一级逻辑开关中两个相邻的逻辑开关的输出,且各级逻辑开关中任意两相邻的逻辑开关是采用不同逻辑电平控制的。
6.一种源极驱动装置,其特征在于,所述源极驱动装置包括多个权利要求1-5中任一项所述的源极驱动电路。
7.根据权利要求6所述的源极驱动装置,其特征在于,所述源极驱动装置还包括第二运算放大器;
所述第二运算放大器的同相输入端连接参考电压信号,反相输入端与其输出端连接,其输出端还连接输出选择单元的参考电压信号输入端,用于将参考电压信号进行放大,并将放大后的参考电压信号输出给所述输出选择单元的参考电压信号输入端。
8.根据权利要求7所述的源极驱动装置,其特征在于,所述第二运算放大器与所述第一运算放大器的结构相同。
9.一种显示面板,其特征在于,所述显示面板包括权利要求6-8中任一项所述的源极驱动装置。
10.一种显示装置,其特征在于,所述显示装置包括权利要求9所述的显示面板。
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JP2014182345A (ja) | 2013-03-21 | 2014-09-29 | Sony Corp | 階調電圧発生回路及び表示装置 |
JP2014182346A (ja) * | 2013-03-21 | 2014-09-29 | Sony Corp | 階調電圧発生回路及び表示装置 |
CN104809984B (zh) * | 2015-05-15 | 2016-04-06 | 京东方科技集团股份有限公司 | 源极驱动电路、源极驱动装置、显示面板及显示装置 |
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US20170287405A1 (en) | 2017-10-05 |
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