CN104793189A - FPGA (field programmable gate array) based digital intermediate frequency coherent marine radar receiving and processing system - Google Patents
FPGA (field programmable gate array) based digital intermediate frequency coherent marine radar receiving and processing system Download PDFInfo
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- CN104793189A CN104793189A CN201510187166.3A CN201510187166A CN104793189A CN 104793189 A CN104793189 A CN 104793189A CN 201510187166 A CN201510187166 A CN 201510187166A CN 104793189 A CN104793189 A CN 104793189A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/28—Details of pulse systems
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Abstract
The invention relates to the field of radar engineering and a radar system of intermediate frequency coherent, in particular to an FPGA (field programmable gate array) based digital intermediate frequency coherent marine radar receiving and processing system. The system comprises an intermediate frequency amplifier module connected with the output end of a receiver radio-frequency front-end, and is characterized by further comprising an A/D (analog/digital) sampling chip and an under-digital frequency conversion module, the under-digital frequency conversion module comprises digital-controlled oscillator, a low-pass filter and a digital decimation filter which are based on FPGA and are arranged in sequence; intermediate frequency power signals outputted by the receiver radio-frequency front-end are converted into voltage signals via the intermediate frequency amplifier module and then transmitted to the A/D sampling chip, and the voltage signals are acquired and transmitted to the under-digital frequency conversion module. The system is simple in structure and high in flexibility, image-frequency rejection ratio of I/Q signals is increased as compared with I/Q baseband signals respectively acquired with a simulation conversion method, and the system has the advantages of low drift, low distortion and the like, and useful information in return signals can be extracted to the greatest extent to be used for subsequent radar signal processing operations.
Description
Technical field
The present invention relates to radar engineering field, be related specifically to the radar system of intermediate frequency coherent, specifically a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA.
Background technology
marine radar is a kind of traditional radio navigation aids, in location, boats and ships coastal waters, guides boats and ships into and out of port, narrow Fairway navigation and playing a role in collision prevention.Nowadays marine radar not only may be used for marine navigation, can also be used for harbour management and ocean remote sensing etc.At present, domestic and international marine radar mostly adopts non-coherent pulse system, stable not owing to adopting magnetron oscillator to produce radio-frequency pulse frequency, interpulse phase place random variation, therefore the simulation method of reseptance of main flow cannot utilize frequency information in echo and phase information, just in base band to utilizing the amplitude of echo to carry out target detection after echo envelope detection, greatly constrain the further raising of detectability to target and tracking performance.The application of coherent radar can solve this kind of problem well, and the main difference of itself and non-coherent radar is just that coherent radar can carry out the extraction of doppler information.Coherent system is divided into full coherent system and intermediate frequency coherent system, and intermediate frequency coherent radar has the higher and more reasonably ratio of performance to price than full phase parameter radar.Further, nowadays the ocean remote sensing purposes of marine radar is more and more important, requires higher for antenna rotation rate during ocean remote sensing, and the receiving system dirigibility of simulation is low, and processing speed does not reach requirement, and digitised Intermediate Frequency coherent receiving processing system becomes inexorable trend.
Along with the develop rapidly of digital signal processing chip technology, although algorithm can be general, its stability and speed also do not reach industrial requirement.Under the background that the switching rate of current high-speed a/d change-over circuit is more and more higher, the processing speed of digitized radar receiver to digital signal processor is had higher requirement.Traditional common DSP due to its processing speed limited, often directly cannot process the high-speed data-flow that A/D chip produces if signal sampling, and the intermediate frequency coherent receiving system that develops into of FPGA provides technology place mat, FPGA is configurable, able to programme, the function such as digital controlled oscillator, low-pass filter can be realized easily, the dirigibility of system can be improved better.Digitised Intermediate Frequency receiving system based on FPGA design also meets the basic thought of software radio, substantially increases the reliability of Radar Signal Processing part below.
In radar mean frequency receiving system, retrieve relevant patent to have: patent of invention [1] (a kind of Universal type digital intermediate frequency receiver, application number: 201210507125.4, inventor: make friends with peak), describe a kind of digital if receiver with hyperchannel flexible combination and parallel processing structure, make full use of ASIC, the advantage of DSP and FPGA associated treatment and multi-channel parallel process, both channel reception flexibly can be used as, total probability can be used as again receive, versatility is good, the scope of application is wide, can be applicable to radar, communication, multiple field such as observing and controlling.But processing module chip is more, structure is comparatively complicated, makes with the system of whole radar compact not; Utility model patent [2] (ship-navigation radar great dynamic range if digitization module, application number: 201320044573.5, inventor: Ge Junxiang, Pan An, Lu Jianbin etc.), describe a kind of ship-navigation radar great dynamic range if digitization module, by the mode of integrated circuit by partly integrated in same module to intermediate frequency amplification, digital sample etc., system is more succinct.But be directly defeated by FPGA for signal transacting by interface after collection Received signal strength, the amplitude information of signal can only be extracted and phase information cannot be extracted, determine the doppler information that this radar cannot make full use of echoed signal; (a kind of radar receives digital coherent disposal system to patent of invention [3], application number: 201310024773.9, inventor: Xu Hongchun, king go forward one by one), describe a kind of radar and receive digital coherent disposal system, take intermediate frequency direct digitization, by launching main ripple sample signal and intermediate frequency echo digital signal carries out convolution algorithm, eliminating the first phase that transmits, frequency is unstable, amplitude is unstable impact, realizing the steady phase of digital frequency stabilization, adaptive frequency compensation, receiving coherent processing.But twin-channel pattern will ensure that clock synchronous, i/q signal amplitude-phase are consistent relatively complicated.
Summary of the invention
Technical purpose of the present invention is to overcome the problems referred to above, provides a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA of simple possible.Just be that coherent radar can carry out the extraction of doppler information with the main difference of non-coherent radar, this marine radar can be made in addition for ocean remote sensing.Main demodulation work all realizes in digit chip, structure is simple, implement facilitate feasible, and the dirigibility of system is high, compared with obtaining I/Q baseband signal respectively with analog converting method, improve the image-frequency rejection ratio of i/q signal, there is the series of advantages such as low drifting, low distortion, and the Radar Signal Processing of the useful information in echoed signal in the later stage can be extracted to greatest extent operate.And whole system exploitation is effectively simple, be easy to realize.
To achieve these goals, the technical solution adopted in the present invention is: a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, comprise the intermediate frequency amplification module be connected with the output terminal of receiver rf front-end, it is characterized in that, also comprise A/D sampling A/D chip, Digital Down Converter Module, described Digital Down Converter Module comprises the digital controlled oscillator based on FPGA, low-pass filter and the decimation filter of digital that sequentially arrange; The EF power signal that receiver rf front-end exports changes the voltage signal of-1.7V ~+1.7V into through intermediate frequency amplification module, be delivered to A/D sampling A/D chip again, A/D sampling A/D chip flows to Digital Down Converter Module after gathering voltage signal according to the sampling control signal that the time schedule controller based on FPGA exports.
Aforesaid a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, described intermediate frequency amplification module comprises the logarithmic amplifier and level adjusting circuit that sequentially arrange.
Aforesaid a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, described digital controlled oscillator designs based on FPGA application hardware descriptive language verilog, adopt loop up table, comprise frequency control word register, 32 phase accumulators, phase control word register, 16 bit address generators, waveform generator ROM five parts; Under the triggering of input clock, with described frequency control word for step value, be used for depositing with phase control word register 32 phase values representing frequency and send in totalizer that to adopt the totalizer of Altera to carry out phase-accumulated, with the address of this accumulated value as storage list in the lump; Waveform generator ROM is read-only sine and cosine look-up table, and the sine and cosine assignment reading corresponding address exports, and output frequency is controlled by the input of frequency control word.
Aforesaid a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, described decimation filter of digital is the cascading filter designed based on FPGA application hardware descriptive language verilog, the first order of cascading filter adopts 5 times of cic filters extracted, and cic filter can bring logical band attenuation, therefore using compensation wave filter makes the planarization of cic filter passband, namely after cic filter, add that FIR filter carries out passband compensation, improve the overall performance of digital filter, therefore after cic filter reduces signal sampling frequency, the second level adopts 4 times of FIR filter extracted, the third level adopts 2 times of FIR filter extracted to carry out filtering process, improve resource utilization.
Aforesaid a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, the PLL core inside of FPGA carries out clock division process and produces 80MHz output clock being supplied to A/D sampling A/D chip as sample frequency.
Aforesaid a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, described A/D sampling A/D chip carries out the A/D sampling of 16 to voltage signal.
Compared with prior art, tool of the present invention has the following advantages:
1. in system intermediate frequency amplifier section by put plate and ADC chip separately, PCB only have in analog and not digitally, can noise be reduced.
2. on the basis of spot ship navar, carry out the improvement of digital received, processing speed is fast compared with simulation reception, precision is high, makes this marine radar also can adapt to the intermediate frequency process requirement of ocean remote sensing.
3. analog-to-digital conversion module utilizes FPGA control ADC chip to export sampled signal and produces sample frequency with the inner PLL core of FPGA, and this method is simply effective, is easy to realize.
4. replace traditional DSP to realize intermediate frequency coherent receiving processing system with FPGA, can avoid its processing speed of traditional common DSP limited, directly cannot process the defect of A/D chip to the high-speed data-flow that if signal sampling produces; FPGA, as the main control chip of whole radar system, both may be used for signal transacting, also may be used for the control of complete machine sequential and transmitter, especially the core control portions of servo-drive system, made the design of whole radar system compacter.
5. adopt the IP kernel in FPGA to realize the function such as digital mixer, low-pass filter, stable performance, dirigibility and portability by force, also can reduce design cost, save debug time.
Accompanying drawing explanation
Fig. 1 is the general frame of the marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA.
Fig. 2 is analog to digital conversion control module (ADC) block diagram.
Fig. 3 is digital controlled oscillator (NCO) module frame chart based on look-up table.
Fig. 4 is digital decimation module frame chart.
Embodiment
The technical scheme realized for making the present invention, technical characteristic, reaching object and effect is easy to understand, below in conjunction with embodiment, setting forth the present invention further.
Marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA comprises intermediate frequency amplification module and Digital Down Converter Module two parts.Intermediate frequency amplifier section comprise 60MHz intermediate-freuqncy signal that receiver front end exports through in put the change in voltage that the EF power signal of great dynamic range changes into-1.7V ~+1.7V by plate and deliver to 16 ADC chips (i.e. A/D sampling A/D chip) analog input end, be directly defeated by FPGA by interface after the sampling control signal collection Received signal strength that ADC chip exports according to time schedule controller.Wherein A/D change-over circuit (i.e. ADC chip) is embedded in fpga chip; Digital Down Convert part comprises the realization based on the digital controlled oscillator of FPGA, digital filter and digital decimation.Namely digital controlled oscillator utilizes based on look-up table and calculates sine and cosine assignment and realize two-way orthogonal signal carry out mixing stored in ROM table, digital filter and extract the IP kernel called in FPGA and realize.
As shown in Figure 1.Electromagnetic wave is gone out with the beam transmission of design by radar antenna, and the electromagnetic wave that receiving target reflects, the faint high frequency echo signal that antenna receives by receiver chooses from Noise and Interference, the 60MHz intermediate-freuqncy signal that receiver front end (i.e. receiver rf front-end) exports realizes after the process such as the envelope detection of echoed signal and amplification after intermediate frequency amplification module, after A/D sampling A/D chip carries out bandpass sampling according to sampling control signal, the Received signal strength of collection is directly defeated by FPGA by interface and is used for Digital Down Convert process, the I that final generation 16 is orthogonal, the digital signal processing operation further later of Q two paths of signals.Wherein, the baseband signal in figure refers to the raw digital signal obtained after digitised Intermediate Frequency coherent receiving processing system, this signal non-modulated.
As shown in Figure 2.Carry out clock division process by the PLL core inside in FPGA, produce 80MHz output clock and be supplied to ADC chip as sample frequency, and provide sampling control signal, the voltage signal after being amplified by intermediate frequency carries out the A/D sampling of 16.
As shown in Figure 3.The design of native system digital controlled oscillator comprises frequency control word register, 32 phase accumulators, phase control word register, 16 bit address generators, Wave data etc.Frequency control word is that step-length is carried out phase-accumulated, and with the address of this accumulated value as storage list, the assignment reading corresponding address in sine and cosine table exports, and controls output frequency by the input of frequency control word.
As shown in Figure 4.Filtering extraction is exactly the process that filtering high-frequency information can not cause spectral aliasing with inch reduction sampling rate from signal.Adopt cic filter can save many multipliers in the first order of cascading filter can realize high data transfer rate input simultaneously, select 5 times of extractions.Use two-stage FIR filter below, realize 4 times and 2 times of extractions respectively.
More than show and describe ultimate principle of the present invention, principal character and advantage of the present invention.The technician of the industry should understand; the present invention is not restricted to the described embodiments; what describe in above-described embodiment and instructions just illustrates principle of the present invention; without departing from the spirit and scope of the present invention; the present invention also has various changes and modifications, and these changes and improvements all fall in the claimed scope of the invention.Application claims protection domain is defined by appending claims and equivalent thereof.
Claims (7)
1. the marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, comprise the intermediate frequency amplification module be connected with the output terminal of receiver rf front-end, it is characterized in that, also comprise A/D sampling A/D chip, Digital Down Converter Module, described Digital Down Converter Module comprises the digital controlled oscillator based on FPGA, low-pass filter and the decimation filter of digital that sequentially arrange; The EF power signal that receiver rf front-end exports changes the voltage signal of-1.7V ~+1.7V into through intermediate frequency amplification module, be delivered to A/D sampling A/D chip again, A/D sampling A/D chip flows to Digital Down Converter Module after gathering voltage signal according to the sampling control signal that the time schedule controller based on FPGA exports.
2. a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA according to claim 1, it is characterized in that, namely digital controlled oscillator utilizes the sine and cosine assignment calculated to realize the mixing of two-way I, Q orthogonal signal stored in ROM table based on look-up table, the IP kernel that low-pass filter and decimation filter of digital call in FPGA realizes.
3. a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA according to claim 1, it is characterized in that, described intermediate frequency amplification module comprises the logarithmic amplifier and level adjusting circuit that sequentially arrange.
4. a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA according to claim 1-3 any one, it is characterized in that, described digital controlled oscillator designs based on FPGA application hardware descriptive language verilog, adopt loop up table, comprise frequency control word register, 32 phase accumulators, phase control word register, 16 bit address generators, waveform generator ROM five parts; Under the triggering of input clock, with described frequency control word for step value, be used for depositing with phase control word register 32 phase values representing frequency and send in totalizer that to adopt the totalizer of Altera to carry out phase-accumulated, with the address of this accumulated value as storage list in the lump; Waveform generator ROM is read-only sine and cosine look-up table, and the sine and cosine assignment reading corresponding address exports, and output frequency is controlled by the input of frequency control word.
5. a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA according to claim 1-3 any one, it is characterized in that, described decimation filter of digital is the cascading filter designed based on FPGA application hardware descriptive language verilog, the first order of cascading filter adopts 5 times of cic filters extracted, the second level adopts 4 times of FIR filter extracted, and the third level adopts 2 times of FIR filter extracted.
6. a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA according to claim 1 and 2, it is characterized in that, the PLL core inside of FPGA carries out clock division process and produces 80MHz output clock being supplied to A/D sampling A/D chip as sample frequency.
7. a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA according to claim 1, is characterized in that, described A/D sampling A/D chip carries out the A/D sampling of 16 to voltage signal.
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| CN105553487A (en) * | 2015-12-10 | 2016-05-04 | 中国航空工业集团公司西安航空计算技术研究所 | Software radio-based airborne navigation and communication processing module |
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