CN104735053A - Multi-CPU control system based on SPI bus and MODBUS communication protocol - Google Patents
Multi-CPU control system based on SPI bus and MODBUS communication protocol Download PDFInfo
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- CN104735053A CN104735053A CN201510043866.5A CN201510043866A CN104735053A CN 104735053 A CN104735053 A CN 104735053A CN 201510043866 A CN201510043866 A CN 201510043866A CN 104735053 A CN104735053 A CN 104735053A
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Abstract
The invention discloses a multi-CPU control system based on an SPI bus and an MODBUS communication protocol. The system comprises a main control board and one to eight sub control boards, wherein the main control board and the sub control boards are connected through the SPI bus; the main control board is further connected with each sub control board through an input control line and an output control line; the main control board comprises a 512K 16-bit register used for storage of a data structure of an MODBUS point table; the data structure of the MODBUS point table comprises eight sub board card information areas; each sub board card information area comprises a basic data area and a user data area comprising different addresses; each sub control board is provided with a basic datum and a user datum corresponding to the type of the sub control board; the main control board and the sub control boards adopt the same series of chips as core chips; the communication rate of the multi-CPU control system is 9 MBYIE/S. The MODBUS communication protocol is used in the SPI bus, the data correctness is greatly improved, and the communication mode is high in practicability.
Description
Technical field
The present invention relates to the mechanics of communication of multi-chip, more particularly, relate to a kind of multi-CPU control system based on spi bus and MODBUS communications protocol.
Background technology
At present, in the use procedure of multi-chip communication, mostly RS485, CAN communication etc. is adopted.Spi bus is used in special storage chip or I/O port expansion etc. mostly, between multi-CPU, spi bus does not have substantially with MODBUS communication.And adopting RS485, CAN communication cost compare high, speed does not have spi bus block, is used in real time response speed in data acquisition system inadequate.
Summary of the invention
For the defect existed in prior art, the object of this invention is to provide a kind of multi-CPU control system based on spi bus and MODBUS communications protocol.
For achieving the above object, the present invention adopts following technical scheme:
A kind of multi-CPU control system based on spi bus and MODBUS communications protocol, comprise master control borad and 1-8 sub-control board, be connected by spi bus between described master control borad with described sub-control board, wherein master control borad is also connected with every sub-control board respectively by an input control line and an output control line;
Described master control borad comprises the register of 16 of 512K, for depositing the data structure of MODBUS point table; The data structure of described MODBUS point table comprises 8 daughter card information areas, and each daughter card information area includes the elementary data area and a user data area that comprise different address;
Have a master data corresponding with this control board type and user data in described every sub-control board respectively, described user data is divided into 4 districts;
It is its acp chip that described master control borad and sub-control board all adopt with a series of chip;
Communication speed between described multi-CPU control system reaches 9MBYTE/S.
Described is acp chip with a series of chip employing STM32F103.
The type of described sub-control board is network board, input and output board, RS232-485 board or ARCNET network board.
Compared with background technology, the beneficial effect that the present invention has is:
By using MODBUS communications protocol in spi bus, data correctness improves greatly, and speed uses 9MBYTE/S speed on the CPU of dominant frequency 72M to also have the rising space now, and this kind of communication modes practicality is very strong.
Accompanying drawing explanation
Fig. 1 is the principle schematic of embodiments of the invention;
Fig. 2 is master control borad SPI communicating circuit figure of the present invention;
Fig. 3 is sub-control board SPI communicating circuit figure of the present invention;
Fig. 4 is the data structure schematic diagram of MODBUS communications protocol in master control borad of the present invention and sub-control board;
Fig. 5 is sub-control board MODBUS process chart of the present invention.
Embodiment
Technical scheme of the present invention is further illustrated below in conjunction with drawings and Examples.
Refer to a kind of multi-CPU control system based on spi bus and MODBUS communications protocol shown in Fig. 1, comprise master control borad (i.e. CPU module) and 1-8 the sub-control board of master control side, be connected by spi bus between master control borad with sub-control board, wherein master control borad is also connected with every sub-control board respectively by an input control line and an output control line;
Master control borad comprises the register of 16 of 512K, for depositing the data structure of MODBUS point table; The data structure of described MODBUS point table comprises 8 daughter card information areas, and each daughter card information area includes the elementary data area and a user data area that comprise different address;
Have a master data corresponding with this control board type and user data in every sub-control board respectively, described user data is divided into 4 districts;
It is its acp chip that master control borad and sub-control board all adopt with a series of chip;
Communication speed between multi-CPU control system reaches 9MBYTE/S.
Seen by Fig. 1, the CPU board card of master control side is made up of several module substantially, mainly contains and devises mass data storage chip I S61LV51216AL-10TL, has the RAM of 512K16 position, for depositing the data structure of MODBUS point table; Adopt the 23LCV51264K of MICROCHIP company with the storage chip of power-off protection function, preserve real-time warning and yield data; Use CANUART extension facility.
The major function of CPU module is, in equipment, available spi bus and each functional module carry out exchanges data, collect the real time data in each module, specifically as shown in Figure 2.
From the SPI schematic diagram of board
Collector in FIG there are 7 slots, except CPU, power supply board be must except, other 5 slots can at least following board: the use of network board, input and output board, RS232-485 board, ARCNET network board, wherein network board will take 2 addresses, because there are 2 network interfaces.Its circuit diagram as shown in Figure 3.
Data structure
CPU module is the core of whole control system, and it, by base plate spi bus and 16 IO control lines, is collected the data message of other module acquires, be stored into the MODBUS register area that Fig. 4 defines.Object is exactly by the information of daughter card each in bus, uses MODBUS communications protocol, collects in data structure as shown in Figure 4.
The MODBUS of other each sub-control board is allocated as follows: (all explaining with an example)
1) GD module (i.e. network board)
● master data table
User data table
2) serial communication plate module
● master data table
● user data table
3) input/output module
● master data table
Composition graphs 5 is visible again, the data in the present invention CPU that has been Appropriate application, and coordinated in communication each other, reaches the communication speed of 9M/S, successfully by MODBUS protocol application in SPI communication.
Those of ordinary skill in the art will be appreciated that, above embodiment is only used to object of the present invention is described, and be not used as limitation of the invention, as long as in essential scope of the present invention, the change of the above embodiment, modification all will be dropped in the scope of claim of the present invention.
Claims (3)
1., based on a multi-CPU control system for spi bus and MODBUS communications protocol, it is characterized in that,
Comprise master control borad and 1-8 sub-control board, be connected between described master control borad with described sub-control board by spi bus, wherein master control borad is also connected with every sub-control board respectively by an input control line and an output control line;
Described master control borad comprises the register of 16 of 512K, for depositing the data structure of MODBUS point table; The data structure of described MODBUS point table comprises 8 daughter card information areas, and each daughter card information area includes the elementary data area and a user data area that comprise different address;
Have a master data corresponding with this control board type and user data in described every sub-control board respectively, described user data is divided into 4 districts;
It is its acp chip that described master control borad and sub-control board all adopt with a series of chip;
Communication speed between described multi-CPU control system reaches 9MBYTE/S.
2. multi-CPU control system according to claim 1, is characterized in that:
Described is acp chip with a series of chip employing STM32F103.
3. multi-CPU control system according to claim 1, is characterized in that:
The type of described sub-control board is network board, input and output board, RS232-485 board or ARCNET network board.
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Cited By (1)
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CN110691021A (en) * | 2015-09-03 | 2020-01-14 | 阿尔特拉公司 | Distributed multi-chip protocol application interface |
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CN103218005A (en) * | 2012-08-21 | 2013-07-24 | 湖北立锐机电有限公司 | Intelligent power plate based on microcomputer |
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CN110691021A (en) * | 2015-09-03 | 2020-01-14 | 阿尔特拉公司 | Distributed multi-chip protocol application interface |
CN110691021B (en) * | 2015-09-03 | 2022-02-15 | 阿尔特拉公司 | Distributed multi-chip protocol application interface |
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