CN104717827A - 印刷电路板 - Google Patents

印刷电路板 Download PDF

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Publication number
CN104717827A
CN104717827A CN201310668710.7A CN201310668710A CN104717827A CN 104717827 A CN104717827 A CN 104717827A CN 201310668710 A CN201310668710 A CN 201310668710A CN 104717827 A CN104717827 A CN 104717827A
Authority
CN
China
Prior art keywords
signal
layer
circuit board
printed circuit
pcb
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201310668710.7A
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English (en)
Inventor
闵念
周厚原
陈兵
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hongfujin Precision Industry Wuhan Co Ltd
Hon Hai Precision Industry Co Ltd
Original Assignee
Hongfujin Precision Industry Wuhan Co Ltd
Hon Hai Precision Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hongfujin Precision Industry Wuhan Co Ltd, Hon Hai Precision Industry Co Ltd filed Critical Hongfujin Precision Industry Wuhan Co Ltd
Priority to CN201310668710.7A priority Critical patent/CN104717827A/zh
Priority to TW102148097A priority patent/TW201531192A/zh
Priority to US14/540,151 priority patent/US20150163910A1/en
Publication of CN104717827A publication Critical patent/CN104717827A/zh
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • H05K1/116Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/025Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0251Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0302Properties and characteristics in general
    • H05K2201/0305Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

一种印刷电路板,包括一位于顶层的第一信号层、一位于底层的第二信号层、一位于第一与第二信号层之间的第三信号层、一位于第二与第三信号层之间的接地层、一位于第一信号层上的第一信号线、一位于所述第三信号层上的第二信号线以及一信号连通柱,所述信号连通柱贯穿整个印刷电路板且与第一及第二信号线均相连,所述信号连通柱在所述印刷电路板的第一信号层及第二信号层上均设有一圆环状焊锡,所述接地层与所述信号连通柱的距离大于所述焊锡外径与内径之差。上述印刷电路板通过所述信号连通柱在底层焊锡的大小设置与底层邻近的接地层与信号连通柱的距离,消除电容效应对信号的影响从而提升传输信号的质量。

Description

印刷电路板
技术领域
本发明涉及一种印刷电路板。
背景技术
多层印刷电路板中,不同板层之间的信号传输通常采用一种导电性的连通柱(via)连接不同板层上的信号线。然而,上述连通柱在实际使用时,仅有顶端的一小段被实际用来传输信号,其设置在印刷电路板底层上连通柱的焊锡与邻近的接地层之间形成电容效应,从而影响传输信号的质量。
发明内容
鉴于以上内容,有必要提供一种提升传输信号的质量的印刷电路板。
一种印刷电路板,包括一位于顶层的第一信号层、一位于底层的第二信号层、一位于第一与第二信号层之间的第三信号层、一位于第二与第三信号层之间的接地层、一位于第一信号层上的第一信号线、一位于所述第三信号层上的第二信号线以及一信号连通柱,所述信号连通柱贯穿整个印刷电路板且与第一及第二信号线均相连,所述信号连通柱在所述印刷电路板的第一信号层及第二信号层上均设有一圆环状焊锡,所述接地层与所述信号连通柱的距离远大于所述焊锡外径与内径之差以使得所述信号连通柱在所述第二信号层上的焊锡与所述接地层之间不存在电容效应。
上述印刷电路板通过所述信号连通柱在底层焊锡的大小设置与底层邻近的接地层与信号连通柱的距离,消除电容效应对信号的影响从而提升传输信号的质量。
附图说明
图1是本发明印刷电路板较佳实施方式的示意图。
图2是本发明印刷电路板较佳实施方式的俯视图。
图3是图1中印刷电路板及现有印刷电路板上的信号传输的输入损耗仿真模拟图。
主要元件符号说明
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
下面结合附图及较佳实施方式对本发明作进一步详细描述:
请参考图1,本发明印刷电路板为一多层板,其较佳实施方式包括一第一信号层10、一第二信号层12、一第三信号层15、一第一接地层16a、一第二接地层16b及一信号连通柱18。所述第一信号层10上设置一信号线100,所述第三信号层15上设置一信号线150。其他实施方式中,所述印刷电路板还包括若干其他层。
所述第一信号层10及第二信号层12分别位于印刷电路板的顶层与底层,所述第一及第二接地层16a、16b位于顶层与底层之间且所述第二接地层16b邻近所述第二信号层12,所述第三信号层15则位于所述第一及第二接地层16a、16b之间。
请一并参考图2,所述信号连通柱18贯穿整个印刷电路板且在所述印刷电路板第一信号层10及第二信号层12上设有一圆环状焊锡11,所述第二接地层16b距离所述信号连通柱18的距离m远大于所述焊锡11外径与内径之差n以使得所述信号连通柱18在所述第二信号层12上的焊锡11与所述第二接地层16b之间不存在电容效应。所述信号线100的一端用于与一电子元件(图未示)相连,另一端与所述信号连通柱18相连。所述信号线150的一端与所述信号连通柱18相连,另一端与另一电子元件(图未示)相连。所述信号连通柱18用于将信号线100上的信号传输至信号线150。
此时,当信号连通柱18将信号线100上的信号传输至信号线150时,由于所述信号连通柱18在所述第二信号层12上的焊锡11与所述第二接地层16b之间不存在电容效应,减少了对信号的影响,从而提升传输信号的质量。
请参考图3,其为现有印刷电路板及本发明较佳实施方式中印刷电路板上的信号传输的输入损耗仿真模拟图,其中曲线A为现有印刷电路板中邻近底层的接地层与信号连通柱在底层的焊锡之间存在电容效应时信号传输的输入损耗仿真模拟曲线,曲线B为本发明印刷电路板中邻近底层的接地层与信号连通柱在底层的焊锡之间不存在电容效应时信号传输的输入损耗仿真模拟曲线。在输入损耗仿真模拟图中,横坐标表示信号频率,纵坐标表示输入损耗。
从图3中可以看出,整体而言,本发明印刷电路板上信号传输的输入损耗相对于现有印刷电路板上信号传输的输入损耗均有显著的改善。特别是在信号频率是20GHz,输入损耗有明显降低。
上述印刷电路板通过所述信号连通柱在底层焊锡的大小设置与底层邻近的接地层与信号连通柱的距离,消除电容效应对信号的影响从而提升传输信号的质量。

Claims (1)

1.一种印刷电路板,包括一位于顶层的第一信号层、一位于底层的第二信号层、一位于第一与第二信号层之间的第三信号层、一位于第二与第三信号层之间的接地层、一位于第一信号层上的第一信号线、一位于所述第三信号层上的第二信号线以及一信号连通柱,所述信号连通柱贯穿整个印刷电路板且与第一及第二信号线均相连,所述信号连通柱在所述印刷电路板的第一信号层及第二信号层上均设有一圆环状焊锡,所述接地层与所述信号连通柱的距离远大于所述焊锡外径与内径之差以使得所述信号连通柱在所述第二信号层上的焊锡与所述接地层之间不存在电容效应。
CN201310668710.7A 2013-12-11 2013-12-11 印刷电路板 Pending CN104717827A (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201310668710.7A CN104717827A (zh) 2013-12-11 2013-12-11 印刷电路板
TW102148097A TW201531192A (zh) 2013-12-11 2013-12-25 印刷電路板
US14/540,151 US20150163910A1 (en) 2013-12-11 2014-11-13 Printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310668710.7A CN104717827A (zh) 2013-12-11 2013-12-11 印刷电路板

Publications (1)

Publication Number Publication Date
CN104717827A true CN104717827A (zh) 2015-06-17

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Country Status (3)

Country Link
US (1) US20150163910A1 (zh)
CN (1) CN104717827A (zh)
TW (1) TW201531192A (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109803482A (zh) * 2017-11-17 2019-05-24 英业达科技有限公司 多层印刷电路板及制作多层印刷电路板的方法
WO2020073857A1 (zh) * 2018-10-12 2020-04-16 中兴通讯股份有限公司 过孔反焊盘形状的确定方法及印刷电路板

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113727511A (zh) * 2020-05-26 2021-11-30 嘉联益电子(昆山)有限公司 柔性电路板

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5672911A (en) * 1996-05-30 1997-09-30 Lsi Logic Corporation Apparatus to decouple core circuits power supply from input-output circuits power supply in a semiconductor device package
US20020022110A1 (en) * 2000-06-19 2002-02-21 Barr Alexander W. Printed circuit board having inductive vias
US20080121421A1 (en) * 2006-11-24 2008-05-29 Nec Corporation Printed circuit board
CN101677487A (zh) * 2008-09-18 2010-03-24 日本电气株式会社 印刷布线基板及其制造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5672911A (en) * 1996-05-30 1997-09-30 Lsi Logic Corporation Apparatus to decouple core circuits power supply from input-output circuits power supply in a semiconductor device package
US20020022110A1 (en) * 2000-06-19 2002-02-21 Barr Alexander W. Printed circuit board having inductive vias
US20080121421A1 (en) * 2006-11-24 2008-05-29 Nec Corporation Printed circuit board
CN101677487A (zh) * 2008-09-18 2010-03-24 日本电气株式会社 印刷布线基板及其制造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109803482A (zh) * 2017-11-17 2019-05-24 英业达科技有限公司 多层印刷电路板及制作多层印刷电路板的方法
WO2020073857A1 (zh) * 2018-10-12 2020-04-16 中兴通讯股份有限公司 过孔反焊盘形状的确定方法及印刷电路板

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Publication number Publication date
US20150163910A1 (en) 2015-06-11
TW201531192A (zh) 2015-08-01

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Application publication date: 20150617